SU1709307A1 - Device for comparing illegible values - Google Patents

Abstract

The invention relates to computing. The purpose of the inventions / is to extend the functionality by generating a fuzzy fuzziness indicator by comparing it with a clear set. The device contains a generator of 1 clock pulses, a block of 3 shapers of the membership function, a group of 4 subtractors, a group of 5 modulation drivers, a group of exponentiation blocks 6, an adder,?, A divisor 8 by a factor, the Jusdvig register, a register 11. multiplier 13 by a factor, counter 2, exponential unit 9, frequency divider 14, delay element 15. 1 il.

Description

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The invention relates to specialized means of subtractive techniques and can be used to determine the fuzziness measure of a fuzzy set. .

The purpose of the invention is to extend the functionality by forming a fuzzy set fuzziness index by comparing it with a clear set.

The drawing shows the electrical circuit of the device.

The device contains a clock pulse generator (GTI) 1, a counter 2, a block 3 of drivers of membership functions, a group of subtractors 4, a group of 5 drivers of modules, a group of blocks 6 of raising to a power, an adder 7, a divider 8 by a factor, block 9 of raising to a power, a register 10 shift, register 11, block 12 for determining the minimum value, multiplier 13 by a factor, frequency divider 14, element (delay 15).

The device works as follows ./

After launching the GTI 1, the counter 2 changes its state in succession. For simplicity, consider the case of using a three-bit counter. Consequently, the counter states are C {000. 100. 010 ... 111}. The total number of such states is m 2. Each counter state corresponds to a set O and 1, which are elements of the original set X. These elements make up two sets (a clear set B and a fuzzy set A) within the original set X. Normally the membership functions for the elements O and t of a clear set B are denoted as jUe О, // 8 1,

The membership functions for the elements O and 1 of the fuzzy set A in the general case lie in the interval (O, 1) and they can be designated), (1). Consequently, the counter states (the set C) are all possible combinations of elements of the original set X. To compare two sets B and A, it is necessary to take into account all possible combinations of elements: - the elements of the original set X. This is done as follows. The element of set C (the signal from the output of the estimator 2) is fed to the input of the block 3 of the shapers of membership functions, the output of which forms the corresponding values of the membership functions. For example, for the second element of the set C (Cj-2 1.0, 0), corresponding to the signals 1, O, O at the outputs of counter 2, are formed

three numbers // А (1) ./ iA (0) .// A (O). On the outputs of the subtractors 4-1-4-l (the differences of R (1) - // in (1) are home). R2 (0) (0). / GA (0) - / Mv (0) i.e. respectively Ri / iA (1} -1

R2) RE J A A (O) since / WB (1) 1, (O) O. Moduli of the corresponding differences are formed in the formers. In blocks 6, these differences are raised to the power p. where p is a natural number.

Then the sum is formed in the adder 7

I RI I which is divided by n in divisor 8 and is raised to the power of 1 / p in block 9.

As a result, for each element of the set C, a private (jth) index of the similarity of the sets и and ГG is formed.

d | (XB) li | M)

| -1

which is entered into shift register 10 cells.

As a result, after the formation of m pulses, all m partial indices dj (MB) will be written to register 10, which, from the output of divider 14, after a delay in delay element 15 (required for synchronization with transients in blocks 2-10) are written to register 11 with simultaneous stopping of the GTI 1. In block 12, the minimum value of the partial index for all elements of the set C is determined: min d (A, B), which is multiplied by 2 in the multiplier 13. The resulting value

WH 2 min dj (A, B)

is an indicator of fuzziness of a fuzzy set A.

Claims (1)

Claim device Comparing fuzzy values, comprising a clock pulse generator, a counter, a delay element, an adder, a subtractor group, a shift register, a register, and a multiplier by a factor, the clock pulse generator output being connected to the estimator input, characterized in that functionality by forming a fuzzy fuzziness indicator by comparing it with a clear set, the block of the function of membership function, group pa shapers modules, a group of exponentiation blocks, a frequency divider, a divider by a factor, the exponential unit, the minimum value determination unit, the bit counter outputs being connected to the corresponding block inputs: the membership function drivers and the corresponding inputs of the readable group of readers, the decrement inputs of which are connected to the corresponding outputs of the driver function generator blocks, the output of the group readers, connected to the corresponding inputs the inputs of the shapers of the modules of the group, the outputs of which are connected to the corresponding inputs of the units to the power of the groups py, the outputs of which are connected to the corresponding inputs of the adder, the output of which is connected to the input of the divider the coefficient, the output of which through the exponentiation unit is connected to the information input of the SDVMGA register, the output group of which is connected to the group of information inputs of the register, the output group of which is connected, and to the input group of the minimum value determination unit whose output is connected to the multiplier input by a factor The output of which is the output of the output TVE of the output of the clock pulse generator is connected: on the shift input of the shift register and to the input of the clock divider time; Not with a register write-write register, and with i & x clock stopping the generator of clock pulses.