SU1700490A1 - Interpolation peak detector - Google Patents

Abstract

The invention relates to measuring the maximum value of a signal. In order to improve measurement accuracy, resistors 2-7, digital-to-digital converters (D / A converters) 9-12, current maximum register 8, comparison block 13, adders 14-18, multipliers 19-21, generator 23 of trigonometric functions, sensor 24 are entered into the detector time, maximum hold time register 25, control block 26, logic gate 27 and precision peak detector 22. At the command of block 26, analog-to-digital converter 1 transmits a digital code to registers 2 and 5. Block 13 compares the contents of registers 2 and 8 and, if maximum has not come, detector pro olzhaet work. If in register 2 the value is less than register 8, i.e. the maximum has already been passed, the valve 27 stops the operation of the detector. In this case, in register 8 there is a maximum, in registers 6 and 7, the two previous maximum values., And in register 5, the value after the maximum. Adders 14-17 on the signals of the DAC 9-12 using the generator 23 and the multipliers 19-21 carry out multiple inverse analog Fourier transform. The result of the processing is stored in the detector 22. In the description an example of the implementation of blocks 26 and 24 is given. 2 Il. cl

Description

cosfaXQ) cos (2ZQ)

1

The invention relates to measuring the maximum value of a signal.

The aim of the invention is to improve the measurement accuracy,

Fig. 1 is a functional diagram of an interpolation peak detector; in fig. 2 - control.

The interpolation peak detector (Fig. 1) contains an analog-to-digital converter (ADC) 1, registers 2-7, register 8 of the current maximum, digital-to-analog converters (D / A converter) 9-12, block 13 of comparison, adders 14-18, multipliers 19- 21, a precision peak detector 22, a generator of 23 trigonometric functions, a time sensor 24, a maximum time register 25, a control block 26 and a logic gate 27, the input 28 connected to the input of the A / D converter 1, the output of which is connected to the inputs of registers 2 and 5, the output register 2 is connected to the inputs of register 3, register 8 is currently maximum and the first input of the comparison unit 13, the second input of which is connected to the output of the register 8 of the current maximum and the input of the DAC 10, the output of the register 3 is connected to the inputs of registers 4 and 6, the output of the register 4 is connected to the input of register 7, the outputs of registers 5-7 are connected with the DAC inputs 9, 11 and 12, respectively, the output of the comparison unit 13 is connected to the second input of the logic valve 27, the output of which is connected to the control inputs of the registers 5-8 and 25, the DAC output

9 connected to the fourth summing input of the adder 14 and the first summing inputs of the adders 16 and 17, the output of the DAC

10 connected to the third summing input of the adder 14, the summing and first subtractive inputs of the adders 15 and 17, respectively, the output of the DAC 11 is connected to the second summing input of the adder 14, the subtractive and the second summing inputs of the adders 16 and 17, respectively, the output of the DAC 12 is connected to the first summing input of the adder 14, the subtractive and the second subtractive inputs of the adders 15 and 17, respectively, the output of the adder 14 is connected to the first summing input of the adder 18, the output of which is connected to the input of the precision pack detector, the outputs sin (( 2l Q, cos (2l Q and cos (Al Q) of the generator 23 of trigonometric functions are connected to the second inputs of multipliers 19-21, respectively, the first inputs of which are connected to the outputs of adders 15-17, respectively, the outputs of multipliers 19-21 are connected to the second, third and the fourth summing inputs of the adder 18, the output of the sensor 24 time is connected to

a maximum time register 25, and a control unit input 26, the outputs of which are connected to the control inputs of registers 4, 3 and 2, ADC 1 and the first

input logic gate 27, respectively.

control block 26 (Fig. 2) contains delay connected elements 29-34 in series, with the first input of element 29 being the input and the first output of control block 26, the outputs of elements 29, 30, 31 and 34 being second, third, fourth and the fifth outputs of the control unit 26, respectively.

5 Time sensor 24 (FIG. 2) may comprise a pulse generator 35 and a counter 36 connected in series,

The interpolation peak detector operates as follows.

0 According to the signal at the first output of control block 26, the value of register 3 is transferred to register 4, by the signal - at the second output of control block 26, the value of register 2 is transferred to register 3, by signal to

5, the third output of the control unit 26 outputs the ADC 1 output value to register 2, the signal at the fourth output of the control unit 26 triggers the ADC 1. The output signals of the control unit 26 are output in the specified sequence, delayed relative to each other during the operation time of the blocks. Since the appearance of a new value in register 2, comparison unit 13 (digital comparator) has carried out a comparison of this value with the value of the current maximum being in register 8. If the value in register 2 is greater than in register 8, then at the output of comparison block 13 the level of the logical unit is established, which enables the operation of the logic valve 27. In this case, when the signal arrives at the fifth output of the control unit 26, a signal is generated at the output of the logic valve 27, according to which

5 sample values from ADC 1, and registers 2-4 are transferred to registers 5, 8, 6 and 7, respectively. If register 2 is smaller than register 8, then the output of comparison unit 13 sets the logical zero level, which prohibits

0 operation of the logic valve 27. In this case, the information is not overwritten. Thus, by the end of the measurement in register 8, the highlighted value of the maximum is established, in registers b and 7 5, respectively, the two previous ones from the maximum value, and in register 5 - the next one.

All values in the registers remain unchanged until the end of the full cycle.

clarify the peak signal. In order to perform a direct discrete Fourier transform, they are transformed by means of a DAC 9-12 into analog form. At the output of the adder 14, the value of the coefficient C ($) is formed, at the output of the adder 15 - C (1), at the output of the adder 16 - C (2) and at the output of the adder 17 - C (3). In the multiplier 19-21, the coefficients C (1), C (2) and C (3) are multiplied, respectively — on the trigonometric functions sin 2 Q, cos 2 P: O, cos 4 G Q, produced by the generator 23 trigonometric functions, here Q t / T, where t is the current time; T - the period of trigonometric functions. The results of the multiplication and the coefficient value (fed to the adder 18, where in addition to the summation, the multiplication is carried out by a factor of 1/4. From the output of the adder 18, the signal portion containing the maximum reproduced with the frequency f 1 / T goes to the precision peak detector 22.

In order to record the maximum occurrence time in the interpolation peak detector, there is a time sensor 24, the read values of which are recorded in the register 25 as well as the read values of the maximum portion. The time sensor 24 also synchronizes the control unit 26. An interpolation peak detector comprising an analog-to-digital converter whose input is the detector input, a comparison unit, a current maximum register, characterized in that, in order to improve the measurement accuracy, five registers are additionally introduced into it, four digital-to-analog converters, five adders, three multipliers, a precision peak detector, a generator of trigonometric functions, a time sensor, a maximum time register, a control unit and a logic gate, the input the first register is connected to the output of the analog-to-digital converter and to the input of the second register, the output of the second register is connected to the input of the first digital-analog converter, the input of the third register is connected to the output of the first register and the input of the current maximum register, as well the current maximum register is connected to the second input of the comparator unit and to the input of the second digital-to-analog converter; the fourth register is connected to the output of the third register and to the fifth The register whose output is connected to the input of the third digital-to-analog converter, the input of the sixth register is connected to the output of the fourth register, the output of the sixth register is connected to the input of the fourth digital-to-analog converter, the output of the first digital-to-analog converter is connected to the first summing inputs of the first, third and fourth adders, the second output digital-to-analog converter connected to the second and first summing inputs of the first and second adders, respectively, and with the first subtractive input m of the fourth adder, the output of the third digital-to-analog converter is connected to the third and second summing inputs of the first and fourth adders, respectively, and with the subtractive input of the third adder, the output of the fourth digital-analogue

the converter is connected to the fourth summing input of the first adder and with the subtractive input of the second and second subtractive input of the fourth adder, the output of the first adder is connected to

the first summing input of the fifth adder, the output of the second adder is connected to the first input of the first multiplier, the second input of which is connected to the output of the generator of trigonometric functions

sin 2l: Q, the output of the multiplier is connected to the second summing input of the fifth adder, the output of the third adder is connected to the first input of the second multiplier, the second input of which is connected to the output

generator of trigonometric functions cos 2 l Q, the output of the second multiplier is connected to the third summing input of the fifth adder, the output of the fourth adder is connected to the first input of the third multiplier, the second input of which is connected to the output of the generator of trigonometric functions cos 4 and Q, the output of the third multiplier is connected to the fourth the summing input of the p of the adder, the output of the p

the adder is connected to the input of a precision peak detector, the output of the time sensor is connected to the inputs of the maximum time register and the control unit, five outputs of which are connected to the control inputs of the fourth, third and first registers, the analog-digital converter and the first input of the logic valve, respectively, the output the comparator unit is connected to the second input of the logic valve, the output of which is connected to the control inputs of the second, fifth, sixth registers, the current maximum register and the register f ksatsii maximum time.

Claims (1)

Claim An interpolation peak detector containing an analog-to-digital converter, the input of which is the detector input, a comparison unit, a register of the current maximum, characterized in that, in order to improve the measurement accuracy, five registers, four digital-to-analog converters, five adders, three multipliers are added to it , a precision peak detector, a trigonometric function generator, a time sensor, a maximum time register, a control unit and a logic gate, the input of the first register of the connection nen with the output of the analog-to-digital converter and with the input of the second register, the output of the second register is connected to the input of the first digital-to-analog converter, the input of the third register is connected to the output of the first register and the input of the register of the current maximum, as well as with the first input of the comparison unit, the output of the register of the current the maximum is connected to the second input of the comparison unit and to the input of the second digital-to-analog converter, the fourth register is connected by its input to the output of the third register and to the input of the fifth register, the output of which is connected to the input of the third digital-to-analog converter, the input of the sixth register is connected to the output of the fourth register, the output of the sixth register is connected to the input of the fourth digital-to-analog converter, the output of the first digital-to-analog converter is connected to the first summing inputs of the first, third, and fourth adders, the output of the second digital-to-analog converter is connected to the second and the first summing inputs of the first and second adders, respectively, and with the first subtracting input of the fourth adder, output the third digital-to-analog converter is connected to the third and second summing inputs of the first and fourth adders, respectively, and to the subtracting input of the third adder, the output of the fourth digital-to-analog converter is connected to the fourth summing input of the first adder and to the subtracting input of the second and second subtracting input of the fourth adder, the output of the first adder is connected to the first summing input of the fifth adder, the output of the second adder is connected to the first input of the first multiplier, the second input of which of the second is combined with the output of the trigonometric functions generator sin 2zrQ, the output of the multiplier is connected to the second summing input of the fifth adder, the output of the third adder is connected to the first input of the second multiplier, the second input of which is connected to the output of the trigonometric generator cos 2 π Q, the output of the second multiplier is connected to the third summing inputs of the fifth adder, the fourth adder output is connected to the first input of the third multiplier, a second input coupled to the output of the generator ¹ with the trigonometric functions cos 4 π Q, in the course of the third multiplier is connected to the fourth summing input of the fifth adder, the output of the fifth adder is connected to the input of a precision peak detector, the output of the time sensor is connected to the inputs of the maximum time register and the control unit, five outputs of which are connected to the control inputs of the fourth, third and first registers, analog-digital the converter and the first input of the logic gate, respectively, the output of the comparison unit is connected to the second input of the logic gate, the output of which is connected to the control yayuschimi inputs of the second, fifth, sixth registers, register of the current maximum and fixation time of the maximum register.