SU1688420A1 - Device to forecast the discrete communication channel status - Google Patents

Description

one

(21) 4773661/09

(22) 12.25.89

(46) 30.1091. Bul №40

(72) E P.Valyuzhinich and NA Trikhonyuk

(53) 621.395.664 (088.8)

(56) USSR Author's Certificate No. 1319293.kl H 04 V 3/46, 1986

(54) DEVICE FOR PREDICTING THE STATE OF A DISCRETE COMMUNICATION CHANNEL

(57) The invention relates to telecommunication engineering. The purpose of the invention is to increase the reliability by determining the lifetime of a discrete communication channel. The device contains an error counter 1, a prediction unit 2, a difference calculating unit 3, two adders 4 and 7, a divider 5, two blocks 6 and 14 of memory, two threshold blocks 8 and 10, two counters 9 and 13, an indicator 11, two time interval formers 12 and 18, two asymmetry factor determination units 15 and 17, a comparison unit 16, a multiplier 19, a decoder 20. The entered set of blocks and the change of links allow you to define lifetime of the communication channel with accounting m asymmetry of the obtained forecast, which in turn increases its reliability 1 sludge

yo

About 00

J

yoo o

The invention relates to telecommunications technology and can be used for predictive monitoring of radio channels during periods of their use,

The purpose of the invention is to increase the reliability by determining the lifetime of a discrete communication channel.

The drawing shows a structural electrical circuit of the proposed device.

A device for predicting the state of a discrete communication channel contains an error counter 1, a prediction unit 2, a difference calculating unit 3, a first adder 4, a divider 5, a first block, 6 memories, a second adder 7, a first threshold block 8, a first counter 9, the second threshold unit 10, the indicator 11, the first time interval generator 12, the second counter 13, the second memory block 14, the first asymmetry factor determination unit 15, the comparison unit 16, the second asymmetry factor determination unit 17, the second time interval former 18, multiply Spruce 19, decoder 20.

The error counter 1 is designed to calculate the errors of the discrete communication channel for the time interval Dg generated by the first generator 12 of the time interval. Prediction unit 2, using the value of the number of communication channel errors nl over the I time intervals Dg |, I 1,2,3, determines the value of the error number m-t-i per I + 1 time interval, called the prediction time interval.

Difference calculation unit 3 is designed to determine the difference

And t - Mon-1,

where u is the number of communication channel errors in the I + 1 time interval;

ni + i is the predicted value of the number of errors per I + 1 time interval.

The values Ac of the output of block 3 arrive at the input of the first adder 4, where they are summed up. If u + i does not exceed the established norm at the second output of prediction block 2, the signal is the norm that enters the polling input of the first adder 4, and the values of D are calculated at the input of the divider 5.

The second counter 13 is designed to count the number of time intervals Ar from the output of the first generator 12 of the time interval. The Norma signal from the second output of block 2 interrogates the second counter 13 and the value of the number of intervals Dg, calculated by it, is input to the installation of the division factor of divider 5. Divider 5 is designed to calculate the frequency

D1-D2 + Az + ... + D | R

: D,

0

where I 1,2,3 ... is the division factor of divider 5.

The value D1, equal to the arithmetic average of the true and predicted value of the number of communication channel errors in the observation and lead time interval, is recorded in the first memory block 6.

The second memory unit 14 is designed to store the value of the shielding coming from the first output of the prediction unit 2.

The second time interval generator 18 is designed to form the At "Dg time interval, the duration of which is selected based on the speed of the D calculation circuit and reading the information of the first and second memory blocks 6 and 14

thirty

AtDg

20 + 50

The signal of the second time interval generator 18 reads the values of D1 from the first memory block 6. Constantly from the second memory block 14, the values of A-H are fed to the second adder 7. The second adder 7 at the time Ati performs the summation of D1 + mon-1 to moment

time At2, D –f D + nc – i at time Atj, J AJ + n + 1.

The first threshold unit 8 is designed to compare the total value with the set threshold Pmax, where Pmax is the threshold value of the number of errors.

The first counter 9 is for

counting the number of time intervals from the output of the second generator 18 time interval.

If the value from the output of the second adder 7 is greater than the set threshold in the first threshold block 8, then a signal appears at its output that polls the first counter 9 and the value of the number of intervals L equal to the number of the time interval of the communication channel is fed to the input of the second threshold block 10, where it is compared with a set threshold. When the threshold set in the second threshold block 10 is exceeded, the Avariya signal is generated, which is displayed by the indicator 11. For the convenience of the operator, the indicator 11 also displays the value of the lifetime of the communication channel determined by the multiplier 19, at the output of which the value Lj,

When the Avariya signal appears at the third output of the prediction block, the first adder 4, the second counter 13, the first and second asymmetry coefficient 15 and 17 are reset. The zeroing of the first and second blocks b and 14 of the memory was performed by the signal of the first driver 12 of the time interval.

The zeroing of the second adder 7 is effected by the signal of the first threshold of the block 8, analogue to the polling signal of the first counter C.

The first and second fleas 15 and 17 are designed to determine the value of the asymmetry coefficient of the spacecraft.

CD W DCn) 3

where n is the number of errors of the discrete communication channel;

M is the sign of mathematical expectation (MO);

D is the sign of the variance.

The first block 15 is designed to determine the magnitude of the asymmetry coefficient KA of the error values of a discrete communication channel, and the second block 17 - to determine the value of the coefficient of asymmetry KA predicted number of errors from the output of the second adder 7,

To control the process of determining the spacecraft for the first and second blocks 15 and 17, respectively, the output signals of the first and second timers 12 and 18 of the time intervals are used. If the values of the AC from the outputs of the first and second blocks 15 and 17, read by the signal of the first threshold block 8, coincide, then the output of block 16 compares the Prediction signal reliably, which is displayed by the indicator 11. Otherwise, the result of low prediction accuracy the output of block 16 comparison - signal Prediction is unreliable.

Claims (1)

Invention Formula A device for predicting the state of a discrete communication channel, comprising a first time interval generator, a first adder, a divider, serially connected error counter, whose information input is the device input, a prediction block and a difference calculating unit, the second input of which is connected to the error count output, the first memory block connected in series, the second adder and the first threshold unit, the first counter, the second threshold unit connected in series and the indicator, the second block of the pa mi ti 0 connected in series the second counter and the decoder, the output of the first form-spacer ate the time interval connected to the input of the error counter demand, characterized by a heme, which, in order to increase 5 reliably by determining the lifetime of the disk ;;, pne. -, communication link, entered. i e. it, exp and the output of which are connected respectively with the output of the first counter and the second input of the indicator, 0 serially connected first asymmetry factor determination unit, whose information input is connected to the output of the error counter, and a comparison unit, the output of which is connected to the third 5 an indicator input, a second asymmetry factor determination unit, the information input and the output of which are connected respectively to the output of the second adder and the second input of the comparison unit, the second time interval generator, the start input which is connected g, the output of the first time interval generator, and the output of the second time interval former 5 soybeans with a polling input of the second adder, with a clock input of the first bls, e memory, with a polling input of the first counter and a clock input of the second asymmetry factor determination unit, the output of the difference calculating unit is connected to the input of the first adder, the output of which is connected to the divider input the output of which is connected to the input of the first memory block, the output of the decoder is connected to the input of the divider installation, the output of the second memory block is connected to the second t .. one of the second adder, the output of the first threshold unit is connected to the input input The first and second asymmetry coefficient determination units, the zeroing input of the second adder and the information input of the first counter, the output of which is connected to the input of the second threshold unit, the second output of the prediction unit connected to 5 inputs for zeroing the first adder, the second counter and the first and second asymmetry coefficient determination blocks, the third output of the prediction block is connected to the polling inputs of the first adder and the second counter, the output of the first form is 86884208 the time span is connected by the information input of the second the clock input of the first block of the op counter and the zero input of the first block determining the asymmetry factor, memory, the first output of the block by the prediction input of the prediction block is connected to the information input neither, by the input of zeroing the second block pa-5 of the second memory block,