SU1682783A1 - Device for monitoring coat deposition process - Google Patents

Abstract

The invention relates to a control and measuring technique. The aim of the invention is to improve the accuracy and reliability due to the absence of mechanical elements, the use of electronic scanning and automation of the measurement process. In the measurement, the flux of the radiation source is divided into two equal fluxes, which, after interacting with the reference and the product (for example, the working electrode), are recorded by a common electron scanning receiver. The difference in mean values of the compared signals is measured by the method of double integration with statistical averaging. Compensation is carried out by increasing the signal gain from the working electrode to the signal level from the reference, and the measurement of the value of the relative reflection coefficient is carried out at the time the compensation is reached in digital form. 3 il. cl

Description

The invention relates to instrumentation technology and can be used for thickness gauging in microelectronics, instrument making, electrochemistry, for scientific research of various materials, as well as for photometric research.

The purpose of the invention is to improve the accuracy and reliability due to the absence of mechanical elements, the use of electronic scanning and automation of the measurement process.

FIG. 1 shows a block diagram of a device for controlling the coating process; in fig. 2 - time diagram of the device; in fig. 3 - dependence of the value of the controlled resistance Ry as a function of the control voltage Oy.

The device (Fig. 1) contains a laser radiation source 1, a radiation flux splitter 2, a mirror reflector 3 directing one of the streams to the reference 4, the second stream is intended to be directed to the test article 5, the reference and the product can be placed in the electroplating bath 6 , dissector 7, receiver with electronic scanning of photocathode image, analog-digital converter 8, electronic switches 9 and 10 with different conduction channels, differential cascade 11, horizontal reversing counter 12, first circuit 13 cf Avna code, cascade 14 control line scanner, shaper 15 line scanner, reversible counter 16 frame scan, the second circuit 17 code comparison (CC), cascade 18 control

ABOUT

with VI

00

with

frame scanner, frame scanner 19, preamplifier 20, sampling interval imager 21, controlled divider 22, sampling-storage unit (VHR), storage interval generator 24, compensating for reheating 25, controlled resistance 26, T-flip-flop 27, current switches 28 and 29 with different conduction channels, current-voltage converter 30, digital-to-analog converter (DAC) 31, amplifier-limiter 32, bridge switch 33 outputs, phase-inverted cascade 34 converter 35 code, adder 36, detector 3 7 zero, the arithmetic logic unit (ALU) 38 and the cascade 39 of the error sign,

The device works as follows, i

The radiation flux of laser 1 falls on the splitter 2 of the radiation flux, from the outlets of which the working channel flux and the reference flux after reflection from the reflector 3 are directed to the standard 4 and product 5 (for example, electrodes located in the electroplating bath 6), Reflect, both streams fall on two areas of the photocathode of the dissector 7, symmetrically located in relation to the center of the photocathode.

Consider the essence of the formation and development of the dissector. Since any of the commercially available microcircuits (for example, a 1107PV2 type microcircuit) can be used as a dual-integration ADC, it is convenient to use the high-frequency output voltage of these microcircuits to form the horizontal and vertical scans of the dissector. The output voltage U of the frequency f (Fig. 2) of the A / D converter 8 from its first output is supplied to electronic switches 9 and 10 with opposite conduction channels. From the second output of the A / D converter 8, the output sawtooth voltage of the forward and reverse integrating cycles of the A / D converter 8 goes to the differentiating cascade. Depending on the polarity of the measured ADC voltage, its output sawtooth voltage can be positive or negative. Since keys 9 and 10 with opposite conduction channels, irrespective of the polarity of the saw-tooth voltage, one of these keys is always open during the duration of the forward and reverse integration cycles, and therefore there is a voltage on the common output of the keys during the duration of the saw-voltage voltage U is the frequency f of the ADC 8. From the output of the keys, the voltage U is fed to the input of the reversing counter of the 12 line sweep.

The value of the Npc code (Fig. 2) of the reversible counter 12 increases from zero to the value of Nc and goes to the first code comparison circuit 13 (CC), in which upon transition

By means of 0, Nc / 2 and Nc values, voltage pulses Uc are generated. The pulses of the FCS 13, corresponding to the zero and the Nc code of the reversible counter, are further fed to the cascade 14 of the horizontal scanning control. The output voltage Upc of the cascade 14, which is a series-connected two-input circuit OR and a T-flip-flop, is fed to the control input of the reversing counter 12 and is used in

for the inclusion of a forward or reverse account, respectively, with a zero and Nc code values Npc.

Thus, the Npc code value is triangularly modified. Npc code

It also enters the line scanner, which is a series-connected DAC and a current-voltage converter with a paraphase output, the output voltage

which is fed to the input of the horizontal deflection plates of the dissector 7 and is used to scan the image along the row. After each sweep stroke, a step of sweep displacement along the frame is formed back and forth along the row. To this end, the output pulses of the first code comparison circuit 13, corresponding to the zero-crossing, are output from its output to a vertical reversing counter 16, the output code Mpc of which using the second FCS 17, the frame 18 of the vertical control and the framing 19 of the frame scan, similarly considered in the horizontal scan, triangularly varies from 0 to NK, is converted to paraphase voltage, and is used in the dissector 7 to scan the image across the frame.

Thus, as a result of the sweep

images of the photocathode of the dissector 7, a continuous sequence of pulses appears in the row and the frame at the output of the dissector, the amplitudes of which are U3 and Up (Fig. 2) are proportional to the intensities reflected from the reference and working

electrode fluxes and are equal respectively

i YafuK (NeF + Fsh) + ishK; (one)

Up Russia at K (YarF + Fsh) + ishK; (2)

where RF is the load resistance value

dissectors;

the anodic sensitivity of the dissector;

K-gain preamp;

F is the radiation flux;

Flash - background flow;

Um is the level of the drift voltage zero preamplified to the input.

The pulses Ie and Up are fed to the input of the imaging unit 21 of the information sampling time interval and the controlled divider 22. The pulses amplified by the imaging unit 21 and Ie Up are fed to the controlled divider 22 and control its transmission coefficient so that only the Ua pulses are input to the controllable divider and Up. From the output of the controlled divider, the pulses Ie and Up are fed to the output of the UHP 23. The pulses of the imaging unit 21 are also fed to the input of the imaging unit 24 of the information storage interval, to another input of which the output voltage U is fed from the first output of the ADC 8. The imaging unit 24 of the storage interval after the pulse has expired the driver 21 of the high-frequency voltage U generates pulses of such duration that the duration of the output pulses r of the water economy department 23 is within 0.15TC, where Tc is the duration of the sweep of information on the line {FIG. 2).

The output pulses of the WCX are fed to the input of a compensating repeater 25 assembled at an op-amp operating in an inverting repeater mode with resistance Ro at the inverting input and controlled resistance 25 in the feedback circuit connected in series with constant resistance R.

A field effect transistor can be used as a controlled resistance.

The pulses Uc of the first SSK 13, corresponding to the moment of transition of the Npc code through the values of Mc / 2, come from the output of the SSK 13 to the input of the T-flip-flop 27 and form the voltage Ur at its output (Fig. 2), which is fed to the control inputs of the current electronic keys 28 and 29 with opposite conduction channels. During the time interval Tr, key 29 is opened, and during Te - key 28 (Fig. 2). In the time interval Te, the voltage pulses from the reference electrode amplify. In this interval, a current level lo is applied to the input of the key 28 such that the transfer coefficient of the compensating repeater 25 is equal to one.

Obviously, in this case, the current 0 in the converter 30 the current - voltage is converted to the voltage level U0, which, being fed to the input of the controlled resistance 26, changes it to the value Ryo (Fig.

3). AT THIS R + Ryo Ro.

In the interval Tp of the pulses Up, the gain level is determined by the output current of the D / A converter 31, which, through the switch 29 opened in this interval, enters 5 at the input of the converter 30.

Suppose that the initial current of the D / A converter 31 is equal to lo, and therefore the gain in the interval Tr is also equal to unity. Also assume that in the initial state, R3 Rp and U3 Up.

0 In this case, the output voltage of the compensating repeater 25 is fed to the input of the amplifier-limiter 32 from below. After restriction from below to unchanged, the maximum allowed for specific

5 conditions, level and amplification, the pulses Us and Up are fed to the input of the bridge switch 33 of the output. The bridged output switch is a four-shoulder, assembled on electronic keys with opposite conduction channels, a rectifier that is used to invert the signals Us and Up. Since these signals enter the intervals Te and Tr, the output voltage UT of the T-flip-flop 27 is used to control the bridge switch of the stroke.

The output voltage of the bridge output switch after passing through the phase-inverse stage 34, representing

0 is a repeater with an input voltage switching to the Te and Tr time intervals, is fed to the information input of the A / D converter 8. A 1107 PV2 chip is used as a dual-integration ADC.

5 The ADC measures the difference between the U3 and Up signals in the Ti integration interval. In this case, U3 Up, and therefore the output code on the third output of the ADC is zero. Since in the used A / D converter, we output only the code for controlling the seven-segment light indicators, this code is converted to binary in the code converter 35, and after that from the output of the converter it is fed to the cad5 frame of the adder 36 and the detector 37 zero.

In the adder 36, before this measurement, the code N0 was recorded, which, arriving at the input of the DAC 31, leads to the appearance of a current at its output 0. Since in this case, the output0 of the code converter 35, the code is zero, the detector 37 triggered and the signal enters the ALU 38, in which the output code of the adder N0 is recorded. The value of the code is N0 and is the conditional number of the meter, which is stored in the memory of the ALU.

Consider how the measurement process is performed at R3 RP (U3 & Up). Let us determine the value D Ry for measuring the magnitude of the controlled resistance 26, which, for a given value of Rp, is necessary to provide compensation, i.e. alignment of U3 and Up pulses in amplitude.

Taking into account (1) and (2) when the transmission coefficient 1) e is equal to one and the transmission coefficient of the compensating repeater increases with the amplification of pulses Up from one to the value (R0 + A Ry) / Ro, we obtain

Ro + A Ry,

ie ir

RC

RfuK (FRD + Fsh) + ishK (P0 + ARy) / R0

 Kfu K (Raff + Fsh) + ish K (3)

or

RF at F R0 (R3 - RP) - Rp A Ry Rf} Fsh ARy + Uuj ARy. (4)

Let's analyze the results. If R3 Rp, then U3 Up and from (3) it follows that A Ry Oh. In this case, as follows from (4), the influence of the Fs background fields and the zero-drift voltage is completely excluded. This is extremely important, since it is at the beginning of the anodic oxidation process that the sensitivity of the method should be maximized. From (4) it follows that since the values of Fs and ish are very small, and the value of the workflow F is very large, with ARy 0 the right part of this expression will be with a high degree of approximation also zero (both members of the right side of expression (4) contain products of two small numbers, so in comparison with the members of the left-hand side of this expression are small numbers of the second order).

This is only possible with

Ro (R3-RP) -RP ARy 0. (5) From (5) taking into account Rs - Rp A R, we find that the relative change in the reflection coefficient and the relative reflection coefficient of the working electrode are determined from the expressions respectively

AR ARytK.

RT R0 + ARy w

Rpro j

R3 Ro + ARy ()

g,

A change in the controlled resistance by the value of ARy in the interval Tp can only be achieved by supplying a change in the code by the value N to the input of the DAC 31. At the same time, the output voltage of the converter 30 is current-voltage at the sensitivity of the DAC U m of sensitivity / converter 30 control voltage Uy by

AUy ANi / 0. (8)

ten

15

20

25

thirty

35

40

45

As follows from FIG. 3, the value of A Uy from (8) corresponds to the change in the controlled resistance

ARy AUytga AN qfiiga, (9) where tg a is the experimentally determined sensitivity of the controlled resistance to voltage.

Taking into account (9), the values of A R / R3 and RP / R3 from (6) and (7) are defined as

Ar fffftgganko an

R3 Ro 7 / ftggAN

50

55

Rp R3

R

Ro -f; / 3tgaAN

Ro + K0AN (S) Ro

Ro + KcTAN

(eleven)

With the limiting value of the reflection coefficient of the working electrode Rp Rpn ARn A Ryn, 10

 Ro + ARyn (12)

where A Ryn is the limit value of the change in the controlled resistance Ry. From (12) we define

.(13)

Neglecting, in accordance with the results obtained, the values of the background flux of the flash radiation and the voltage of the drift zero, we determine the magnitude of the change in the control resistance ARy, which is provided by the feedback action at Rp R3.

The voltages Us and Up from the reference and working electrodes at the output of the phase inversion cascade 34 are respectively equal to

iReFuRf KKou; (14)

IR RrFuRfKKOU, (15)

where K0y - the transfer coefficient of the amplifier - limiter.

In expressions (14) and (15), the transfer coefficient of the compensating repeater 25 is assumed to be 1, since the value of the code N0 entering the input of the DAC has not changed.

Considering the time of the direct integration cycle of the ADC 8 equal to Ti, at a given sensitivity value AiMIN measuring the error voltage of the feedback circuit (compensation circuit), the quantization step of the AUuj ADC and the time constant of the ADC integrator we get Aish AiMiTi / gi.

For a value of Ti given from the point of suppression of the main interferences, one can determine the time constant

. UMMH 1c

Guy Aish

Reflected from the reference and working electrodes are recorded in these two

symmetrically located areas of the photocathode that, when scanning the photocathode image, a continuous sequence of equidistant pulses is obtained. The latter condition, due to inaccurate flow setting, is approximated, and therefore, as follows from the experimental results obtained, to eliminate malfunctions, each pulse at the sweep time along the Tc line can be extended with the TCDC to the value T of TSCR, where Cr t / Tc is pulse expansion coefficient. The value of Kp should be in the range of 0.15.

With this in mind, if Np pulses from each of the electrodes are registered for Rem T, then the integrator’s measured difference between the average values of the input voltages will be

AUcp Np (U3-Up) TcKp / rH. The output voltage of the integrator at the end of the integration cycle is defined respectively as

AiInt DiCrTi / Ti,

and the number of quanta recorded at the output of the integrator d Dint Np (U3-Up) TcKp. }

AN SCHITYGNTI 1bj

The L code N from the output of the code converter 35 enters the adder 36. From the fourth ADC output, information about the sign of the measured difference of average voltage values enters the stage 39 of the error sign, the output signal of which further goes to the adder 36 and controls its addition or subtraction written in it source code N0 with the newly received. In this case, to increase the voltage 1) p to the level U3, the value D N is added to the code No and this code value is fed to the input of the DAC 31.

As already shown, the value of the controlled resistance Ry changes by the value D Ry defined by (9).

Thus, taking into account (9), (14), (15), (16) for the conditions under consideration, D Ry Tc Kptga Np FuKf K Coe x х (Вэ - RP) / D Umin Ti. (17)

Obviously, the value of the limiting variation D Ryn of the value of the controlled resistance Ry to the limiting value of the reflection electrode Rpn coefficient, taking into account Rp Rpn, is determined from (17).

To ensure optimal compensation conditions (maximum speed with a minimum number of balancing strokes)

0

five

0

five

0

five

0

five

0

five

(nineteen)

determined from (13), should be equal to the value from (17), i.e.

Ro / n

1 -On TS Cf tg a rjfi Np (R3 - Rpn) Fu Vf K K0u

D imin Ti

(18)

Determine the number of impulses Np registered during the integration time Ti. With the duration T0 of the oxidation process and the permissible dynamic measurement error, the time ti of one measurement cycle will be approximately equal to Γ0. Under the above conditions for scanning an image and registering one pulse from each electrode during one sweep along the line, the number of recorded pulses from each electrode during T will be Np To d / Tc Ti / Tc.

Taking into account the Np value from (18), the recommended value of the input resistance of the compensating repeater is determined to ensure optimal working conditions.

To KoFU RF K Kr Kou Rpn

Ro --AUUH

where K0 // 3 tg a const.

The value of the limiting coefficient of reflection of the working electrode with

Rpn Rs (1 UE).

At t0 100 s; d 0.0001; Tc 20 µs Np 500 pulses from each electrode will be registered.

Thus, for specific conditions, first, the optimal value of Ro is determined from (19), after which, from (13),

D Ryn Up R0 / (1 - UE),

the size of which selects the type of adjustable field-effect transistor and the specific values

Ryo (R KQ.

If the value of R0 is selected in accordance with (19), then the feedback circuit will receive such a balancing signal, in which the pulses Up from the working electrode will be amplified so that in the next measurement cycle, the third output of the ADC will register zero. the zero detector 37 enters the ALU 38, and the output code of the adder 36 N0 + AN is read into the ALU.

In the ALU, by the value of N0, registered at Rp R3 at the beginning of the process, and the value of N0 + D N, D N is determined and, according to expressions (10) and (11), the values of DP / RE and RP / R3 are determined.

Practically, due to the influence of various instabilities and inaccuracies in the calculation, complete equilibration in a single measurement step is not achieved. For each clock cycle, only the degree of mismatch decreases, and the measurement process also ends when the zero detector is triggered. But in the considered case, with multiple measurements, the result recorded in the adder 36 will be the result of statistical averaging of multiple measurements of the same value. Thus, in this case, the effect of random errors is further (after a decrease in the UHT and in the interval Ti of the integrator): uncompensated errors at averaging over short time intervals are compensated for longer ones. This increases the sensitivity and accuracy of the measurement.

The features of the operation of the described device are as follows.

The signals from the product and the reference are single-pole, and since the attenuated (at Rp R3) signal from the product is amplified to the reference level, this allows the signal to be limited to a constant level followed by amplification, reduces nonlinear distortions, increases and stabilizes the sensitivity the entire working range.

The effect of the background fluxes, the dark current of the dissector, and the noise of the preamplifier may not be taken into account in the proposed information processing structure based on the dissector. This leads to an increase in reliability and automation level, since it eliminates the need to use modulators of radiation flux and rotating mirrors.

The increase in sensitivity and its stabilization over the range, operation with high radiation fluxes, and the development of an electronic compensation circuit that practically does not require power to control, allowed the work to be done without using electromechanical components for compensation and eliminated the need for automatic adjustment of the slit width.

An increase in the reliability and level of automation is also achieved through the use of digital data recording and processing.

The increase in sensitivity and measurement accuracy is also due to the limitation of the noise power by opening the amplifying path only for the signal sampling time; due to the expansion of pulses with the help of the VHD that converts real signals into quasistatic and increases the average value of the signal

due to the application of a limitation - signal amplification from below; due to the sequential integration of noise in the accumulative capacitance of the UHF, integration during the time Ti of the A / D converters and application of the statistical averaging method for electronic balancing; through the use of a single-channel processing circuit and signal compensation; through the use of a compensation method that does not require large control power; due to the high performance of the electronic compensation circuit (reduction of the dynamic error); by working at large

5 values of radiation flux; due to the weak influence of background fields.

Claims (1)

Apparatus of the Invention A device for controlling the coating process containing optically 0 associated radiation source and a flux splitter for two equal, photodetector intended for installation along the radiation fluxes reflected from the reference and controlled product, series-connected preamplifier and system of automatic electronic compensation of the optical asymmetry of the working and reference channels, different 0 that, in order to increase accuracy and reliability, the photodetector is designed as a receiver with electronic scanning of the photocathode image, a system of automatic electronic compensation of optical asymmetry - as connected in series controlled divider, sampling-storage unit, compensating repeater with a register at the input, bridge switch with two outputs, phase-inverse cascade, analog-digital converter, two electronic switches connected in parallel with different conduction channels, reversing th horizontal scanning counter and shaper 5 line scan, two outputs of which are connected to the first pair of photodetector inputs, connected in series to the first code comparison circuit, a vertical frame counter, and a frame scanner, two outputs of which are connected to the second pair of photodetector inputs, second code comparison circuit, and a frame scanning control cascade whose inputs are connected to two outputs of the second comparison circuit, and the output to the second input of the vertical frame scan counter; cascade control line scan, two inputs of which are connected to two outputs of the first comparison circuit, and the output to the second input reversible line scanner, differentiating cascade connected between the second output of the analog-digital converter and control inputs of electronic keys, code converter, the input connected to the fourth output of the analog-digital converter, adder and zero detector, the input of which and the first input of the adder are combined and connected to the output of the code converter, the cascade of the unpowered sign connected between the third output of the analog-digital converter and the second input of the adder, ar If the metric-logical node and digital-analog converter, the inputs of which are combined and connected to the output of the adder, the second input of the arithmetic-logic node is connected to the output of the zero detector, two current switches with different conduction channels, T-flip-flop, current-voltage converter and a controlled resistance with a resistor connected in parallel to the compensating repeater, the output of the digital tax converter is connected to the input of one of the two current switches with different conduction channels, the output of which is connected to one of the two inputs of the current converter is voltage, and the control input is connected to the control input of another current switch with different conduction channels, the second input of the bridge switch and the output of the T-flip-flop. the input of which is connected to the third output of the first code comparison circuit, the input of the second current switch with different conduction channels is intended to be connected to the current source of level 0. and its output to the second input of the current converter is the voltage whose output is connected to the control input control resistor, a sampling interval imager and a storage interval imager, the first input of which is connected to the first output of the analog-digital converter, the second input - to the second input of the controlled divider and is connected to the output y shaper sampling interval, the input of which is connected to a first input of controllable divider and connected to the output of the preamplifier, storage interval shaper output is connected to the second input node sample-storage. J tf fft # / ft pppppppppppppppppoppppp r- nffff ff.