SU1660132A1 - Controlled push-pull keyed generator - Google Patents

Description

The invention relates to a pulse technique and can be used as a controlled signal generator

2

low frequency. The purpose of the invention is to reduce the non-linear distortions of a controlled push-pull key generator - achieved by providing control of the transistor keys of the bridge amplifier in the time intervals of the polarity of the input signal and the input current of the low-frequency filter. Regardless of the phase shift of the input current of the low-pass filter 12 relative to the input voltage, a bipolar voltage is generated at the output of the bridge amplifier 11, which corresponds to the PWM signals at the output of the pulse-width modulator 1. 2 Il.

, 51), .., 1660132 A1

1660132

The invention relates to a pulse

technology and can be used as a controlled signal generator

low frequency.

The purpose of the invention is to reduce the non-linear distortions of a controlled push-pull key generator by providing control of the transistor keys of the bridge amplifier during the time intervals of the polarity of the input signal and the input current of the low-frequency filter.

FIG. 1 shows a scheme of a controlled push-pull key generator; in fig. 2 - signal diagrams explaining the operation of the circuit.

Managed push-pull key generator contains ^ push-pull pulse-width modulator 1, sensor 2 polarity of the input signal, controlled adder 3, switch 4, first'and second triggers 5, 6, first and second blocks 7, 8 delays, first and second blocks 9,10 matches , bridge amplifier 11, low-pass filter 12 (LPF), the input of push-pull pulse-width modulator 1 is connected to the control bus 13, and the auxiliary output is connected to the input 'of the sensor 2 polarity of the input signal, the first and second outputs 14,15 of the bridge amplifier are connected to phi inputs Lterra 12 low frequencies, the outputs of which are connected to the output buses 16, 17, the first and second signal inputs of the controlled adder 3 are connected to the first and second signal outputs of the two-stroke pulse-width modulator 1, and the control input - to the output of the sensor 2 polarity of the input signal, the input of the switch 4 is connected to the output of the controlled adder 3, the input of each delay block 7, 8 'is connected to the first output of the corresponding trigger 5.6, and the output to the corresponding control input of the switch 4 and the first input of the corresponding block 9,10 matches, the second input of each of which is connected to the corresponding output of the bridge amplifier 11, the first input of which is connected to the second output of the first trigger 5, and the second input to the second output of the second trigger 6, the third and fourth inputs of the bridge amplifier 11 are connected to the corresponding outputs of the switch 4, the first setup inputs of the trigger 5, 6 are connected to the output of the sensor 2 polarity of the input signal, the second setup input of the first trigger 5 is connected to the output of the second block 10 coincidence, the second setup input of the second first trigger 6 is connected to the output of the first block 9 matches.

Also in FIG. 1 shows the possible circuit implementation of all blocks of the proposed device. A push-pull width ¹ pulse modulator 1 contains two comparators 1-1 and 1-2 and a generator 1-3 of sawtooth voltage. The bridge amplifier 11 is made of four transistors 11-1 ... 11-4 and four diodes 11-5 ... 11-8.

Managed push-pull key generator operates as follows.

With a positive input signal and a positive current! C (transistor 11-2 open signal CB, the transistor 11-3 is controlled by a signal with pulse-width modulation (PWM) W-1, transistors 11-1 and 11-4 are closed) at the output of the sensor 2 polarities of the input signal, there is a positive potential I (up to the time сменι of the change of the sign of the input signal C), which arrives at the control input of the controlled adder 3, as a result of which its signal 11z transmits a signal and 1-1 from the first output of the push-pull pulse-width modulator 1 . Simultaneously signal and the trigger 5 is set to the zero state, and the trigger 6 - a single coincidentally signals from the inverse output of the trigger 5 and 11ts-1 first output of the bridge amplifier 11 (all keys whose initial been closed) with the signal output unit 9 matches. Switch 4 transmits a signal J to its first output W-1, due to the presence at its first control input of a single signal from the output of block 7 delay. The U-1 signal with PWM is supplied to the control of the .11—3 bridge amplifier 11.

The control of the transistor 11-2 of the bridge amplifier 11 is served unlocking potential 1) b from the output of the trigger 6. As a result, the transistor 11-2 is open (ip-g), and the transistor 11-3 works with PWM (ϋιι-ι) and to the input The low-pass filter 12 is applied to the impulse sequence ц. corresponding to the amplified signal C.

In this way, the amplifier works up to the point in time and the polarity of the control input signal changes and. At this point in time (t v), the signal I at the output of the sensor 2 polarity of the input signal changes to zero (i takes a zero value), which causes the trigger 6 to switch to the zero state (Tse) and close the transistor 11 -2 of the bridge amplifier 11 (Tsts- d).

Simultaneously, the S'g signal is switched by the adder 3, and a signal and ι-r are transmitted to its output from the second output of the push-pull pulse-width modulator 1 with inversion (J). coming through comm. 1660132

torus 4 (ΙΜ-ι) to control the transistor

11-3 bridge amplifier 11.

With some delay, the single signal from the inverted output of the trigger 6 through the delay block 8 arrives at the second control input of the switch 4, with the result that the signal from the PWM (114-2) from its second output goes to the control of the transistor 114 of the amplifier 11. At the same time, the input current is 1 c The low-pass filter 12, previously flowing from the second output 15 to the first output 14 of the bridge amplifier 11 (through transistor 11-2 and transistor 11 -3 or diode 11 -5), is closed through diode 11-8 and opened with an inverse PWM signal transistor 11-3 ( forming a zero voltage 11c at the input of the low-pass filter 12), or a diode 11-8 and diode 11-5 (when the transistor 11-3 is closed, forming a pulse and 11 negative polarities at the input of the low-pass filter 12). At this time interval (from ίι to change the sign of the current 1c)) voltage LP is applied to the input of the LPF 12 corresponding to the signal from the PWM (and 1-2), unlike the prototype device (in which during this time interval the input of the LPF 12 a continuous impulse is applied and 11 is the duration of To of negative polarity without PWM).

When the input current is reduced! C of the low-pass filter 12 to zero, the diode 11-8 closes and a positive potential of the eggs forms at the second output 15 of the bridge amplifier 11 (close to half the supply voltage E of the bridge amplifier 11), resulting in a positive potential at the output of the coincidence unit 10 ΙΙ10, switching the trigger 5 to one state (ΙΙ5), which, in turn, leads to the opening of the transistor 11-1 of the bridge amplifier 11. The zero signal from the inverse output of the trigger 5, passing without delay to the first input of the switch 4, stops the giving its input signal 1) from the first output (1) 4-1) of the switch 4 and the input of the transistor 11 3 of the bridge amplifier 11. Moreover, due to the presence of a delay (trigger 6 in the zero state, as noted earlier) at the output of unit 8 the input of the transistor 11-4 of the bridge amplifier 11 receives the signal 1) 4-2 with PWM, corresponding to the negative half-wave of the amplified signal II, from the second output. (1) 1-2) of the two / g pulse pulse-width modulator 1. As a result, negative voltage 11c with PWM is applied to the input of the low-pass filter 12.

In this way, the circuit works up to the moment 12 the polarity of the input signal changes, and the positive potential of the input signal appears at the output of the sensor 2 polarity 6) 2- As a result, the trigger 5 is transferred to the zero state (1.5) and the transistor 11-1 of the bridge amplifier 11 closes, and from the second output of switch 4, an id-2 signal is removed with an inverse signal with a PWM 11-1-1 (as a result of switching the controlled adder 3 with the signal i and switch 4 with the signal from the output of the delay unit 7. At the same time, the input current 111 LPF 12 Che flows cut diode 11-7 and transistor 11-4 (during a pause in signal 1) ι-ι at the output of a push-pull pulse-width modulator 1) or diode 11-6 (during a pulse in the signal), resulting in the input of the low-pass filter 12 voltage E) ts of positive polarity is applied, which corresponds to the PWM from the output of the push-pull pulse-width modulator 1 () ι-ι). The circuit works in this way to reduce the input current 1c low pass filter 12 to zero. When the current Iΐι stops at the input of the low-pass filter 12, the diode 11-7 of the bridge amplifier 11 closes, causing an increase in potential ΙΙ11-1 at its first output 14, the appearance of a signal at the output of block 9, coincidence, and the switching of trigger 6 to one. Next, the circuit works as described above when amplifying a positive input signal II and a positive input current 1c of the low-pass filter 12.

Thus, regardless of the phase shift of the input current 1c of the low-pass filter 12 relative to the input voltage K, the output of the bridge amplifier 11 (input of the low-pass filter 12) generates a bipolar voltage Tsz, which fully corresponds to the signals from the PWM (1.1-1 and 1.1-2) to the output of the push-pull pulse-width modulator 1,

The nonlinear distortions of the proposed controlled push-pull key generator are smaller than those known, by providing control of the transistor switches of the bridge amplifier during the time intervals between the polarity of the input signal and the input current of the low-frequency filter.

Claims (1)

Claim Managed push-pull key generator containing a push-pull pulse-width modulator, input polarity sensor, bridge amplifier, low pass filter, two-pulse pulse width modulator input connected to a control bus, and an additional output to the input amplifier of the bridge polarity signal, first and second outputs of the bridge amplifier connected to the lowpass filter inputs, the outputs of which 1660132 connected to the output tires, characterized in that, in order to reduce nonlinear distortion, a controlled adder, a switch, the first and second triggers, the first and second blocks of coincidence, the first and second blocks of delays are entered into it. The first and second signal inputs of the controlled adder are connected respectively to the first and second signal outputs of the push-pull pulse-width modulator, and the control input to the output of the input polarity sensor, the switch input is connected to the output of the controlled adder, the input of each delay unit is connected to the first output of the corresponding trigger and the output is with the corresponding control input of the switch and the first input of the corresponding match block, the second input each of which is connected to the corresponding output of the bridge amplifier, the first input of which is connected to the second output of the first trigger, and the second input to the second output of the second trigger, the third and fourth inputs of the bridge amplifier are connected to the corresponding output of the switch, the first installation inputs the flip-flops are connected to the output of the input polarity sensor, the second setup input of the first flip-flop is connected to the output of the second coincidence unit, the second setup input of the second flip-flop is connected to the output of the first about block matches. L-L ΠΠΓΊΠΠ P P II niche 0 ₂ Oz 0ε About "4-2 rod P. tlgtp 1g ~ tp-gl. -HZ-1GTP..L ίΐ _ ^^ g ^ g ^^ ίr ^ _τ ^ / Pg ~ 1pg.pn g - ΐΓΐ 0 5 zoogsp. "(AND CP.PPP and pptppsgatpp "pg oh oh Od Pli yapppp p En llipgp pp Submarine P p plpp 2