SU1601619A1 - Discrete data transceiving system with resolving feedback - Google Patents

Abstract

The invention relates to information transmission systems and can be used in the construction of computer networks. The aim of the invention is to increase speed. The system contains two similar transceiver semi sets, each of which contains an element OR 1, registers 2, 3, a service information formation unit 4, including a counter 5, a subtraction unit 6, a comparison unit 7, a code setting device 8, an AND 9 element, a group of elements OR 10 , encoder 11, memory block 12, comparison block 13, code setting device 14, AND 15 element, decoder 16, OR 17 element, transmitter 18 connected to the first communication channel 19, second communication channel 20, receiver 21, block 22 error detection, connected to the second communication channel 20. The system allows to transmit information in bundles of 7 frames each more without receiving confirmation of them

at the same time, upon receiving the "Repeat information frame" frame, the information frame is retransmitted immediately. 1 hp f-ly, 1 ill.

Description

The invention relates to information transmission systems and can be used in the construction of computer networks. " J

The aim of the invention is to increase performance "

In the system of transmission and reception of discrete information with decisive feedback, containing the first receiving and transmitting half-set, which consists of an OR element, a register, an AND element, a memory unit, a transmitter, a communication channel and a receiver, and a second Cryo-transmitting half-set, which is 15 | ? the second consists of an OR element, a register, an AND element, a transmitter, a communication channel 1, an error detection unit and a receiver, are additionally entered: in the first transceiver half-set 20 error detection unit, in the second transceiver half-set - memory unit , in each transceiver half-set - a code generator, a comparison unit, an OR element, a decoder, a register, an auxiliary information generation unit consisting of an encoder, a counter, a subtraction unit, a code generator, a comparison unit, an AND element, and an OR element ^ 30 ” ί The drawing shows a structural diagram of a system for transmitting and receiving discrete information with a decisive rev. military communications »

The system contains two similar 35 transceiver half-sets, each of which contains an OR 1 element, first and second registers 2 and 3, an overhead information generating unit 4, including a counter 5, a subtraction unit 40, a comparison unit 7, a code setter 8, an element AND 9, a group of 10 OR elements and an encoder 11, a memory unit 12, a comparison unit 13, a code adjuster 14, an And 15 element, a decoder 16, 45 a second OR element 17, a transmitter 18 connected to the first communication channel 19, the second communication channel 20 receiver

21. and an error detection unit 22 connected to a second communication channel 20, 50

The system works as follows "

The information block (K-element combination of information symbols) through the first input of the OR element 1 is fed to the first input of the first register 2, the second input of which is supplied with the service information generated by the service information generation unit ”

Each frame of information consists of a block of information and service information. ”Service information is generated on the basis of information received by the service information generation unit 4 from the second and third outputs of the first register 2 and from the first, second and third outputs of the second register 3” Each part of the service information ( transmitted information frame number _} received information frame number and transmission frame code) is recorded independently in a separate part of the first register 2; for which a group of 10 elements is used OR "The information that the next frame of information is being generated comes from the second output, ^ the first register to the input of the counter 5, which counts the information frames" Subtraction block 6 determines the number of transmitted and unconfirmed frames (window width), subtracting from the number of the transmitted information frame, the number of the confirmed information frame, information about which comes from the third output of the second register "For the implemented device, the window width is seven" Number of transmitted x and unacknowledged frames compared in the comparison unit 7 to a value located in the adjuster 8 code. If these values are unequal, then the number of the next information frame from the counter output through the AND 9 element and through the group of 10 OR elements goes to the first register 2 "The first register through the group of 10 OR elements also receives information about the number of the received information frame from the second register 3" In addition, the first frame 2 through the group of 10 elements OR receives the code of the transmission frame from the output of the encoder 11 "The latter determines the code of the transmission frame based on the information about the previous transmission frame coming from the first register 2, and Formation of the received frame coming from the second register 3.

The message for transmission is formed as follows »A certain number of bits in register 2 is allocated to the information block, in addition, a certain amount is allocated

I

16 (digits for overhead information "In this connection, it is assumed that a certain time interval is allocated for writing to register 2" These signals are received from the outside, as are the control signals for reading "The generated transmission frame is sent to memory unit 12” Moreover, depending on the frame number coming from register 2 to the memory block 12, the information block is recorded in this area of the memory block 12, which corresponds to the frame number. ”The generated transmission frame from the register is transmitted simultaneously to the transmitter 18, which transmits the frame to communication channel 19.

At the reception, the frame from the communication channel 20 enters the receiver 21 and to the error detection unit 22 "If the error detection unit 22 considers that the frame is received without errors, then the received frame is recorded in the second register 3" Comparison unit 13 compares the code of each receiving frame received from the second register 3, with the code adjuster constant 14 corresponding to the frame Repeat the information frame "If these values are equal, then the number of the required frame from the second register through element 15 enters the input of the decoder 16" From the specific output of the decoder 16 the signal Exposure to the corresponding area of the storage unit 12, from which the information block via the OR gate 17 is input to OR gate 1, at the same time made to the input information block Incoming blocking systemic ₄ q threads of

Thus, the system allows. transmit information in batches of seven frames in a row, without receiving confirmation on them, and, at the same time, upon receiving the frame. Repeat the information pad immediately retransmits the information frame. Frame Repeat the information frame is formed if the sequence is violated when receiving 59 information frames ”

When confirming the frame, the decoder 16 does not provide the address of the corresponding cell of the memory unit 12 and, thus, 55, the information from the corresponding cell of the memory unit 12 is erased "The system is synchronized by clock pulses"

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Claims (2)

Claim 1 "A system for transmitting and receiving discrete information with decisive feedback, comprising a first transceiver half-set, which consists of a first OR element, a first register, an AND element, a memory unit, the information input of which is combined with the transmitter input, the output of the latter is connected to the input of the first communication channel, the receiver, the input of which is connected to the first output of the second communication channel, the second transceiver half-set, which consists of the first element OR, the first register, element And, the receiver, information 2Q the first input of which is connected to the first output of the first communication channel, an error detection unit, the input of which is connected to the second output of the first communication channel, the output of the error detection unit is connected to the control input of the receiver, the transmitter, the output of which is connected to the input of the second communication channel, characterized in that, in order to increase the speed of operation, an error detection unit is introduced in the first transceiver half-set, a memory block is inserted in the second half-transceiver half-set, in each transceiver half-set there are entered to the code 35 comparison unit, second OR element, decoder, second register, service information generation unit, in the first transceiver half-set, the input of the error detection block is connected to the second output of the second communication channel, the output of the error detection block is connected to the control input of the receiver, in the second transceiver half-set is the information input of the memory unit is combined with the input of the transmitter, in each transceiver half-set, the output of the receiver is connected to the input of the second register, the output of the first OR element is connected to the first input at the first register, the first output of which is connected to the transmitter input, the second and third outputs of the first register are connected respectively to the first and second inputs of the service information generation unit, the third, fourth and fifth inputs of which are connected respectively to the first, second and third outputs of the second register, the first and second outputs of which are connected to the first inputs of the comparison unit and the element And, respectively, the output of the code generator is connected to the second input of the comparison unit $, the output of the comparison unit is connected to the second at the input of the element And _(| you [whose path is connected to the input of the decoder whose outputs are connected to the corresponding control inputs of the memory unit, the corresponding outputs of which are connected through the second OR element to the first input of the first OR element, the second input of the first 15 '' OR element of each transceiver half-set is the corresponding information input of the system, the fourth output of the second register of each transceiver half-sample is the corresponding information output of the system ” 2 "Pop system" 1, distinguishing me with the fact that .. the service information generation unit contains an encoder, counter, subtraction unit, code generator, comparison unit, AND element, OR element, first encoder input, counter input, second input encoder, the first input of the subtraction unit, the first input of the OR element are respectively the first to fifth inputs of the service information generating unit, the output of the encoder is connected to the second input of the OR element, the output of the counter is connected to the first input of the AND element and the second input of the subtraction unit, the output of the last it is connected to the first input of the comparison unit, to the second input of which the output of the code generator is connected, the output of the comparison unit is connected to the second input of the AND element, the output of which is connected to the third input of the OR element ^ whose output is the output of the service information generating unit