SU1589265A1 - Device for information input - Google Patents

Abstract

The invention relates to computing and can be used in image processing systems for inputting visual information into computers. The purpose of the invention is the expansion of the field of application due to the possibility of additional programming of the operating modes of the device. The device contains an information reading unit 1, a gating unit 2, a mating unit 3, two pulse generators 4, 5, comparison blocks 8-12, registers 16-20, counters 21-23 and triggers 27-29. The purpose of the invention is achieved by introducing an additional two blocks of comparison, a pulse generator, two registers, a counter and a trigger. An additional generator generates clock pulses that determine the frequency of the video signal in the gating unit. Comparison units determine when the boundaries of the previously defined computer area in the image frame are reached. 4 il.

Description

The invention relates to computing technology and can be used in systems for inputting visual information into electronic computing machines.

The invention is intended to expand the field of application of the device by providing the possibility of additional programming of the modes of operation of the device.

 Fig. 1 shows the functional layout of the input information device; FIG. 2 is an example of a particular ijioro implementation of an information reading unit; FIG. FIG. 3 is an example of a specific implementation of a gating unit; FIG. 4 is an example of a window configuration on a Television frame from which information input is deactivated. ; The device for inputting information (Fig. 41) contains an Information reading block 1, a gating block 2, a conjugation unit 3, a first pulse generator A, a second pulse generator 5, a third pulse generator 6, a frequency divider 7, a first comparison unit 8, a second block 9 comparison, third comparison block 10, fourth comparison block 11, fifth block. 12 comparisons, the first driver of 13 pulses, the second driver of 14 pulses, the third driver of 15 pulses, the first register 16, the second register 17, the third register 18, the fourth register 19, the fifth register 20, the first counter: 21, the second counter 22 the third counter 23, the first element And 24, the second: element And 25, the third element And 26,; the first trigger 27, the second trigger 28, the third trigger 29, the first 30, the second 31, the third 32, the fourth 33, the fifth 34 inputs for setting device operation modes, device launch input 35, device information input 36, readiness output 37 the trials.

The information reading unit 1 (FIG. 2) contains a cathode ray tube 38, a video amplifier 39 and a video monitoring unit 40.

Unit 1 reading information works as follows.

The visual image is converted by the transmitting cathode-ray tube 38 into a video signal, which from the output of the cathode-ray tube 38 enters the input of a video amplifier 39, which amplifies the incoming video signal. From the first output video amplifier 39

The video signal is fed to the video monitoring unit 40, where information is displayed. From the second output of the video amplifier 38, the video signal is output to the information reading unit 1. The television scan rate is set by personnel and lower-case pulses, arriving respectively through the first and second synchronizing inputs of the block, 1 reading information to the inputs of the cathode-ray tube 38

The gating unit 2 comprises a voltage source 41, an analog-to-digital converter 42, and a key 43.

Gating unit 2 operates as follows.

The video signal coming to the input of the gating unit 2 is fed to the input of the analog-digital converter

42, where 13 according to the TI received via the synchronization input of the gating unit 2 to the clock input of the analog-digital converter 42, the signal is converted into a digital code present at the output of the analog-digital converter 42, the dynamic range of the analog-digital converter is set source 41 of the reference voltage.

The codes corresponding to the skinny values of the video signal are present at the input of the key 43 and according to the signal coming through the control input of the gating unit 2 to the control input of the key

43 are transmitted to the output of gating unit 2. At the same time, if Log.1 is present on the control input, the key 43 is open, otherwise it is closed.

Interface unit 3 may be implemented on the basis of commercially available input / output devices for a computer. Its specific application depends on the type of computer used. For example, for a widely used microcomputer, Electronics MS 1201.02, as a conjugation unit, can be used a commercially available I2 Parallel Exchange Device or similar devices (for example, those with direct memory access mode),

The information input device operates as follows.

5158926

Before entering information through the second input 3 of the setting of the device operation modes into the second register 17, an entry is made from the computer starting code determining the line number of the television sweep from which it is necessary to start entering information, the first input 30 of the setting of the device operation modes into the first register 16 is recorded from computer code

ten

S, which determines the number of the television sweep line, on which it is necessary to finish entering the information, through the third input 32 of the modes of operation of the device in the third register 18 is recorded from the computer P code defining the number of lines the information from which will be entered into the computer during scanning one code, through the fourth input 33 of setting the modes of operation of the device into the fourth register 19, a record is made from the computer code L | that identifies the element number on the line from which the input information will begin; Via the fifth input 34 of the assignment of the modes of operation of the device to the fifth register 20, an entry is made from the computer code L, which determines the number of the element on the line on which the input and information will end.

The values of the codes S, S, L, con are determined on a television frame (FIG. 4), from which

window

re

information is entered, and the P code determines the width of the band that will be entered from this window during the scanning time of one frame.

Naturally, it is necessary that the following conditions be fulfilled:

 but (h koi and L Hdw b koi

CodesS g, S CDC, L

Nych

L

con

recorded in the first, second, third, fourth, and fifth registers are present: S | - at the output of the first, S - at the output of the second, P - at the output of the third; q "q at the exit of the fourth, L end

the output of the 5th registers 16-20 and they receive: code S ds - to the first input of the second comparison unit 9, code S c - to the information input of the first counter 21, code P - to the first input of the third comparison unit 10, Lc code to the first input of the fourth Comparison unit 11, code L - at the first input of the fifth Comparison Unit 12.

0

five

0

ABOUT

five

In the 1-out state, the first, second and third triggers 27-29 are reset and Log is present at their inputs. Since the output of the first trigger 27 is the device ready output 37, the device is present in the initial state at output 37 of the device. The second one signals that the device is ready for operation.

When the computer is ready for operation, it generates a start signal, which comes through the input 35. the device starts up to the installation input of the first one and the installation input of the second flip-flops 27, 28. This signal sets the first and second triggers 27, 28 and Log.1,

From the output of the first trigger 27 Log.1 goes to the second input of the second. element And 24 and the output 37 of the readiness of the device. Log.1 at output 37 indicates that the device has started and is entering information.

From the output of the second trigger 28 Log.1 arrives at the second input of the second element And 24.

The visual image received by block 1 of information reading AND converted into analog video signal comes from the output of this block to the information input of block 2 of strobe.

In gating unit 2, the analog time signal sampling and amplitude quantization procedures are performed. In this case, time sampling is conducted in accordance with the frequency of clock pulses (TI) arriving at the synchronizing input of gating unit 2 from the output of the third generator 6 im Puls, i.e. each TI corresponds to one video sample (or one image element per line). Amplitude quantization is an analog-to-digital conversion of 0 video, at which each

The image element is assigned a binary code proportional to the brightness of this element of the image.

The second pulse generator 5 generates line synchronization pulses from the first output of the second pulse generator 5 to the second synchronization input of the readout unit 1

five

0

five

five

information, from the second output of the generator 5 to the input of the frequency divider 6, from the third output of the generator 5 to the reset input of the third counter 23. The operation of the second generator 5 of pulses is synchronized with the TI supplied to the input of the generator 5 from the output of the third generator 6 of pulses. Impulse sync rows, act

at the reset input of the third counter 23, sets this counter to a position where Log.O. is present on all its bits.

Frequency divider 7 is made in the input of the counter, which changes its state upon arrival at its input of each row synchronization pulse. The bits of this counter are present at the second output of the frequency divider 7 and are fed from this output to the first input of the first comparison unit 8. At the moment when the Log.O signals appear at all bits of the splitter counter, a pulse arriving at the input of the first generator of 4 pulses is generated at the first output of the frequency divider 7.

The first generator of 4 pulses on arrival at its input of a pulse from the first output of the frequency divider 7 produces a frame synchronization pulse, which from the first output of the first generator A of pulses goes to the first synchronizing input of the information acquisition unit 1, and from the second output to the setup input of the second counter 22 and the first input of the second elmenta 25.

The frame synchronization pulse, which arrives at the installation input of the second counter 22, sets this counter to a position where Lr.O. is present on all its bits. The state of the bits of the second counter 22 from the output of this counter is fed to the second input of the third unit 10 of the comparison.

Since Log.1 is present at the second input of the second element AND 25 (the second trigger 28 is set), the frame synchronization pulse arriving at the first input of the second element 25 appears at the output of this element and comes from the output of the second element And 25 at the entrance of the record: the recording of the first counter 21.

Upon arrival of the pulse at the input of the first counter recording, 21 bits

This counter is set to the position corresponding to the code 8c „„ present on the information input of the first counter 21. The bit state of the first counter 21, i.e. The btsdc code from the output of this counter goes to the second input of the first and second input of the second blocks 8, 9 - of the comparison.

The first, second, third, fourth, fifth comparison blocks 8-12 work so that if the information on one input of the comparison block coincides with the information on the other input, then the output of the comparison block is Log.O, otherwise the output of the block Comparison Log.1 is present,

Then at the moment after the arrival of the frame synchronization pulse, Log.1 is present at the output of the first comparison block 8, since the first input of this block contains the code O

a: on the second - code S

HOrW "

at the exit

The second comparison block 9 contains a Log, 1, since the first input of this block contains the code S p, and the second input contains the S code, the output of the third comparison block 10 contains Log.1, since the P input is present at the first input of this block , and on the second, the code O, at the output p of the fourth comparison block 11 there is L6g.1, since the first input of this block contains the code Lj, (j (i,, and, on the second, the code O (the third counter 23 is reset) , Log.1 is present at the output of the fifth block of comparison 12, since the first input of this block contains the code of the second — the code O.

The signals from the outputs of the first and second blocks 8, 9 of the comparison are received respectively at the inputs of the first and second formers 13, 14 pulses, from the output of the third comparison block 10 to the input of the third driver 15 pulses and the third input of the first element I 24, ac of the fourth and p That comparison units are respectively at the installation input and the reset input of the third trigger 29.

Thus, at the time after the arrival of the frame synchronization pulse at the inputs of the first, second and third drivers 13-15 pulses, the third input of the first element And 24, the installation input and the reset input of the third I

ten

trigger 29 is present Log.G.

Every sync pulse. the rows, the counter entering the frequency divider 7, is incremented by one, and the state of this counter is fed to the first input of the first comparison unit 8. This happens until the code S is not received at the first input of the first comparison unit 8, after which the signal at the output of the first comparison unit 8 takes the value

Log.O, which is fed to the input of the first shaper 13 pulses.

When a signal passes at the input of the first and second shaper of 13 pulses from Log.On this farmer generates a pulse that comes from the output of this shaper to the first input of the first element I 24, and, since the second and third inputs of this element into this the moment is present Log, (the first Trigger 27 is installed and at the output of the third block 158926510

  the code on its output, which is proportional to the speeds of the current points, is depicted (as mentioned above, each TI corresponds to one image element

The codes for the output from the block. gating is fed to the input of the interface 3 and through the information output 36 of the device are entered into the computer,

This happens until the third counter 23 counts to a value whose code arrives at the second input of the fifth comparison unit 12, after which a Log, 0, appears at the output of the third block, which arrives at the reset input of the third trigger 29 , clears this trigger and Log.O. appears at its output. The signal Log, 0, is outputted from the output of the third trigger 29 to the control input of the gating unit 2, and sai stops passing the pixel codes. In this case, the entrance to the computer

thirty

As 10 comparisons are present, Log, 1), 25 grows, then the pulse produced by the first driver of 13 pulses passes on the output of the first element 24 and enters from this output to the counting input of the first counter 21 and the counting input, the second counter 22, and at the second input of the third element And 26,

The third element And 26, when a pulse arrives at its second input from the first element And 24, passes the TI, which arrives at its first input from the output of the third generator 6 pulses, and these TIs pass to the counting input

third counter 23, counter 23- .. "......... p

therefore, it counts TI, and the code, corresponding to Q lines, resets the third counter 3 and the corresponding number of passed ones increases the counter-divider 7 into single pulses, are present at the output of counter 23, arriving from its output

35

Thus, image element codes are entered into the computer, located 1 plx on the line with the number S „„ „and having the numbers from b„ „, up to this line.

By the time of arrival of the next synchronization pulse of the lines on the frequency divider 7 input, the first counter 21 has a state of 5 "d1.4-1, the second state counter is one, and the output of the first comparison unit 8 has LogG" (since the counter included in the frequency divider 7, S д d),

Next sync pulse

To the left, the code 8 "|., and + 1, the first driver of 13 pulses

on the second inputs of the fourth and fifth blocks 11, 12 comparison. At the moment when the counter 23 counts to the code "the output of the fourth comparison block 1 1 according to Wits Log.O (since the first output of the comparison block 11 contains the code L recorded in the fourth register 19), which arrives at the installation input of the third flip-flop 29 , sets this trigger, and Log, 1 appears at the output of this trigger. I

The log, from the output of the third trigger 29, enters the control input of the gating unit 2 and enables the output 10

, g 926510

the delivery of codes to its output, which are proportional to the speeds of the current image points (as mentioned above, each TI corresponds to one image element).

The codes for the output from the block. gating is fed to the input of the interface 3 and through the information output 36 of the device are entered into the computer,

This happens until the third counter 23 counts to a value whose code arrives at the second input of the fifth comparison unit 12, after which a Log, 0 appears at the output of the third block, which arrives at the reset input of the third trigger 29, resets this trigger, and Log.O. appears at its output. The signal Log, 0, is outputted from the output of the third trigger 29 to the control input of the gating unit 2, and sai stops passing the pixel codes. In this case, the entrance to the computer

25 increments

thirty

25 increments

 .." .........P

Q rows resets the third counter G and increments the counter-divider 7 by one

35

Thus, image element codes are entered into the computer, located 1 line on the line with the number S „„ „and having the numbers from B„ „, up to this line.

By the time of arrival of the next synchronization pulse of the rows on the input of frequency 7, the first counter 21 has a state of 5 "d1.4-1, the second counter of the state is one, the output of the first comparison unit 8 is LogG" (because the state of the counter , the frequency divider 7, still S „d),

Next sync pulse

 Q rows resets the third counter G and increments the counter-divider 7 by one

To the left, the code 8 "|., and + 1, the first driver of 13 pulses

g5 forms the impulse, which the passage through the first element I 24, increases the first and second counters by unit I; permits the passage of TI through the third element And 26, the third counter

0 23 counts to code 1 but (the third trigger is set to 29, and until the third counter 23 counts to

L code

con

There is an input in the computer

55

the pixel codes from the "" h number of the L, after which the third trigger 29 is reset and input into the computer is stopped. Thus, information is entered into the computer from the line with the number, and only 11 are entered.

1589265

image elements from the L number of the unit code to the L number of this line.

This continues until the input of the second counter 22, which counts the number of lines entered in the computer from one frame, is not reached by the P code. After the appearance of this code (and it buys the second input of the third comparison unit 10) of this block, cp | avneni is set by the Log, O, which is supplied to the input of the third forwarder of 15 pulses and to the third in the first element And 24,

I Moreover, since the signal at the input of the third driver 15 pulses the value from Log, 1 to, Log, O, this pulse driver produces a pulse, which from the driver output enters the reset input4 of the second trigger 28, Second trigger 28 is reset by this pulse and nf its output appears a Log.O, which is fed to the second input of the second element, And 25, By this time, the second output of the divider .7 frequencies P1 | there is an exit code of the first counter 21 - a code,

 The next row synchronization pulse increases the counter entering frequency equalizer 7 by one, while the first driver of 13 pulses produces a pulse arriving at the first element of the first element 24, but at the output of this element pulse it comes in, since at the third input of the first element I 13 there is a Log. About coming from the output of the third block, Yu comparison. Therefore, the first and second with the setters 21, 22 are no longer incremental, the TIs through the element AND 26 are not passed and the information in the computer through the gate 2 is not passed.

Thus, in the process of scanning this frame, the computer received information starting from the line with the number S up to the line with the number, we will accept the elements having the numbers from L to B. Con Next the frame synchronization pulse generated by the first generator of 4 pulses is fed to the setup input The second counter 22 and the first input of the second element And 25, This pulse sets the second counter 22 to the O position, but the output of the second element And 25 does not pass. dit, since on the second entry of this

five

five

0

I 2

element is present. Log.O (the second trigger 28 is reset) ,.

Since at this moment different codes are present at the first and SECOND inputs of the third comparison unit 10 (code P is on the first code and code O is on the second), the output of this comparison block is Log, 1, coming to the third input of the first element And 24,

In the process of scanning this frame, information is also entered into the computer from the P lines, with each line starting from the L number to the L number. The device operation when entering these lines is similar to that described above with the only difference that the input starts when the counter - the delimiter 7 is calculated to the code, and ends when the state of the counter becomes 8 dts + P + P-1, t, e, the information from the line with the number S f, o; 4 P D ° of the line with the number S is entered + 2P-1 inclusive. At the same time, as described above, when entering each line, the gating unit 2 passes only the pixels from the L number to the L number to the output,

In the process of scanning the next frame, information is entered from the next P lines and t, d, until the state of the first counter 21 becomes S,

35

S code,

con

40

, j, appearing at the output of the first counter 21, is fed to the second input of the second comparison unit 9, and since the first input also contains the code S, recorded in the first register 16, then at the output of the second comparison block 9 the signal changes the value from Log, 1 to Log, 0, with this, the second driver of 14 pulses generates them,

ds pulse arriving at the reset input of the first trigger 27. The first trigger 27 is reset by this pulse and Log appears at its output, 0, which arrives at the second input of the first element I.24, prohibiting further information input into the computer, and output 37 the device is ready to signal that information entry has been completed.

Thus, for the cycle of operation of the device, information is entered into a computer from a window on a television frame (FIG. 4) limited by the values of L ,,,, L p "in columns and the values of S nd1, S in rows, and during the scan

One frame is entered with information from P lines.

To resume operation of the device, it is necessary to record new values.

beginning con and h con, P, respectively, in the second, first, fourth, fifth and third registers 17, 16, 19, 20, 18 and give a trigger pulse to the device start input 35.

Claims (1)

Invention Formula An information input device comprising an information reading unit, a gating unit, a interface unit, the first and second pulse generators, a frequency divider, the first second and third comparison blocks, the first, second and third pulse shapers, the first, second and third registers, the first and the second counters, the first and second triggers, the first and second elements AND, the output of the information reading unit are connected to the information input of the gating unit, the output of which is connected to the input of the interface unit whose output is information The first and second synchronization inputs of the information reading unit are connected to the first output of the first and first outputs of the second pulse generator, respectively; the input of the frequency divider is connected to the second output of the second pulse generator; the first and second outputs of the frequency divider are connected respectively to the input of the first pulse generator and the first the input of the first unit of comparison, the second output of the first pulse generator is connected to the input of the installation of the second counter and the first input of the second element And, the output of the first counter is connected to the second inputs of the first and second comparison blocks, the outputs of the first and second comparison blocks are connected respectively to the input of the first and second pulse formers, the inputs of the first, second and third registers are respectively the first, second and third job inputs operating modes of the device, the outputs of the first, second and third registers are connected respectively to: the first input of the second comparison unit information input of the first counter and the first input of the third comparison unit, the second input of which is connected to the output of the second counter, and the output is connected to the input of the third pulse generator and the third input of the first element I, the first input of which is connected to the output of the first form Q pulse generator, the output of the second and the output of the third pulse shaper is connected respectively to the reset input of the first and second triggers, whose installation inputs are the device start input, the output of the first trigger is connected to the second The first input of the first element I is the device ready output, the output of the second trigger is connected to the second input of the second element I, the output of which is connected to the recording input of the first counter, the output of the first element I is connected to the counting inputs of the first and second counters, different that, in order to expand the field of application of the device by providing the possibility of additional programming of the modes of operation of the device, the fourth and fifth registers, the fourth and fifth blocks were added to it the third counter, the third pulse generator, the inputs of the fourth and fifth registers are the fourth and fifth inputs of the device, and the outputs are connected respectively to the first inputs of the fourth and fifth 0 comparison units, the second inputs of which are connected to the output of the third counter, and the outputs, respectively, with the installation input and the reset input of the third trigger, the output of which 5 is connected to the control input of the gating unit, the output of the third pulse generator is connected to the clock input of the gating unit, the first input of the third I element and the input of the second pulse generator, the third output of which is connected to the reset input of the third counter, the counting input of which is connected to the output of the third element And, the second entry of the third element And is connected to the output of the first element I. five Exercise bkad o yach L. FIG. four Compiled by A. Trunov Editor A. Makovska Tehred L. Serdyukova Proofreader S. Cherni Order 2541 Circulation 57A VNIIPI State Committee for Inventions and Discoveries at the State Committee on Science and Technology of the USSR 113035, Moscow, Zh-35, Raushsk nab. D 4/5 koi Start + p NIS + 2P Subscription