SU1456946A1 - Device for output of information to graph plotter - Google Patents

Abstract

The invention relates to the field of automation and computer technology and can be used to output information to a plotter. The purpose of the invention is to increase the speed of the device. This goal is achieved in a device containing a serially connected counter, a first digital-to-analog converter (DAC) and a first operational amplifier (DCP), as well as serially connected second D / A converter and a second DSP, the outputs of a DSP connected to control inputs of the plotter, elements, and elements NOT, the outputs of which are connected to the inputs of the forward and reverse counts of the reversible counter, the register, the clock pulse generator and the first comparator, by additionally introducing a control tel frequency, a trigger, a second a comparator, an arithmetic unit, the first and second elements AND, the first and second elements OR. The speed of the device is increased due to the fact that the output of the control voltage to the plotter is organized in a stepwise linear fashion, moreover, at the beginning with a high rate of change, and at the end - with a limited one in order to minimize the inertia of the pen mechanism. 2 Il. with (l jlii sd

Description

I

The invention relates to automation and computing and can be used to output information to a plotter.

The purpose of the invention is to increase the speed of the device.

Figure 1 presents the block diagram of the device; Fig. 2 shows the curves for the operation of the device.

The device contains a counter 1, the output of which is connected via the first digital-to-analog converter 2 and the first operational amplifier 3 to the input X of the plotter 4. The counting input of the counter 1 is the control impulse recording device and is also connected to the reset input of the trigger 5 and the control input of the register 6. The output of the trigger 5 is connected to the control input of the controlled frequency divider 7, the clock input of which is connected to the output

generator 8 clock pulses. The output of the frequency divider 7 is connected to the inputs of the first and second elements AND-ИЕЕ 9 and 10, the outputs of which are connected respectively to the direct and inverse inputs of the reversible counter 1 1. The outputs of the reversible counter I1 are connected to the inputs of the second digital-analog converter 12 connected via the second operational amplifier 13 to the input Y of the plotter 4, as well as to the first information inputs of the comparators 14 and 15. The second information input of the comparator 14 is connected to the output of the arithmetic unit 16, the information the input of which is connected to the output of register 6, also connected

ten

clock frequency. Code A recorded in register 6; counting is compared by comparator 15 with code B. reversible counter 11. Comparator 15 generates signals, А В, А V. If А В, the signal generated by comparator 15 permits the passage of clock pulses through AND-HE element 9 to the direct input of the reversible counter 11, and when the clock pulses arrive through the element AND-NOT 10 to the inverse input of the reversible counter 11.

15

The content of the reversing counter, And, increases in the case of A B and decreases as long as the codes A and B become equal. One second information input by the compiler 14 compares the paratotor 1.5. Information inputs are rec- with code A + C or A – C with code B. When

This code c is some consignist 6 are informational. device input. Output Less than the comparator 14 is connected to the second input of the element OR 17, the output is equal to the first inputs of the elements OR 17 and 18, and the output More - to the second input of the element OR 18. The outputs of the elements OR 17 and 18 are connected respectively to the inputs of the elements And 19 and 20. Other inputs of the elements And 19 and 20 are combined with the corresponding inputs of the elements AND-NOT 9 and 10 and connected to the outputs of Bolgaya and Less comparator 15, which are also connected to the control inputs of the arithmetic unit 16. Output Equal to comparator I5 is the output of the Ready signal.

The device works as follows.

In the initial position, the counter 1 and the reversible counter 11 are in the zero state. Upon a command to read information received at the control input of a pulse recording device, the contents of counter 1 are incremented by 1 because it counts the number of selected samples of the displayed signal. Simultaneously pulse Record first count A; information displayed

35

a dummy that determines the accuracy of the pen overhaul of a plotter. 25 l. The value of C is determined by the inertia of the used plotter and directly proportional to it. The bet of A + C or A-C is determined by the arithmetic unit 16 depending on

30 from the ratio A B or A i B at the output of the comparator 15. Moreover, A + C is calculated at, and A – C at A B. If A is C 6 B at A B or A + C 2 B at, then the comparator 14 , elements OR 17 and 18, and elements AND 19 and 20, a signal is generated which, through one or the other input, sets the trigger 5 to the state of one. This trigger is controlled by

lp frequency divider 7 reduces the clock frequency of the reversible counter 11

If codes A and B are equal, the comparator 15 generates a Ready signal, which is the output pulse of the next readout information. At the same time, the signals A and B are reset by the comparator 15, and the clocking of the reversible counter 11 is stopped.

The digital codes of the counter 1 and the reversible counter 11 are converted by digital-to-analogue converters 2 and 12 to continuous signals and via operational amplifiers 3 and 13 post 50

(i is the current count number) is written to register 6. With the same pulse, the Record is also transferred to zero gg, they go to inputs X and Y, plotting state trigger 5, which sets 4. maximum by means of controlled divider 7 clock frequency equal to generator frequency 8

Yrie assisted operating aids-. Lei 3 .i and 13 establishes the required reference scale for the axes X and Y.

clock frequency. Code A recorded in register 6; counting is compared by comparator 15 with code B. reversible counter 11. Comparator 15 generates signals, А В, А V. If А В, the signal generated by comparator 15 permits the passage of clock pulses through AND-HE element 9 to the direct input of the reversible counter 11, and when the clock pulses arrive through the element AND-NOT 10 to the inverse input of the reversible counter 11.

five

a dummy that determines the accuracy of the pen override. Plotting plot of 5 l. The value of C is determined by the inertia of the used plotter and directly proportional to it. The bet of A + C or A-C is determined by the arithmetic unit 16 depending on

0 from the ratio A B or A i B at the output of the comparator 15. Moreover, A + C is calculated at, and A-C at A B. If A - C 6 B at A B or A + C 2 B at, then the comparator 14 , elements OR 17 and 18, and elements AND 19 and 20, a signal is generated which, through one or the other input, sets the trigger 5 to the state of one. This trigger is controlled by

n divider frequency 7 reduces the clock frequency of the reversible counter 11.

When codes A and B are equal, the comparator 15 generates a Ready signal, which is the pulse of the next sample of read information. At the same time, the signals A and B are reset by the comparator 15, and the clocking of the reversible counter 11 is stopped.

The digital codes of the counter 1 and the reversible counter 11 are converted by digital-to-analogue converters 2 and 12 to continuous signals and via operational amplifiers 3 and 13 post0

gg is fed to the inputs X and Y of the plotter 4.

go to inputs X and Y plotter 4.

Yrie assisted operating aids-. Lei 3 .i and 13 establishes the required reference scale for the axes X and Y.

After the display of the reference (formation of the signal is Ready), the next signal is received Recording, and similarly to the previous one, the display of the next sample is displayed. This process occurs until all the signal samples are read and displayed by plotter A.

When the voltage jumps U; on U ;, (Fig. 2, curve a) the stylus of the plotter 4 performs a motion corresponding to the curve b because of the inertia. Therefore, the displayed sample does not correspond to the voltage difference -uU at the input of the plotter 4 and is characterized by an overshoot error. Reducing the error of the reorientation first digital-to-analog converter and the first operational amplifier, the second digital-analog converter and the second operational amplifier are connected in series, the outputs of the operational amplifiers are connected to the control inputs of the plotter, the register whose information input is the information input of the device, the control of which is connected with a counting counter input, is a signal input device Record, the first comparator, the first KOToftoro output is Exit Device Ready signal, second and third outputs of which are connected respectively to the inputs of the first pervsh

It can be significantly reduced, 20 and the second NAND elements, if the cosi outputs realize the voltage drop output in steps, i.e. with some step q (figure 2, the curve in). However, this would lead to a decrease in the speed of the device.

The speed of the device is significantly increased if the output uU is organized in a step-linear manner, and at the beginning with a high rate of change, and at the end - with limited to minimize the inertia of the pen mechanism (Fig. 2, curve d),

For this, the part of the voltage drop defined by the arithmetic unit 16 and the trigger 5 through the elements OR 17 and 18 and the elements AND 19 and 20 is formed with the maximum rate of change using clocked with the maximum frequency of the generator 8

the clock pulses of the reversible counting are connected respectively to the outputs of the pepper II and the digital-to-analogous God transform and second elements AND, the first

receiver 12. The rest of the voltage drop is formed with a lower rate of change, i.e. with a lower frequency of the oscillator 8, set by the controlled frequency divider 7, using a reversible counter 11 and a digital-to-analog converter 12.

The use of the invention allows to increase the speed of the device, especially at high voltage drops between. two adjacent samples of the displayed signal.

Claims (1)

Invention Formula A device for outputting information to a plotter containing a serially connected counter. which are connected respectively to the inputs of the forward and reverse counts of the reversible counter, and a clock pulse generator, characterized in that, in order to increase device speed, it contains a controlled frequency divider, .. a trigger, a second comparator, an arithmetic unit, the first and second elements are AND, the first is to the second elements OR, the output of the clock generator is connected to the clock input of the controlled frequency divider, the output of which is connected to second entrances the first and second elements are NAND, and the control input is connected to the trigger output, the reset input of which is connected to the signal input Record of the device, and the setup inputs of the sub inputs of which are connected respectively to the second and third outputs of the first comparator, and the second inputs are connected to the outputs of the first and the second element OR, the first inputs of which are connected to the second output of the second comparator, the first and third outputs of which are connected respectively to the second inputs of the first and second elements OR, the output of the reversible counter, is connected to the information input of the second digital-to-analog converter and the first information the inputs of the first and second comparators, the register output is connected to the second information input of the first comparator and the information input of the arithmetic unit, the output of which is 714569468 It is connected to the second informational to the second and third outputs by the input of the second comparator, and the up and down to the first comparator, the corresponding inputs are connected to the corresponding terminal. Avf Alt "/ u.f