SU1387146A1 - Device for independent control of thyristor converter - Google Patents

Description

(21) 3900122 / 24-07

(22) 05/27/85

(46) 04/07/88. Bul № 13

(71) Research Institute of Automation and Electromechanics at the Tomsk Institute of Automated Control Systems and Radioelectronics and Tomsk Polytechnic Institute. S.M. Kirov

(72) C. V. Bolotov, I. A. Gachik, I. A. Januschik, V. A. Gordova, V. P. Perepelitsin, and A. V. Kobzak

(53) 621.316.727 (088.8) (56) Pisarev A. L. Control of thyristor converters. M .: Energie, 1975, p. 182.

USSR Author's Certificate No. 1005266, cl. H 02 M 7/12, 1983.

(54) DEVICE FOR SEPARATE CONTROL OF THYRISTOR CONVERTER

(57) The invention relates to a converter technique and is intended to control the reversing direct current motors of two-zone electric drives. The purpose of the invention is to increase the reliability and improve the weight and size parameters. The switching logic of the thyristors of both groups, the transition from the rectifying mode to the inverter and vice versa, is dried simply and implemented mainly on the digital elements, which increases the reliability of the operation as a whole. This is also facilitated by a tight linkage of the inverter mode control pulses to the moments of phase voltage crossing, blocking - to the reverse command and to the moment of enabling the previously inactive group to switch on, taking into account the time for restoring the lock, their properties of the thyristors, during which they cannot pass interference. 2 Il.

CO 00

four

05

The invention relates to converter technology and is intended primarily for controlling reversing direct current electric motors of two-zone electric drives.

The purpose of the invention is to increase, reliability and improvement of weight and size parameters.

FIG. 1 shows a diagram of the proposed device; in fig. 2 - time diagrams, as shown, his work.

The device (Fig. 1) contains a synchronization unit 1 with a linear voltage of the network, the direct and inverse outputs of which are connected to the first inputs of the first 10

the voltage is differentiated and the positive pulses through the elements of the IS-HE 18 (22) are fed to the control inputs of the thyristors of the converter and the winding flows through the voltage, the current (time ti-12). At the same time, in block 17, rectangular voltages a and a are synchronized with the phase voltage lagging in phase from the linear voltage by 30 °, and voltage a and a are differentiated by chains 15 and 16, through the elements AND-HE 19, 20, 23 and 24, the pulses of the inverter mode do not affect the rectifier mode. In the rectifying mode, when the crucible is opened and the second elements AND-NOT 2 and 3 are corresponding to the 28, through an opto-diode diode, thyristorized, the outputs of which are connected to the first and second inputs of the phase control unit 4, made in the form of series-connected generator and the first input of the comparator unit 6, the second input of which is intended to be connected to a source of control voltage, the blocking unit 7 in the form of three elements IS-HE 8-10, the outputs of elements 8 and 9 are connected to the inputs of the element 10 whose output is connected En with the third input of the unit 6 of the comparison, the first 11, the second 12 and the third 13 of the inverter, the logical switching unit 14, the first output of which is connected to the input of the inverter 12 and one input element

The control current flows continuously, but cannot open, since it is switched on counter. The thyristor 29 at direct current control is a zero diode. When on the thyristor 28 the network voltage drops to zero, it closes, and the thyristor 29 opens at the time of ts under the action of the EMF of the excitation winding, and the current through it slowly decreases until time 1h until the thyristor 28 opens, etc.

The command to reverse (time t4) triggers block 7, the output voltage 26 of which blocks the output pulses of block 4 (node 6 amplifier is saturated and differentiation stops).

IS-NOT 8, the second output - with the input of the inversion Simultaneously, by a command to reverse the protrusion 13 and one input of the element AND-NOT 9, the second input of the element AND-NOT 2, the input of the inverter 11 and the other input of the element AND-NE 8 shaper command for the reverse, the output of the inverter 11 is connected to the second

a mismatch of the signals 27 and Ui2 in the NAND elements and a thyristor 29 is removed, the constant control voltage is removed (the flow of direct current through its diode stops). At the command to reverse with

the input element AND-NOT 3 and other entrances of the thyristors 28 and 29 pulses are removed

the house of the element AND-HE 9, the first 15 and the second 16 differentiating chains, the inputs of which are connected to the direct and inverse outputs of the synchronization unit 17 with the phase voltage of the network, eight elements AND-NOT

of the rectifier mode and the inverter mode pulses remain. As a result, at a negative voltage on the thyristor 28, a current flows counter to the network voltage — a recuperator occurs 18–25, the first inputs of the AND-NE elements are 18-energy, and with a positive half-voltage 22, they are connected to the output of the I-HE unit 19-23 with the output of the differentiating circuit 15, the elements AND-NOT 20 and 24 - with the output of the differentiating

no mains voltage is closed through the thyristor 29, etc., until it drops to zero at time t ,. The voltage and 12 at the moment of time ts changes from the logic chain 16, the AND-HE element 21 with the output of the for-. chesky "1 logical" Oh, and the voltage

Inverter world 11, the second inputs of the elements AND-NOT 18-21 connected to the output of the inverter 1 elements 22-25 - with the output of the inverter 13.

The device works as follows.

Ui3 (permission to turn on the previously inoperative second group) at time instant te after a time delay — on the contrary. At the same time, voltage 26 also changes from "1 to" O,

If there is a network voltage and it is not available, it is unlocked and, with a positive voltage on the thyristor 30 of the second group, the latter is switched on at time t. When the main thyristor 31 is first opened at time t, unit 4 is set to ready mode for the 55 next switch on the reverse command.

Thus, the switching logic of the thyristors of both groups, the transition from the rectification of the blocking signal 26 from block 1, through elements 2 and 3, block 4 receives rectangular voltages ac and ac, one of which passes, according to voltage 27 (27), and during its duration, sawtooth voltage is formed. As a result of comparing the latter with the control voltage U at the node 6, its output is also rectangular.

the voltage is differentiated and the positive pulses through the elements of the IS-HE 18 (22) are fed to the control inputs of the thyristors of the converter and the winding flows through the voltage, the current (time ti-12). At the same time, in block 17, rectangular voltages a and a are synchronized with the phase voltage lagging in phase from the linear voltage by 30 °, and voltage a and a are differentiated by chains 15 and 16, through the elements AND-HE 19, 20, 23 and 24, the pulses of the inverter mode do not affect the rectifier mode. In the rectifying mode, when the thyristor 28 is open, the control current flows continuously through the diode of the optocoupler thyristor 29, but cannot open, since it is switched on opposite. The thyristor 29 at direct current control is a zero diode. When on the thyristor 28 the network voltage drops to zero, it closes, and the thyristor 29 opens at the time of ts under the action of the EMF of the excitation winding, and the current through it decreases slowly until time t3, until the thyristor 28 opens, etc.

The command to reverse (time t4) triggers block 7, the output voltage 26 of which blocks the output pulses of block 4 (node 6 amplifier is saturated and differentiation stops).

Simultaneously, by a reverse command. Simultaneously by a reverse command, the signals 27 and Ui2 in the NAND elements do not coincide and the thyristor 29 is released and the control voltage is removed (the flow of direct current through its diode stops). At the command to reverse with

thyristors 28 and 29 pulses are removed

of the rectifier mode and the inverter mode pulses remain. As a result, at a negative voltage on the thyristor 28, the current flows against the mains voltage — energy is recovered, and at a positive half-voltage of the mains voltage, the current is closed through the thyristor 29, etc., until it drops to zero at time t ,. The voltage and 12 at the moment of time ts changes from the logical "1 to logical" O, and the voltage

chesky "1 logical" Oh, and the voltage

Ui3 (permission to turn on the previously inoperative second group) at time instant te after a time delay — on the contrary. At the same time, voltage 26 also changes from "1 to" O,

In the inverter mode and vice versa, the operation is relatively simple and is implemented mainly on logic elements, which increases the reliability of the device as a whole. This is facilitated by a tight linking of the pulses of the inverter mode to zero crossing of the phase voltage, and not to its magnitude, blocking to the command for reversal and by the time the thyristors are turned on.

connected, respectively, to the direct and inverse outputs of the synchronization unit with a linear voltage network, the outputs to the first and second inputs of the sawtooth generator, the second input of the first AND-NE element, the first inverter input, the first input of the first AND-NO block element, the first input of the third element AND-NOT is intended to be connected to the output of the command shaper on the re-inoperative group taking into account the time, faith, the second input of the second element NAND, nor on restoring the locking properties of the first input of the second element and the NAND block

thyristors, previously inoperative group, in locking, the first input of the fourth unit of which cannot pass the interference. AND-NOT connected to the output of the perV device, there are no adjustments to the inverter, the first output of the logic

settings, its mass and dimensions of the switching unit are reduced, connected to the input parameters of the second inverter and the second input of the first element of the NAND blocker,

Claims (1)

The invention of the second input of the second element AND block interlocking and input of the third inverter; a device for separate control of the dinene with the second output of a logical thyristor converter, a forward switching unit; the output of the third element, which is used to power the exciter winding, IS-NOT, the blocking unit is connected to the motor containing the synchronous block the third input of the comparison unit of the phase unit with the linear voltage of the network, the block control unit, the inputs of the first and second phase control, made in the form of differentiating chains are connected respectively to generator with inverse and direct output voltage and the first inputs of the synchronization unit with the phase voltage of the network, the first inputs of the fifth and sixth elements AND-NOT connected to the output of the phase control unit, the first inputs of the seventh and eighth eletsyuyuschie chain , characterized by the fact that, the IS-NE bites with the input of the first differential are in order to increase the reliability and improve the chain, the first steps of the mass and dimensional parameters are introduced in the same tenth IS-NOT - with the block sync with f the voltage across the output of the second differentiating chain, network block, made in the form of the second inputs of the third, fifth, seventh and three elements AND-NOT, and the outputs of the first elements AND-NOT connected to the output and the second elements AND-NOT block 5 of the second inverter and the fourth, the connectors are connected to the inputs of the third element, the eighth and the tenth element of the AND-NOT-AND-NAND blocker, the first, with the output of the third inverter, the outputs of the second and third inverters and ten double-digit elements AND-NOT intended input elements AND-NOT, and the first to connect to the control For the electric inputs of the first and second elements of AND-NOT to the thyristors of the converter. a comparator unit, the second input of which is intended to be connected to the output of a control voltage source, a logical switching unit and two differential connections, respectively, with the forward and inverse outputs of the synchronization unit with a linear voltage network, the outputs with the first and second inputs of the sawtooth generator, the second input of the first element AND-NOT, the input of the first inverter, the first input of the first element AND-NOT of the blocking unit, the first input of the third element AND-NOT are intended to be connected to the output of the shaper coma Revere rows on the second input of the second AND-NO element, the first input of the second AND-NO element unit Os d dl t gt / t I L I I  t 3  t5 t7 phi8.2   . I 6 i 1