SU1386935A1 - Device for measuring frequency deviation from rated value - Google Patents

Abstract

The invention can be used in automated control systems for measuring the Doppler frequency shift, demodulation of frequency-manipulated signals. The purpose of the invention is to expand the functionality of the device. The device contains a pulse former 1, a control unit 2, a buffer register 3, a counter 4, a deduction code storage register 5 and a key 6. In order to achieve this goal, an adder 7 is additionally introduced and new functional connections are formed. 2 Il. i (L t 10 d I 0 so eo 05: o: o: l

Description

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 The invention relates to electrical measuring equipment and can be used in automated control systems, measuring Doppler frequency shift, demodulating frequency-manipulated signals.

The purpose of the invention is the expansion of functional capabilities.

Figure 1 shows the structural diagram of the device; Fig. 2 is a block diagram of the control unit.

The essence of determining frequency deviations from the nominal value is based on setting the maximum possible range of deviations of measured frequencies from Nominal values, choosing the counter size so that its volume is larger than the product of the maximum possible range of deviations of measured frequencies from nominal values and duration of the measuring interval, counting the number of periods of the measured frequency in the measuring interval by increasing result modulo the number equal to the volume of the counter from zero value, and subtracting from the contents of the deduction counter from the product of the value of the nominal frequency and duration of the measurement interval modulo the number equal to the volume of the counter.

The device contains the pulse former 1, the control unit 2, the buffer register 3, the counter 4, the storage register 5 of the deduction code, the key 6 and the adder 7. Input 8 and output 9 are the input and output of the device, and inputs 10 and 11 input inputs and control record deduction code nominal frequency.

The device consists of a serially connected pulse driver 1, a key 6, a counter 4 and a buffer register 3, the output of which is connected to the first input of the adder 7. The output of the 5 deduction code storage register 5 is connected to the second input of the sum- 7 device. The 2 control is connected to the control input of the recording of the buffer register 3, the second output is connected to the control input of the key 6, and the third output is connected to the reset input of the counter 4.

The device works as follows.

Shaper 1 pulses converts the input signal into a sequence of rectangular amplitudes normalized in amplitude, the number of which is equal to the number of periods of the measured frequency. The generated pulses go to the input of the key 6, to the control input of which, from the second output of the control unit 2, a measuring gate of duration D "arrives. During

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the action of the measuring strobe key 6 is opened, the skip generated pulses to the counting input of counter 4. Counter 4 counts the number of pulses in the measurement from zero value with an increasing result modulo a number equal to the volume N of counter 4. The digit n of counter 4 is chosen so that its volume beats more than the product of the maximum possible range of the deviation of the measured frequency, from the nominal value Rsc and the duration of the measurement interval N FMOKC Tysm

To measure the frequency deviation of the pulse generator 1 to the nominal value E (; the additional code of the K number equal to the negative deduction from the value of the nominal frequency FM; and the duration of the measuring gate modulo a number the volume N of the counter 4. T ,, FH; „,. (l)

where a is the c. of the number a modulo b (the remainder of dividing the number c by b).

After the end of the next measuring strobe, the signal from the first output of control unit 2 controls the contents of M of counter 4 equal to M to be written into buffer register 3, and the counter 4 is reset to third state by reset signal from third output. At the output of the adder 7 Vits code number P, equal to

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where u F; - frequency deviation F ,,; from nominal value.

If the conditions are met

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- maximum ZhaKS fMOLKC - tchdm, but the POSSIBLE range of deviations of measured frequencies from nominal values.

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- maximum If, and there is a possible deviation of the measured frequencies from the nominal values in the direction of their increase and decrease, respectively, the P number will be an additional code of the number proportional to the deviation of the measured frequency from the nominal value. Fig. 2 shows one of the variants of the circuit of the control unit 2, which consists of a generator of 2.1 square wave, delay element 2.2 and OR-NOT 2.3 logic element. If the operation of the device is controlled by a digital computer (microcomputer), then it can be simplified. To do this, you can exclude from the device circuit the adder 7 and the storage register 5 of the deduction code, and the third output of the control unit 2 sends the interrupt request input to the digital computer, so that its trailing edge will enter the contents of the buffer register 3 (M numbers) in digital computers and addition with the number K stored in the memory of digital computers.

The hardware volume of the device during hardware-software implementation can be reduced by one p-bit register, and the counter 4 may not have installation inputs to the initial state, which simplifies the device hardware, especially when its size is large.

Claims (1)

Apparatus of the Invention A device for determining frequency deviations from a nominal value, comprising a serially connected pulse generator, whose input is the device input, a key, a counter and a buffer register, as well as a control unit and a deduction code storage register, an information input and an information recording control input which are input and control inputs for the nominal frequency deduction code, respectively, with the first output of the control unit connected to the information recording control input and a buffer register, and a second output with a key control input, characterized in that, in order to expand its functionality, an adder is entered into it, the first input of which is connected to the output of the buffer register, the second input to the output of the deduction code storage register, with In this way, the output of the adder is the output of the device, and the third output of the control unit is connected to the reset stroke entered into the counter. P