SU1365072A1 - Information input device - Google Patents

Abstract

The invention relates to computing and can be used to organize the group input of analog information, for example, in the operation of an automated research system. The aim of the invention is to improve the reliability of the device and the expansion of the field of application by providing registration of the time of change of the entered information. In the device, the operation of the analog sensor serves as an analog value reception signal, as a result of which the device outputs the current digital value of the monitored value based on signals from the timer. In the case when the comparison element has not changed its state during the cycle time, a signal appears on the display unit informing that the sensor has not changed its state. The proposed device allows fixing the actual moment of registration of a physical quantity. 1 il. (L

Description

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The invention relates to computing and can be used for organizing group input of analog information, for example, in the operation of an automated system for scientific research of physical and chemical phenomena.

The purpose of the invention is to increase the reliability of the device and expand the application area by ensuring the registration of the measurement time of the input information.

The drawing shows a block diagram of the device.

The device for entering information contains analog sensors 1, comparison elements 2, linearly rising voltage generator 3, pulse generator 4, start pulse generator 5, containing Start button 6 and RS flip-flop 7, timer 8, counter 9, decoders 10, switches 11 and the AND-NOT element 12, the first 13 and the second 14 elements of the NAND, the first 15 and the second 16 delay elements, trigger 17, the first element NOT 18, the third element NAND 1 the third delay element 20, the second element NOT 21, the element OR 22, the fourth element AND-NOT 23, the third element NOT 24, the fifth ele ENT 25, display block 26, the first group of elements AND-NOT 27, group of triggers 28, registers 29, built on D-triggers 30, decoders 31, digital indicators 32, the second group of elements AND-NOT 33, counter 34, decoder 35, digital indicator 36.

The device works as follows.

The device is reset to its initial state with the help of the Start button 6, by briefly pressing which the level of the log is set on the inverting output of the RS flip-flop 7. 1 and the pulse thus generated after the passage of the element OR 22 is used to set the counter 9 of the timer 8, the registers 29, and also directly to start the pulse generator 4 and reset the counter 34, to the zero state. As a result of setting the initial state at the output of the timer 8 - element AND NOT 12 is set to log. 1, allowing the passage of counting pulses from the generator of 4 pulses through the first element

Q

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about 5 about

five

0

five

AND-NO 13, from the output of which these pulses go to the counting input of the counter 9 of timer 8. The duration of the measurement cycle is set on the switches 11, at the moment when the number of counting pulses coincides with the specified value, the output of the AND-NOT 12 element of the timer 8 is set log O, which prohibits the passage of counting pulses through the first NAND 13 element. The current values on the counter code 9 of timer 8 are present simultaneously on the corresponding inputs of all registers 29, namely on the D inputs of the trigger 30.

Each analog value in the form of a time-varying voltage level Ugy, the direct current generated by NM analog sensor 1, is fed to the first inputs of each of the N comparison elements, where it is compared to the voltage U p supplied to the second inputs. „„ From generator 3 linearly increasing voltage.

At the moment when the N-measured value satisfies the condition ,,, the current value of the counter 9 of timer 8 is deposited with the corresponding NM D-trigger register 29. To eliminate the possible coincidence of the transfer of the contents of the counter 9 of timer 8 with the next change in the state of the last , the write signal to the registers with the help of the elements IS-NE 25 and 27 is gated with pulses delayed with respect to the counting for the duration t with the help of the first delay element 15, only at the simultaneous presence of high potentials at the inputs 25 and 27 The Nth RS-flip-flop 28 switches the state, as a result of which, on its direct output, a log. O is replaced by a log. G, this transition is perceived by D-trigger register 30 as a write signal, by which the current value of counter 9 of timer 8 is stored in the corresponding register 29 for storage while being displayed on digital display 32.

At the time of completion of the next measuring cycle, the inputs of the display unit receive a high level from the output of the NAND 12 element and, if some RS flip-flop 28 maintains the initial state, i.e. log one

.. one

at its inverse output, a light indication element is turned on, informing of a measuring channel failure.

The operation of the linearly rising voltage generator 3 at the time of the start-up of the device is performed from the direct output of the RS flip-flop 7 by a log signal. O, which, having passed through the fourth element IS-NOT 23 and the third element NOT 24, acts on the R input of the trigger 17, thereby setting generator 3 to the zero state, which is started at the moment of arrival of the next clock pulse that passes through The second element IS-HE 14, provided the trigger 17 is correctly installed and puts it into operation, allowing the generator 3 to operate. Simultaneously, from the output of the second element AND-HE 14, the clock pulses go to the counter input of counter 34, and the current measurement value is displayed cycle cycle on the digital display 36,

Thus, in the proposed device, the transition of the N-ro element is comparable to Q OR, a group of triggers, the first inputs

from one steady state to another serves as a signal of reception of the Nth analog value, as a result of which the current digital value of the monitored value is output to the N-th output of the device at the moment of the end of the cycle time for its conversion In the case when some comparison element during the cycle time the timer has not changed its state; at the output of the corresponding element of the second group IS-NE 33 a low level is formed, including in the display unit 26 a corresponding incandescent electric bulb (LED), and Thus, the received digital code is not only proportional to the instantaneous value of the monitored physical quantity, but also determines with high accuracy the duration of the converted pulse-width signal and, for the duration of the latter, can be calculated actual moment of registration of a physical quantity. To do this, you need to use the following mathematical expression:

4 it

n + t

ShChS N 1

where l t p -tis M

analog signal sampling period or analog sensor polling period;

the sequence number of the next measurement or the beginning of the next moment of converting the analog value to a digital code; the duration of the N-ro pulse-width signal, which is defined as the product of the duration of the period of the counting pulses, equal to f by their number Z, calculated by converting the duration of the N-ro pulse-width signal into a digital code.

25

Claims (1)

Invention Formula A device for inputting information containing reference elements, a counter, a pulse generator, an element five 0 five 0 five Comparison elements are inputs to the device, characterized in that, in order to increase the reliability of the device and expand the scope of application by ensuring the recording of the measurement time of the input information, a timer is entered into the device, five AND-NOT elements, two groups of AND-NOT elements, a generator linearly increasing voltage, three NOT elements, three delay elements, a display unit, a trigger, registers, a starting pulse shaper, the inverse output of which is connected to the start input of the pulse generator, a reset-count input as the first input of the OR element, the first output of the pulse generator is connected to the first input of the first NAND element, the output of which is connected to the clock input of the timer and through the first delay element to the first inputs of the NAND elements of the first group, the second inputs of which are connected to the corresponding outputs comparison elements, the second inputs of which are connected to the output of the generator of linearly increasing voltage, the start input of which and the first input of the second ele 5136 I-NOT is connected to the trigger output, the timer output is connected to the second input of the first NAND element, the input of the first element NOT and the first inputs of the N-elements of the second group, the outputs of which are connected to the inputs of the display unit, the output of the first element is NOT connected to the first the input of the third element AND-NOT through the second delay element with the second input of the third element AND-NOT, the output of which is connected to the first input of the fourth element AND-NOT and through the second element NOT to the second input of the OR element, the output of which is connected to the reset inputs of the tie measure and registers, the second output of the pulse generator is connected to the second input of the second NAND element, the first input of the fifth NAND element and through the third delay element to the third input of the second NAND element and the second input of the 5 NI element whose output is connected to the inputs 0 072 25 15 0 6 The settings in O of the group triggers, the inputs of the installation in 1 of which are connected to the corresponding outputs of the NAND elements of the first group, the inverse outputs of the triggers of the group are connected to the corresponding second inputs of the NAND elements of the second group, and the direct outputs are connected to the corresponding gate inputs of registers, information the inputs of which are connected to the corresponding outputs of the timer group, the outputs of the registers are the outputs of the first group of the device, the direct output of the start pulse former is connected to the second input of the even ertogo AND-NO element whose output is connected to an input element of the third NOR output is connected to the input for setting in D flip-flop, an output of second AND-NO element is connected to the counting input of the counter and the input of flip-flop is set to 1, the outputs The counters are the outputs of the second device group.