SU1350736A1 - Apparatus for monitoring phase sequence and phase failure on three-phase network - Google Patents

Abstract

The invention relates to electrical engineering and is intended for use in relay protection and automation systems. The purpose of the invention is to increase the reliability of operation in a wide range of ambient temperatures. In the absence of phase failure and proper phase rotation of the monitored network, a high signal level is generated at the output of D-flip-flop 4, and a low level at the output of the HE element 7. Actuator 5 connects the load to the monitored network, and in the switch-analyzer 6, alarm signals are not generated. If the phase sequence is incorrect, the output of the D flip-flop 4 forms a low signal level, and the actuator 5 disconnects the load from the network. At the output of the element NOT 7 a low signal level is formed. In the switch-analyzer, the Avari signal is interleaved. In the event of a phase failure in the analyzer switch 6, a phase failure signal is generated. 1 il. with S cl with SP about with C)

Description

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The invention relates to electrical engineering and is intended for use in relay protection and automation systems.

The purpose of the invention is to increase the reliability of operation in a wide range of ambient temperatures.

The drawing shows the diagram of the jg-jg counter 9, which appears to be high.

The device for controlling the alternation and interruption of the phases of a three-phase network contains three limiter 1-3 generators, inputs connected to the phases of the monitored network, D-flip-flop 4, actuator 5 and two-input analyzer switch 6, and the outputs of the first 1 and second 2 limiter drivers are connected respectively to the D-input and C-input of the D-flip-flop, in which the R-inlet coupler is connected to the first input of the analyzer switch 6, and the output to the input of the final control element 5 and the second input of the analyzer switch 6. B device and there is an element NOT 7, a three-input element OR-NOT 8 and a counter 9, the countable C-input of which is connected to the output of the second driver-limiter 2. Each input of the element OR-HE 8 is each connected to the output of the corresponding formation gel-1-3, and the output of the element OR NOT 8 is connected to the zeroing R input of the counter 9, while the CE lock input of the counter 9 is connected to the output of this counter connected via the NOT element 7 to the R inserting R input of the D flip-flop 4.

The device works as follows.

Phase A of the controlled voltage is fed to the input of the limiter 1, phase B is shifted to 120 A relative to phase A to the input of the Forming device limiter 2, phase C is shifted to 240 A relative to the phase A to the input of the forming device Limiter 3 1-3, a sinusoidal voltage is converted into a sequence of right angled pulses having a duration approximately equal to the duration of half periods of the first voltage. Thus, a pairwise overlap of pulses from the outputs of the limiter drivers 1 and 2.2 and 3.3 and 1 is provided, at the same time, at the output of the element 13507362.

This OR-NOT 8 constantly maintains a zero level, which enables the operation of counter 9, to the input of which a sequence of rectangular pulses is received from the former limiter 2. The pulses are summed up in counter 9 and when an accumulated number of pulses are output

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verse From the output of the counter, a high level enters the CE input, the counter becomes self-locking and, through the item NOT, the low level arrives at the R input of the D flip-flop 4, allowing it to control phase rotation. With proper network phase rotation, a high level appears at the output of D-flip-flop 4, which for actuator 5 is a sign of the normal state of the network and gives permission to connect to this network load. From the output of the D-flip-flop 4, a high level arrives at the second input of the analyzer-switch 6, prohibiting the formation of alarm signals at its outputs. In case of incorrect alternation of the phases of a three-phase network at the output of D-flip-flop 4, the level is low, which for actuator 5 is a sign of an emergency condition and prohibits the connection of the load to the -network.

A break of one or more phases leads to the appearance of positive pulses at the R input of the counter 9, which reset the counter 9 before it accumulates a predetermined number of pulses, which is expressed by the presence of a low level counter 9 at the output. The HE 6 element at the R-input of D-flip-flop 4 receives a high level, which puts the output of D-flip-flop 4 into a low level (alarm state) regardless of the state D and C of the inputs of D-flip-flop 4,

As in the case of incorrect phase alternation, and when the network phase is broken, the low level, formed at the output of D-flip-flop 4, is fed to the second input of analyzer-switch 6, allowing the generation of alarm signals at its outputs. Moreover, if the input of the analyzer-switch 6 from the output of the element 7 receives a high level, an alarm signal is generated at the first output of the analyzer-switch 6 (phase loss). If the first input analyzer switch. 6, element 7 receives a low level; an alarm signal is generated at the second output of the analyzer-switch 6 (Alternation Alternation).

In comparison with the known, the proposed device has a simpler design, is more reliable in control over a wide range of ambient temperatures.

By connecting the element 7 to the various outputs of the counter 9, it is possible to change the sensitivity of the device and its noise immunity.

Claims (1)

Formula of gain A device for controlling the alternation and phase failure of a three-phase network, containing three limiter drivers, inputs connected to the phases of the controlled network, a D-flip-flop, an executive element and a two-input analyzer switch, with the outputs of the first and second limiters are connected respectively to the D input and the C input of the D flip-flop, in which the R-in jack is connected to the first input of the analyzer switch, and the output to the actuator input and the second input of the analyzer switch, different that, in order to increase the reliability of operation, in a wide range, of ambient temperatures, the device is entered with a NOT element, a three-input OR-NOT element and a counter, the C input of which is connected to the output of the second limiter, NOT soy ineny each yield the corresponding shaper -ogranichitel and the output of the element OR is NOT connected to the counter-zero R input of the counter, while the CE-input of the blocking counter is connected to the output of this counter connected via the element NOT to the zero R-input R-flip-flop.