SU1327269A1 - Frequency conyerter - Google Patents

Abstract

Invention m. used to create signal receivers using solid-state semiconductor technology. The purpose of the invention is to enable microminiaturization. The device contains differential amplifiers 1-3, each of which is made of transistors (T) 4 and 5, 6 and 7, 8 and 9, respectively, T 10 and I, resistors (P) 12 and 13, 16 and 17 , capacitor 14, current generator 15, output emitter follower 18, four additional T 19-22, five additional R 23-27, additional capacitor 28. The proposed circuit is selective, i.e. possesses max. coefficients gain at a fixed frequency, 1 Il. (L with to to SP) with

Description

The invention relates to radio engineering and can be used to create signal receivers using solid state semiconductor technology.

The purpose of the invention is to enable microminiaturization.

The drawing shows an electrical schematic diagram of the proposed frequency converter.

The frequency converter contains the first 1, second 2, third 3 differential amplifiers, each of which is made on the first and second transistors 4 and 5, 6 and 7, 8 and 9, respectively, the third 10 and fourth 11 transistors, first 12 and second 13 resistors, capacitor 14, current generator 15, third 16 and fourth 17 resistors, output emitter follower 18, voltage, first 19, second 20, third 21 and quarter 22 additional transistors, first 23, second 24, third 25, fourth 26, fifth 27 additional resistors, additional capacitor 28.

The frequency converter operates as follows.

The coswt voltage is applied to the bases of transistors 8 and 9 from the harmonic-firing generator, while the inputs 29, 30 are influenced by the voltage of another convertible signal

U, U cosflt.

The voltage of the harmonic voltage generator is amplified by transistors B and 9, and transistors 10 and 11 are converted into emitter currents of the first 1 and second 2 differential amplifiers connected in a signal multiplier circuit. Moreover, the magnitude of the emitter currents is proportional to the voltage of the harmonic voltage generator at the inputs of transistors 8 and 9 and the current of generator 15. The pairs of transistors 4, 5 and 6, 7 are included so that the collector current of transistors 4 and 6 is proportional to the current of generator 15, the voltage of the generator harmonic voltage and signal voltage at inputs 29 and 30. The collector current caused by generator 15 is the static current of transistors 4 and 6, and the variable component of this current is proportional to the voltage of the harmonic generator the voltage of the signal at inputs 29 and 30. Therefore

the voltage across the collectors of transistors 5 and 6

and

TO

Out

Ki, and, () t +

five

0

five

0

five

0

five

0

five

+ cos (w-i) t,

where K is the gain of the circuit.

After the output voltage of the circuit is obtained as the sum of two components, one of which is the voltage of the frequency equal to the sum of the converted frequencies, and the second is the difference of these frequencies, the problem of weakening one of these components is paid to the load circuit transistors 5 and 6. Therefore, the gain of the circuit K must be significantly dependent on the frequency, for example, at the frequency xj-I, it must be large and negligible at the other frequencies, including on frequency W + 57. This is the property of the circuit to transform the frequency spectrum of the input signals.

Suppose the proposed scheme is selective, i.e. has a maximum gain at a fixed frequency. At low frequency, the action of capacitors 14 and 28 can be neglected and on the basis of the output transistor of the emitter follower 18 and its output, de sets a voltage at which the collector current of transistors 4 and 6 is equal to the collector current of transistor 19, If under the influence of a harmonic generator signal voltage - the signal at the inputs 29 and 30, will change the collector current of transistors 4 and 6, then it leads to a change in voltage at the output

circuits that through emitter i

The transistors 22 and 21 will be transferred to the base of transistor 20 and, taking into account that transistors 20 and 19 are differentially connected, causes an emitter current redistribution between these transistors, and by an amount equal to the change in the collector current of transistors 4 and 6 in the feedback circuit from the output of the circuit to the output of the transistor 19 is large, the low-frequency signals at the input of the circuit will not cause a change in the voltage at its output. Thus, at low frequencies, the circuit attenuates the input signals. If at a fixed frequency the circuit has the property of adding signals arriving at the output of the circuit from its inputs and through the feedback circuit, so that at this frequency the circuit has a higher gain factor. If, under the influence of the input signal on the bases of transistors 4, 7, 5, 6, the collector current of transistors 4 and 6 increases from zero according to a harmonic law, then the collector voltage of these transistors lags behind the collector current by -7/2, since it charges the capacitor 14 The voltage on the capacitor 14 is transmitted to the output of the emitter follower 18 and inverted by the emitter follower transistor 18, i.e. shifted to, acts on the base of the emitter follower on the transistor 22. The output voltage of the emitter follower 22 is additionally delayed by a still lif2 RC filter consisting of a resistor 26 and a capacitor 28. The transistors 21, 20, 19 do not introduce a phase shift. Thus, the current of the transistor 19 coincides in phase with the collector tog of transistors 4 and 6, so that at a frequency where the total phase shift is 2 / G, the output voltage of the circuit is maximum. A prerequisite for the stable operation of the circuit is the provision at a frequency with a phase shift of 2 / G of the gain in the feedback circuit less than unity. For this purpose, the gain of the pair of transistors 19, 20 is selected by the attenuation coefficient of the RC filter on the resistor 26 and the capacitor 28. The decrease in the frequency response of the circuit at frequencies above the phase shift frequency Z is due to a decrease in the gain factor of transistors 4 and 6 when they are used. capacitor load 14.

A phase shift in the feedback circuit equal to 2Tf takes place at the frequency

Wo

one

44 g

21 C

H thermal coefficient;

d - current transfer ratio

emitter; transistor collector current

11 in static mode; C. - capacitor capacitance 14;

2

Sz

resistance of resistor 26; capacitor capacitance 28.

25

It follows from the above formula, 5 that the maximum frequency HO is limited by the frequency dependence of the coefficient d. . In the range, the frequency is from zero to the amplification frequency of the transistor in the common base circuit f. frequency i) o can be chosen equal to s-q, signals

: on which will be transmitted by the circuit without attenuation, and suppress the input signal at the frequency LO + L due to significant. the overall attenuation of the circuit at frequencies

1Rl

excellent by-l.

Claims (1)

Invention Formula A frequency converter containing three differential amplifiers, each of which is made on the first and second transistors, and the combined emitters of the transistors of the first and second differential amplifiers, respectively, are connected to the collectors of the third and fourth transistors, the emitters of which are connected via first bus The 30 power sources, the bases of the first and second and second and first transistors of the first and second differential amplifiers, respectively, are connected and are the inputs of one 35 of the converted signals, the collectors of the first transistors of the first and. iBTOporo differential amplifiers are combined and connected via a capacitor to a common bus, collectors The 40 second transistors of the first and second differential amplifiers are combined and connected directly to the second bus of the power supply source, and through the current generator to the common emitters of the first and second transistors of the third differential amplifier, whose collectors are connected to the first through the corresponding third and fourth resistors power supply and directly with the bases of the fourth and third transistors, respectively, and the bases are the inputs of the second signal to be converted, as well as gg output emitter follower voltage, the input of which is connected to the connection point of the capacitor and collectors of the first transistors of the first and second differential amplifiers 51 In order to enable microminiaturization, four additional transistors are introduced, the base of the first of which is connected to the second bus power supply and common bus through the first and second additional resistors, respectively, and the emitter is connected to the emitter of the second additional transistor and through the third auxiliary resistor is connected to the second power supply bus; the collector of the second auxiliary transistor is connected to the common bus, the third and Editor M.Tovtin Compiled by A, Osipovich Tehred V. Kadar Order 3407 / 5A Circulation 901 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, st. Project, 4 A quarter of the additional transistors are connected according to the emitter voltage follower circuit, with the emitter of the third additional transistor connected to the base of the second additional transistor, and the base through an additional capacitor and the fourth additional resistor are connected respectively to the common bus and the emitter of the fourth additional transistor, the base of which through the fifth an additional resistor is connected to the second power supply bus and to the collector of the output emitter follower transistor. Proofreader V. But ha