SU1317426A1 - Information input device - Google Patents

Abstract

The invention relates to computing and can be used to enter information into computers from magnetic media using a non-return to zero recording method with group coding. The aim of the invention is to expand the field of application of the device by providing the possibility of entering coded information. The device contains buffer registers, a decoder, a counter, a clock generator and pulse shapers. When the voltage changes at one of the information inputs of the device, the corresponding driver generates pulses that allow the time code of the change to be written to the corresponding buffer register. In this case, the interrupt request signal is exceeded. The processor organizes the processing of the received interrupt, providing the device with address and control signals necessary for issuing information from the selected buffer register to the output data bus. After the processor reads the information from the data bus, the interrupt requirement, address and control signals from the device inputs are removed. The time codes corresponding to the moments of change of the input signal in each of the channels are entered into the processor. This reduces the amount of input. 4 il. u (L with "it; ND 05

Description

The invention relates to computing and can be used to enter information into computers from magnetic media using a non-return to zero recording method with group coding.

The aim of the invention is to expand the field of application of the device by allowing the input of coded information.

FIG. 1 shows a functional diagram of the proposed device; in fig. 2 is an example of a specific technical implementation of a pulse former; FIG. 3 and 4 illustrate the selected method of encoding information.

The diagram shows the buffer registers 1, device information outputs 2 (data bus), device interrupt demand outputs 3, decoder 4, address inputs 5 and device gate input 6, counter 7, clock generator 8, device information inputs 9 and pulse formers 10 each of which contains a two-bit shift register 11 and an adder 12 modulo two (figure 2),

The device works as follows.

When the voltage changes at one of the inputs 9 () in the corresponding register 1, the time code of the moment of change is entered. At output 3, this generates an interrupt demand signal. The processor organizes the processing of the received interrupt by applying to the inputs 5 and 6 of the device corresponding address and gate signals, according to which information from the selected register 1 is read to the data bus. The current time code is generated at the outputs of the counter 7, to the input of which pulses of the clock generator 8 are received. The design of the pulse generator 10 shown in FIG. 2 ensures that you form.

1317426-2

the input pulses (input to the write enable register 1) both by positive and negative signal drop at input 9. After the processor reads information from the data bus (2), the signals from inputs 5 and 6 and output 3 are removed.

Thus, time codes are entered into the processor, corresponding to the moments of change of the input signal in each of the channels. This reduces the amount of input.

(figure 4).

Claims (1)

Invention Formula Device for entering information  containing buffer registers and a decoder, the outputs of which are connected to the gate inputs of the corresponding buffer registers, the control outputs of which are outputs device interrupt requirements, information inputs and a decoder gate input are, respectively, address inputs and a gate input device, information the outputs of the buffer registers are combined and are informational outputs of the device, characterized in that, in order to expand the field of application of the device due to the possibility of compressing the input information, the device includes a clock generator, a counter and pulse shapers, the outputs of which are connected to the write enable inputs of the corresponding buffer registers, the information inputs of the pulse pulse formers are the information inputs of the device, the output of the clock generator is connected to the gate inputs STUDIO pulses and a counter input, which outputs are connected to data inputs of the buffer registers.   "Tsts t., T Fig.Z St / m sequence Editor A.Makovska Compiled by O. Kulakov Tehred A.Kravchuk Kirestruktor E.Roshko Order 2424/43 Edition 672 Subscription VNIIPI USSR State Committee for Inventions and Discoveries 113035, Moscow Zh-35, 4/5 Raushsk nab. Production and printing company, Uzhgorod, Projecto st., 4 srigL