SU1305839A1 - Pulse shaper - Google Patents

Abstract

The invention relates to a measurement technique and can be used in automation and computing devices. The purpose of the invention is to increase the reliability of the device. The pulse shaper contains a D-flip-flop 1 and an AND-NE 2 element, as well as an input N-NE 3 element, which is the output of the device and the combined input of the D-flip-flop 1 and the control input. 2 Il. 3 FBb / x. from ao from 00 figl

Description

The invention relates to a measurement technique, in particular to a pulse shaper, and can be used in automation and computing devices.

The aim of the invention is to improve the reliability of the pulse former,

FIG. 1 shows a flow chart of a pulse former; 2, time diagrams of the generator operation (where a is the clock pulses; 5 is the control signal; 6 is the signal at the trigger output; d is the signal at the output of the second AND-NO element; 5 is the signal for the output of the first AND-NOT element.

The pulse shaper contains a trigger 1, the first element AND-NOT 2, inputs 14 and connected to the inverse output of the second element AND-HE 3, which is the output of the device, and with the combined input D of trigger 1 and the control input, with the clock pulse bus connected to input C of the trigger 1 and the second input element 3, the first input of which is connected to the inverse output of the trigger and the output of the first element AND-NOT 2 is connected to the input S of the trigger 1.

The device works as follows.

Up to time point t (before the control signal of the logical zero is applied to Fig. 26). The signal at the inverse output of trigger 1 corresponds to logical zero (Fig. 2b), the output of the device is logical unit (Fig. 2 d). At the third trigger input 1, a logical zero signal is applied ((1 mg. 2 a).

At time t, the control signal becomes a logical zero, and the signal at the third input and the second input of the trigger becomes a logical one and a logical zero, respectively.

According to the first clock pulse after the moment of time t (Fig. 2a), the instant of time tj-, the trigger 1 goes to the zero state. At its inverse, the output is a logical unit, and the pulses begin to pass through the device AND-NO 3 to the output of the device. At time t, the control signal becomes equal to a logical one, however, the state of the trigger does not change, since the IS-NE 2 element is blocked by the output pulse.

At the end of the output pulse (time t), a logical zero signal appears at the output of the NAND 2 element, translating trigger 1 into one state and blocking

further passage of clock pulses to the code of the device.

With a possible failure of the trigger, if there is a logical zero at the device input, it spontaneously sets to the working state by the first clock pulse, passing it to the device output.

Claims (1)

Invention Formula A pulse shaper containing a trigger and the first NAND element, the first input of which is connected to the control, and the output is connected to an input S of the trigger, characterized in that, in order to increase reliability, a second AND-NOT element is introduced, the first input of which is connected to the inverse output of the trigger, the second input is with the trigger input C and the clock pulse bus, and the output is the output of the pulse shaper and is connected to the second input. the first element is NAND, the bus control is connected to the input D of the trigger. tj t tj tlfts tg tj tg tj tfO ijl 12 tj3 srig.2 Compiled by G. Brynsky. Editor I. Nikolaichuk Tehred M. Khodanych. Director A.Obruchar Order 1464/54 Circulation 902 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production printing enterprise, Uzhgorod, st. Project, 4