SU1296966A1 - Device for automatic checking of wiring validity - Google Patents

Abstract

This invention relates to instrumentation technology. It can be used to control the correctness of electrical connections. The purpose of the invention is to expand the functionality of the device by providing a definition of a faulty circuit. The device contains a light board 5, switch 6, software board 16, logic block 3, to from 05 to Wed

Description

control voltage source 12, control harness 1, comparators 9, 10, 11, diodes 17.1-17.p, resistors 13, 19, 14, 18.1-18. To achieve this goal, a generator of 15 clock pulses, signal elements 20.1-20.P, delay element 2, memory block 4, amplifier 7, relay with winding 8.1, the second 8.2 and the first 8.3 locking

one

The invention relates to instrumentation technology and can be used to verify the correctness of electrical connections.

The purpose of the invention is to expand the functionality of the device by providing a definition of a faulty circuit.

The drawing shows a diagram of the proposed device.

The device for controlling the harness 1 contains a delay element 2, a logic unit 3, a memory unit 4, a light board 5, a switch 6, an amplifier 7, a relay with a winding 8.1, a second 8.2 and a first 8.3 closing relay and a third 8.4 disconnecting relay, the first 9, second 10 and third 11 comparators, 12 source of control., voltage, first 13 and fourth 14 resistors, generator 15 clock pulses, software board 16, diodes 17.1-17.p, third resistors 18.1-18.P, second resistor 19, signal elements 20.1-20.p.

Logic unit 3 contains the first 21 and second 22 inverters, the first 23, the second 24, the third 25, the fourth 26 and the fifth 27 AND-NOT elements, the third inverter 28.

Memory unit 4 contains the first 29, second 30, third 31, and fourth 32 triggers, element OR 33, fifth trigger 34.

Switch 6 contains the first 35 and second 36 switches.

In the drawing there are: 37, 38 and 39 — points whose potentials are controlled by comparators 9, 10 and 11, respectively; Cases: 40 - fit

and third-sh 8.4 disconnecting relay contacts, new functional connections were formed. In the description of the invention, variants 3, 4 are shown. This device determines not only the type of the defect of the monitored harness 1 and the fact of its failure, but also the failed circuit, which significantly expands the functionality. 1il., 1 tab.

electrical circuit, 41 - short circuit of electric circuits on the body, 42 - cross of electric circuits, 43 - open circuit, 44 - short circuit of the electric circuit on the body.

The common cable 6 is connected by the first information inputs to the outputs of the software board 16, the first output through the first xc parator 9 to the first input of the logic unit 3, through the first resistor 13 to the positive terminal of the source 12 of the control voltage, the negative terminal of which is connected to the common bus of the device and the first output of the second resistor 19, the third resistors 18.1-18.P are connected to the first pins with the anodes of the corresponding diodes 17.1-17.P, the second pins to the corresponding inputs of the software board 16 and to the corresponding terminals for The inputs of the cores of the monitored harness 1, the terminals for connecting the core outputs of which are connected to the corresponding second information inputs of the switch 6, connected by the second output through the fourth resistor 14c to the common bus of the device, and directly to the input of the second comparator 10, connected by the output to the second input of the logic. ical unit 3 connected to the third input to the output of the third comparator 11 connected to the second output of the second resistor 19.

The first terminal of the 8.1 winding of the relay is connected to the common bus of the device, the second output through amplifier 7 to the first output of memory block 4 and to the control input of the generator 15 clock pulses connected by the output directly to the control input of switch 6, and through delay element 2 with the fourth input of the logic unit 3 connected by the first outputs with the corresponding inputs of the memory A block, the second output with the first input of the light board 5 connected with the second inputs with the corresponding second outputs of the memory block 4 connected th echo input from the input device installation. The positive output of the source 12 of the control voltage is connected via the first closing contact 8.3 of the relay to the input of the second comparator 10, the second output of the second resistor 19 is connected via the second closing contact 8.2 of the relay to the common bus of the device, and directly to the first terminals of the signal elements 20.1-20. p, the second terminals of which are connected to the cathodes of the corresponding diodes 17.1-17. p. The common bus of the device is connected via a break contact 8.4 of the relay with a terminal for connecting the core of the monitored harness 1.

The device works as follows.

In order to control the harness 1 on the software board 16, electrical connections are made identical to those in harness 1. The Reset signal coming from the input

In case there are no defects in the tested circuit to 1 controlled harness 1 (case 40 in the drawing), the potentials at points 37 and 38 are equal and amount to a little less than half the voltage of the source 12 of the control voltage, and the potential

0 5 0

0

On the trigger 32, it is set to a state that allows the generator to operate 15 clock pulses, which switches switches 35 and 36 in switch 6 synchronously with each clock. As a result, switch 6 connects one of the monitored harness 1 and circuit board circuit 16. All kinds of possible malfunctions of the monitored harness 1 are detected with the help of three comparators 9-11, analyzing the magnitudes of the potentials at points 37-39. The resistances of the resistors 13, 14 and 19 and each resistance 18.1 connected in series with the diode 17.1 are chosen equal. In this case, the comparator 9 connected to the point 37, produces a signal 1 at the potential V at the point 37,

five

7

where E is the voltage value of the source 12 of the control voltage. A comparator 10, connected to point 38, generates a signal 1 at a potential H, at point 38 KompaE8 /

Rator 11, connected to point 39, generates a signal 1 at potential H,

f 1 g7 about

at the point

39 - H - 4 39

E 2

AT

i9

dependencies

from a defect of a controlled bundle, 1 state of comparators 9-11 may. be seducious;

at point 39 it turns out a little less

p values m. At the same time comparators 9

and 11. will output a signal O, and the comparator 10 will give a signal 1. At the first three inputs of the NAND element 23 there will be signals and (with the arrival of signal 1

from the delay element 2) from the output of the NANDI element 23, the zero signal will go to the light board 5 for output. state norma. The delay time of the delay element 2 is chosen slightly longer than the switching time of the switch 6, but not more than the value of the period of the clock pulses of the generator 15. With a healthy circuit, the starting input of the generator 15 does not receive any inhibitory signals, the generator 15 returns the next clock pulse, and the switch 6 connects the next controlled loop one.

In the case of 43 connections with a defective circuit, the voltage at point 37 will become equal to the voltage E of the source 12 of the control voltage, and at points 38 and 39 will become zero.

In this case, the comparator 9 generates a signal II l 11

15

In case 41, if there is a short circuit in the connected circuit of the monitored harness 1 to the case, points 37-39 will be connected through the defect to the case, T.e. potential shared bus device. In this case, the comparators 9-11 will issue signals O. In this case (with the arrival of a clock pulse from generator 15 through delay element 2), signals 1 will be collected at all inputs of the AND-NE element 25 in logic unit 3 and the signal O with

trigger output 29 will arrive at from 20 the corresponding input of the light board 5. Then the device works as in the case of defect 43 Open, only with this, the light board 5 signals

Le act element 2 delay), 5 circuit to the body and

 “. . The corresponding light signal circuit 20.1 is switched on. It can be restarted again, and the comparators 10 and 11 - the signal O. With the arrival of the next clock pulse from generator 1 (pos40

Signals 1 will be generated at all inputs of the AND-24 element, and from the output of the IS-NOT 24 element, the signal O will go to the S-input of the trigger 34 of the memory block 4. At the same time, the signal O through the element, - OR 33 goes to the trigger 32, from the output of which the signal O influences the start input of the generator 15 and stops it, i.e. the switch 6 stops on the wrong circuit of the controlled harness 1. The signal O from the output of the trigger 32 through the amplifier 7 turns on the winding 8.1 of the relay, which connects the point 38 with the positive terminal of the source 12 of the control voltage, and contacts 8.2 to bypass the resistor 19. Circuit: positive source of source 12, switch 36, resistor 18.1 at signal element 20.1 corresponding to the faulty circuit of controlled harness 1, will have total voltage E of source 12 of control voltage.

The signal element 20.1 illuminates and indicates the number of the faulty circuit. At the same time, the signal O from the trigger 34 of the memory block 4 is fed to the corresponding input of the light board 5, which indicates the type of fault Open. To continue testing the monitored harness 1, it is necessary to restart the 15 clock pulse generator. For this, a signal is sent to the fault input of the unit 4, the generator 15 when a defect occurs, and continue the test further.

With this defect, the contact 8.4 of the relay disconnects the bundle body 1 from the common bus of the device so that there is no source short circuit 12 through the circuit: plus source 12, 35 pin 8.3, switch 36, board 16, resistor 18.1, core harness 1, closed to the body of the harness 1, a common device bus, minus the source 12. Contact 8.4, breaking this circuit, eliminates the possibility of the source 12 coming out of line.

In the event of defects 42 Intertwining of circuits and 41 Closing of circuits between each other, the device works in the same way as described above: signals 1 are sent to all inputs of the AND-NE elements 26 and AND-NOT 27, triggers 30 and 31, respectively, on the light panel 5, the corresponding signal is signaled the defect and the corresponding light circuit element 20.1 lights up.

In the case of 40-44 device operation

50

55

the inverters 21, 22. and 28 in logic block 3 provide the inversion of the output signals of the comparators 10-9, necessary for the operation of the elements

The winding 8.1 of the relay is disconnected. With the arrival of the next pulse from the generator 15, the switch 6 connects the following circuit of the monitored harness 1.

In case 41, if there is a short circuit in the connected circuit of the monitored harness 1 to the case, points 37-39 will be connected through the defect to the case, T.e. potential shared bus device. In this case, the comparators 9-11 will issue signals O. In this case (with the arrival of a clock pulse from generator 15 through delay element 2), signals 1 will be collected at all inputs of the AND-NE element 25 in logic unit 3 and the signal O with

If a defect occurs, generator 15 and continue the test further.

With this defect, contact 8.4 of the relay disconnects the harness case 1 from the device common bus so that there is no source short circuit 12 through the circuit: plus source 12, contact 8.3, switch 36, board 16, resistor 18.1, harness core 1, is closed on the body of the harness 1, the common tire of the device, minus the source 12. Contact 8.4, breaking this circuit, eliminates the possibility of the output of the source 12 out of order.

,,

In the event of defects 42 Intertwining of circuits and 41 Closing of circuits between each other, the device works in the same way as described above: signals 1 are sent to all inputs of the AND-NE elements 26 and AND-NOT 27, triggers 30 and 31, respectively, on the light panel 5, the corresponding signal is signaled the defect and the corresponding light circuit element 20.1 lights up.

In the case of 40-44 device operation

50

55

the inverters 21, 22. and 28 in logic block 3 provide the inversion of the output signals of the comparators 10-9, necessary for the operation of elements

AND-HE 23-27.

Thus, the introduction of elements

2, 7, 8.1, 8.2, 8.3, 20.1-20.п and vI. Completion of blocks 3 and 4 allows to determine not only the type of the defect of the monitored harness 1 and the fact of its failure, but also the failed circuit, which significantly expands the fusion potential devices.

Claims (1)

Invention Formula A device for automatically checking the correctness of wiring, containing a light panel, a switch connected by the first information inputs to the outputs of the software board, the first output through the first comparator - to the first input of the cc block, the first resistor with the positive output of the control voltage source, the negative output of iKOTOporo connected to the common bus of the device and to the first terminal of the second resistor, the third resistors connected by the first leads with the anodes of the corresponding diodes, the second leads; the waters to the corresponding Tvvuk vroh software board inputs and corresponding terminals for connecting the cores of the monitored harness, for connecting the core outputs of which (connected to the corresponding second information inputs of the switch connected to the second output through the fourth resistor to the common bus device, and directly to the input of the second comparator connected output with the second input of the logic unit connected by the third input Editor A.Revin Order 774/48 Compiled by V.Dvorkin Tehred M. Khodanych Proofreader S. Shek Circulation 731 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, Projecto st., 4 o five S 0 0 5 0 With the output of the third comparator connected to the second output of the second resistor, characterized in that, in order to expand the functionality of the device by determining the faulty circuit, a clock generator, signal elements, a delay element, a memory unit, an amplifier, and a relay are inserted into it, the first output of the relay coil is connected to the common bus of the device, the second output through the amplifier is connected to the first output of the memory unit with the control input of the generator TARToiBMX and the pulses connected to the output by means of the input to the controller, and through the delay element - with a quarter input logic unit connected to the first output with the corresponding inputs of the memory unit, the second output - with the first input of the light panel connected with the BTopMNH inputs with the corresponding outputs of the memory unit , the second input with the installation input of the device, the positive output of the control voltage source is connected via the first% 1 short circuit relay contact to the input of the second comparator, the second output of the second resistor is connected via the second short circuit contact of the relay with the common bus of the device, and directly with the first pins of the signal elements, the second pins of which are connected to the cathodes of the respective diodes, the common bus of the device is connected via relay contact to the terminal dp of connecting the body of the monitored harness. Proofreader S. Shekmar