SU1292002A1 - Device for simulating problem solving process with electronic computer - Google Patents

Abstract

The invention relates to specialized computer facilities and is intended to simulate the process of solving problems on a digital computer. The purpose of the invention is to expand the functionality by simulating the processes of preparing input-output devices for operation and interrupt processing. The device contains triggers, elements And, delay elements, dividing diodes, shift register, generator of a random sequence of pulses, generators of random pulses proportional to the duration of the processor and external devices. 2 Il.

Description

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The invention relates to specialized computer facilities and is intended to simulate the process of solving problems on a digital computer.

The purpose of the invention is to expand the functionality by simulating the preparation process, for the operation of input / output devices and interrupt handling.

FIG. a time chart is provided; in fig. 2 is a block diagram of the device.

The device contains a generator of 1 random pulses proportional to the duration of the processor, a generator of 2 random pulses proportional to the duration of external devices, the generator 3 sequences of random pulses, the first 4 and second 5 triggers, the first 6, second 7 and third 8 elements And register 9 shift, the first 10, the third 11 and the second 12 delay elements, the first 13 and the second 14 separation diodes.

The timing diagram shows the CPU - data processing by the processor; UVV - execution of input-output operations; Pr - interrupt handling; PD - preparation of UVV to work.

The flow of tasks arriving at the device input is a random sequence of pulses distributed according to a specific law of the occurrence of requirements for performing computational work in the system under study.

Generator 3 models, when a request is received, the processes of processing a request for solving tasks and preparing external devices for operation, and at the time of solving problems, the interval from starting the processor to interrupting its operation in order to access the external device. Generator 1 models the operation of the processor, and generator 2 - the operation of the external device in the process of solving the problem. The distribution of random pulses at the outputs of these generators is the same or different. The time interval from the moment the generator starts up to the appearance of pulses at their output is random and is distributed according to the adopted law of the process simulation.

The delay element P simulates the processor interrupt processing to access the device.

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input / output and launch of these devices. Elements 10 and 1.2 of the delay perform a double function: they increase the accuracy of the simulation by eliminating events that are impossible in practice and eliminate the race signal mode.

The device works as follows.

In the initial state, the triggers 4 and 5 are set to a position where a high potential is applied to the inputs of the elements 6 and 7, and a low potential is fed to the input of the element E 8, In the shift register 9, zeros are written in all bits.

An impulse that simulates the arrival of a problem to a solution, an open element I 6 passes from the input of the device, the generator 3 starts up and, arriving at the trigger input 4, overturns it. After the flip-flop of trigger 4 at the second input of element 6, the voltage is absent — element 6 is closed for the entire period of solving the problem. Problems arriving at the input of the device are rejected to solve the problem.

The random pulses from the output of the generator 3 are fed to the register 9, after filling which the next pulse causes the appearance of a pulse at the output of the register 9, which sets the generator 3 to the initial state. The same pulse confirms the initial state of the generator 1 and, having passed through the element 11 of the delay, starts the generator of 2 random pulses.

At the end of the generator 2 (the primary appeal to an external device), a pulse is output, which passes through the open element 7 and the delay element 10, starts generator I, and then passes through delay element 12, diode 13 and starts generator 3, and also confirms trigger trigger 4.

If generator 3 finishes first, a pulse arrives at 0 input of register 9 and, since it is already filled, a pulse appears at its output, which stops the operation of generators 3 and 1, and also successively enters the inputs of delay element 11 and generator 2. Generators 3 and 1 are reset.

If I finishes first with generator 1, then it is set to

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the initial state of the generator 3, changes the state of the trigger 5 so that the element And 7 is closed, and the element And 8 opens. In addition, the pulse produced by the generator 1, passed through the delay element 11, starts the generator 2. The operation of the generator 2 indicates the completion of the program processing (output of results). The pulse from the output of the generator 2 passes through the open element AND 8 to the output of the device and, arriving at the inputs of the flip-flops 4 and 5, sets them, and consequently, the elements AND 6-8 to the initial state. The device is ready for operation.

Technical and economic efficiency from the introduction of the device lies in the possibility of more accurately simulating the single-program mode of the computer operation by taking into account the features of preparation for the operation of external devices.

Claims (1)

Invention Formula A device for simulating the process of solving problems on a computer, containing a random pulse generator proportional to the processor's operating frequency, a random pulse generator proportional to the external device's working power, two triggers, three And elements, two delay elements, and two isolation diodes, the first input of the first And element is the input of the device, and the output of the first element I is connected to the first input of the first trigger, the first output of which is connected to the second input of the first element I, the output of the generator Uchayny impulses, proportional to the fundamental duration of the external devices, connected to the first inputs of the second and third elements And, the second inputs of which are connected respectively to the first and second the outputs of the second trigger, the output of the second element And is connected to the input of the first delay element, and the output of the third element And is the output 5 of the device and is connected to the first input of the second trigger and the second input of the first trigger, the output of the first delay element is connected to the start input of the random pulse generator, ns, proportional to the duration of the processor, the output of which is connected to the second input of the second trigger, characterized in that, in order to expand the functional capabilities by simulating the process preparation of I / O devices, it additionally contains a random sequence of pulses, a register 0 shift and the third delay element moreover, the output of the first delay element through the series-connected second delay element and the first separation diode is connected to the output 5- the first element And the start input of the random pulse generator, the output of which is connected to the information and shift inputs of the shift register, the output of which is connected to the installation inputs of the random pulse generator and random pulse generator, which is proportional to the duration of the processor, 5 directly, and through the third the delay element - with the start input of a random pulse generator proportional to the duration of the external devices, the output of the third 0 of the element I is connected to the installation register of the shift register, and the output of the generator of random pulses, proportional to the duration of the processor, via the second separator 5, a diode is connected to a setup input of a random pulse generator. CPU t Etc Editor V. Petrash Compiled by V. Fukalov Tehred L. Serdova Order 273/49 Circulation 673 Subscription VNINSH USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production (.: Tnenno-t1oligraphic enterprise, Uzhgorod st. Proektna, 4 Fmg.1 Proofreader N. King