SU1265914A1 - Device for automatic compensating of capacitive current of one-phase earth leakage - Google Patents

Abstract

The invention relates to electrical engineering and can be used in all modes of the electrical network to compensate for capacitive currents. The purpose of the invention is to improve the accuracy of the setup of the reactor and the expansion of functionality. The operation of the device is based on measuring the angle between the vectors of the neutral voltage and the selected phase of the network relative to the earth. The device contains a network mode determination unit 2 connected to the control, their inputs to the voltage selection unit 1 and switch 3, two phase shifters 4 and 5, two phase-frequency filters 8 and 9, divider 6, adder 7, frequency-phase comparator 12. The frequency-phase comparator contains two pulse drivers 13 and 14 pulses, two triggers 15 and 16 triggered on the front, an OR-NOT 17 logic element, a delay block 18, two IS-19 logic elements and a differential amplifier 21. The device can be used for compensation not only in normal mode e and x arc stable combustion, but also when an intermittent mode cC arc voltage to reduce the neutral like a normal mode when unbalance network increases the accuracy in adjustment bench Res circuit in resonance compensation settings. 1 h. n. f-ly, 3 ill.

Description

Yu

O5 Sa

with

1

The invention relates to electrical engineering and can be used in electrical networks to automatically compensate for the capacitive current of a single-phase earth fault.

The purpose of the invention is to improve the tuning accuracy of an arc-suppressing reactor and to expand the functionality of the device for compensating the capacitive current of a single-phase earth fault.

FIG. 1 shows a functional diagram of the device; in fig. 2 - vector diagrams corresponding to different network modes (a - normal; b - steady arc burning; c - arc breakage at the damage site); in fig. 3 - curves of the angle φ in time.

The device comprises a voltage selection unit 1, a network mode determination unit 2, a switch 3, phase shifters 4 and 5, divider 6, adder 7, phase frequency filters 8 and 9, two amplifiers-limiter 10 and 11, a frequency-phase comparator 12, in which shapers 13 and 14 pulses, two triggers 15 and 16, an OR-NOT 17 logic element, a delay unit 18, two logic elements 19 and 20, and a differential amplifier 21, a YUSH amplifier. Amplifier 22, a reactor control unit 23, and an arc suppressor reactor 24.

The input circuits of the all-voltage-supply units 1 and the determination of mode 2 are connected to the terminals of an NTMI-type measuring transformer installed in the electrical network.

The voltage selection unit is designed to isolate the required linear voltage in various network modes and reduce its value to phase. The network mode determination unit controls the operation of the voltage selection unit and the switch 3, which connects the inputs of phase shifters 4 and 5 to the output of the voltage selection unit, depending on the network mode. Phaser 4 forms the reference voltage in the normal mode, and phase shifter 5 in the closing mode. The divider 6, made in the form of a potentiometer, reduces the neutral voltage, its input is connected to the input of the network mode determination unit. The outputs of the phase shifters and the divider are connected to the inputs of the adder 7, realized by the series connection of the output terminals of the divider and phase shifters, which is designed to isolate the voltage of the selected phase relative to ground by analogous subtraction of the voltage vector of the selected source source and neutral.

The phase-pass filters 8 and 9, tuned to the network frequency uo, are connected to the outputs of the divider and adder, designed to suppress signals with frequencies different from the operating frequency of the network and increase the sensitivity of the

body phase in the mode of intermittent arc circuit using their phase-frequency characteristics. The inputs of the limiting amplifiers 10 and 11 are connected to the outputs of the phase-frequency filters, perform the functions of zero-organs, convert the input signals into square pulses of positive polarity of constant amplitude with a duration equal to half the period of the following signals. The outputs of the limiting amplifiers are connected to the inputs of a frequency-phase comparator, which ensures the formation of an output signal with the correct sign, at different frequencies of the input signals and when the arc is broken at the point of damage.

The comparator 12 consists of formers 13 and 14 narrow pulses with a steep front, the outputs of which are connected to the first inputs of the flip-flops 15 and 16, an OR-NOT 17 logic element, the inputs of the delay 18 connected to the inverse outputs of the flip-flops and the output connected to the second triggers, , AND-NOT logic elements 19 and 20 and differential amplifier 21, while the inputs of the delay unit and the first inputs of the AND-NOT elements are connected to the direct outputs of the trigger, the output of the delay unit is connected to the second inputs of the AND-NOT elements, and the outputs of which are yucheny input of the differential amplifier.

The delay unit is designed to create a zone of insensitivity to a change in the voltage phase of the network, resulting from the inequality of the number of windings in the phases of the measuring and power transformers, as well as the influence of the operation of unbalanced high-power electric receivers.

The output of the frequency-phase comparator through a series-connected integrating amplifier 22 and a control unit 23, which is a thyristor converter, is connected to the bias winding of an arc-suppressing reactor 24 connected to a neutral network.

The operation of the device in all modes of the electrical network is based on the principle of measuring one angle between the vectors of the neutral voltage and the voltage of the selected, phase of the network relative to the earth, defined as the difference between the two voltages - reference and neutral.

In the normal network mode, a neutral bias voltage is required, which is created by connecting an asymmetric capacitance to one of the network phases or by changing the number of turns of the transformer winding, to the neutral of which the arcing reactor is connected.

Shown in FIG. 2 a vector

5 voltage chart corresponds to the case

connect the asymmetric capacitance to

phase A network. Used resonant network mode

the voltage leads the UAO by + -2 ahead of the voltage. The voltage selection unit selects the linear voltage Od / d / s, which through the normally closed contacts of the switch and the phase shifter 4 is fed to one input of the adder. Phaser 4 rotates UAB / D / Z voltages to - | - providing the required UAO reference voltages in the normal mode. To the other input is a summation), the voltage of Ooo, described by the expression Yo Uv, (1) LNW + K, flows through the divider.) Where Ki is the asymmetry coefficient; V is the degree of contour detuning; d is the network damping coefficient; and arctan d between the vectors of stresses ydo and ooo. The adder produces an analog subtraction of two input voltages Odo and Ooo, forming the output voltage of IF-Ooo OJSC at the output. Thus, at the inputs of the phase-frequency filters, the voltages of JSC and Ooo are phase-shifted by an angle that depends on the degree of detuning and is equal to the argument of the ratio of expressions of the indicated voltages -c .. ± fci The occurrence of a phase-to-ground connection leads to the appearance the signal at the output of the mode determination unit, under the action of which the voltage selection unit enters into operation and selects the linear voltage between the phases free from the circuit, and the switch connects the input of the phase shifter 5 to the output of the block voltage selection, while disconnecting the input of the phase shifter 4. With a stable arc circuit of phase A (Fig. 2 b), the voltage UBt / Vy is set at the output of the voltage selection unit, the output of the phase shifter 5 is the voltage of the OJSC used as a reference and obtained by turning the vector UBC / VS on -} - j Similarly, the formation of a vector phase voltage source at the closure of phases B and C, only the voltage selection unit selects respectively the linear voltages OCA and OAB, which are reduced by a factor. Voltages of Ooo and OJSC come to the inputs of the adder through the divider, and the difference between the input voltages is distinguished at the output, equal to the voltage of the damaged phase relative to the earth of the OJSC. The divider reduces the voltage Uoo at one input of the adder, which is equivalent to an increase in the transient resistance at the fault site. As a result, even when the metal is closed, when the neutral voltage in the network is equal to the source voltage of the source, the output of the adder has a voltage that coincides in phase with the neutral voltage. Thus, the voltage at the fault location in the device is determined by measuring voltages with sufficient amplitude. The proposed technical solution has several advantages over the direct measurement of the indicated voltage against the background of higher harmonics at low transition resistances. In the area of resonance compensation settings, a failure in the operation of the device does not occur due to a decrease in sensitivity. In the metal ground circuit mode, various interlocks and a memory unit are not required to store the reactor inductance, since in this mode the voltage at the output of the adder, corresponding to the voltage at the damage site, is not zero, its value is set by the divider. In addition, the proposed device makes it possible to most effectively reduce the voltage on the neutral when the network is not full phase resulting from wire breakage and when the fuse of one phase of a feeder blows out, leading to an unacceptable increase in the voltage of asymmetry. In this case, the angle φ changes due to the phase mismatch of the artificial and longitudinal asymmetry voltage vectors, and the device leads the network away from the resonant mode. The voltages of the OJSC and Ooo at the inputs of the phase-frequency filters, depending on the degree of detuning, may have a phase shift equal to Ф arctg- (3) Comparative analysis (2) and (3) shows that the device’s angle sensitivity in the considered modes is almost the same, since it is known that in networks in accordance with the rules of technical operation, the value of the coefficient KU should not exceed 0.0075, and the coefficient d considerably exceeds K, it ranges from 0.03 to 0.1. To clarify the law of change in the phase angle φ in the mode of a moving arc circuit, consider Figs. 2c, where the voltage diagram is shown for the case of phase B damage. With each arc break at the location of the closure, free oscillations of the Ooo neutral voltage with the frequency wi and Voltage Ovo with the frequency wc occur. The OVO stress vector has forced oscillations with a frequency of 0) 0. The difference between the frequencies of free oscillations of the network voltage sho and neutral co is equal to sho (1 -Vl-V) (4) The voltage Uoo decreases exponentially, its initial value depends on the transient resistance at the location of the circuit and is described by the expression Uoo KB) +; (5 ) where K is the coefficient taking into account the decrease in the amplitude of the neutral voltage due to the influence of the transient resistance at the location of the circuit; B is the voltage amplitude URO. The voltage of the damaged phase of the source is UBO., (6) The voltage vector OBO is the result of subtracting the voltages UBO and Uoo. Dividing the voltage expression UBO by the voltage Uoo, we find the argument of this ratio, which is equal to the angle φ, sin6oLit Р t cosSwt-Kr Equality (7) implies that the angle φ, taken as a parameter to control the reactor tuning, depends on the degree of detuning V and time t. FIG. Figure 3 shows the graphs of the change in the angle φ over time with a coefficient d of 0.05 and for two detuning values of 0.15 - curve 25 and v 0, l - curve 26. With a constant detuning of the contour, the angle φ changes not only in magnitude, but also by sign The vector UBO has its own frequency, equal to «L WO +. bso-KG (bsoso5bsh1 + bsinScot) + 1 + KG Chke-2cos6 (ot) (8) From the expression (8) it can be seen that frequency 1) in the UBO voltage vector depends on the degree of detuning; when V Oh, LB (1) 0, OHS CSO; when V Oh, Sob SOO, Ci) (00. For example, with network parameters d 0.05; K 0.95 0.02 s after the arc was cut, the indicated frequencies are a) 331.5 (0 289.5 s for v 0.14 and w 297.3, w 336.7 for v -0.15. The change in the frequency of W in time occurs within insignificant limits, as evidenced by the given graph f (1) (Fig. 3). Thus, in the intermittent arc closure mode, when using the phase angle as the control parameter, the phase-measuring organ must respond to changes in the frequency of the input signals in order to form a control signal with a correct In order to increase the sensitivity of the angle in this mode, the frequencies of the input signals are converted using the phase-frequency characteristics of filters 8 and 9, which are described by the expression F, agctgQ (| o). (9 As mentioned, the frequencies of the input signals for any detuning are different, through one filter passes a signal exceeding the resonant frequency of the filter equal to the angular frequency of the network (oo 314 s through the other - with a frequency lower than the resonant frequency 0) 0. As a result, an increase in the phase shift of the signals at the filter outputs by the value of fF2 occurs. The sensitivity of the angle, therefore, the accuracy of the setting in the considered river depends only on the quality factor of the Q filters. The sinusoidal signals from the filter outputs are converted by using limiting amplifiers 10 and 11 into unipolar rectangular pulses with a duration equal to half the period of the following signals, on the leading edge of which, in the former 13 and 14 pulses of the frequency-phase comparator 12, narrow pulses are produced with steep front. These pulses control the triggering of the RS-flip-flops 15 and 16. If we assume that the voltage pulse at the first input of the trigger 15 is ahead of the voltage pulse at the first input of the trigger 16, then at the beginning the trigger 15 is triggered. until the trigger 16 is switched from the incoming pulse from the driver 14 pulses. In this case, when the inverse outputs of both triggers are in a logical zero state, the triggers return to their original position through the element ILI 17. As a result, a sequence of square impulses is formed at the direct output of trigger 15. In another case, when the input pulses of the trigger 16 are ahead of the pulses at the input of the trigger 15, a sequence of rectangular pulses is formed at the forward output of the trigger 16. The pulse duration at the direct outputs of the triggers 15 and 16 is equal to the interval between the input rectangular signals on the leading edge at the inputs frequency phase comparator. Thus, the appearance of a sequence of rectangular pulses at the output of any trigger is possible only with leading pulses at its input, which makes it possible to generate control signals of the corresponding sign at different frequencies of the input signals in the intermittent arc closure mode. For example, if the frequency of the input pulses is

the input of the trigger 15 is greater than the frequency of the pulses at the input of the trigger 16, then the sequence of rectangular pulses is only at the output of the trigger 15 and vice versa, if the frequency of the pulses at the input of the trigger 16 is greater than the frequency of the pulses at the input of the trigger 15, then the rectangular pulses are generated only at the output of the trigger 16 .

The delay unit 18 allows the deadband to phase out, ensuring stable operation of the device when the phase voltages are unbalanced. The signals from the direct outputs of the flip-flops 15 and 16 are fed to the first inputs of the AND-HE elements 19 and 20 and to the inputs of the delay unit, from the output of which the signal is fed to the second inputs of the specified AND-NOT elements. The switching of the NAND elements occurs only when the pulse duration at the outputs of the triggers of the deadband width of the delay unit is exceeded.

The signals from the outputs of the NAND elements follow to the differential amplifier 21, which, depending on the output of the flip-flops, has a sequence of square-wave pulses, generates the output signal of the corresponding sign. If there is a signal at the direct output of the trigger 15, the sign of the output signal of the amplifier is negative, and if there is a signal at the direct output of the trigger 16, it is positive.

If there is no phase shift between the signals at the inputs of the frequency-phase comparator, which corresponds to the resonant mode of the network, the signal at its output is zero.

When a detuning occurs in any electrical network conditions, the frequency phase comparator generates output pulses with the correct sign to the integrating amplifier 22, which, acting on the reactor control unit, changes its inductance until the detuning circuit becomes zero.

The invention extends the functionality of the device, and it is possible to use it for automatic compensation not only in normal mode and with steady arcing, but also when a moving arc mode occurs to automatically reduce the neutral voltage in normal mode in non-full-phase network modes, it increases the tuning accuracy in the closure mode in the region of the resonant compensation settings and ensures its stable operation in all network modes.

Determining the voltage at the fault site by measuring two voltages of sufficient amplitude using a splitter and adder, using phase-frequency filters to convert the frequencies of the input signals when the arc breaks into a phase angle, as the phase-measuring unit of the frequency-phase comparator allows you to implement automatic tuning devices reactors with changing only one phase angle with one control channel without using functional converters and memory blocks Greer amplifier, for storing the inductance of the reactor, which leads to a simplification, reduction in price and increase device 1 reliably. In addition, devices whose operation is based on the principle of measuring the phase characteristics of a network have high noise immunity and speed. The use of the proposed automatic tuning device, which operates in all modes of the electrical network, improves the efficiency of compensation of capacitive currents and, in general, the reliability of the power supply system of consumers.

Claims (2)

1. A device for automatic compensation of a capacitive current of a single-phase earth fault, containing a network mode detection unit, connected to the control inputs of the voltage selector unit and a switch, two phase shifters, a first phase-pass filter connected to the input of the first amplifier-limiter, a second amplifier a limiter, an integrating amplifier, the output of which is connected to an arc-suppressing reactor through a control unit, characterized in that, in order to improve the accuracy of the reactor tuning and to expand the functional Possibilities, it is equipped with a divider, adder, second phase-frequency filter, frequency-phase comparator, the divider input is connected to the output for connecting the neutral voltage, and the output - to the first input of the adder and through the phase filter n the limiting amplifier to the first input of the frequency-phase the comparator, the second input of the adder is connected to the outputs of the phase shifters, the inputs of which are connected to the outputs of the switch, the output of the adder is connected to the input of the second phase-pass filter connected via the second amplifier anichitel to a second input of frequency-phase comparator, whose output is coupled to integriruschim amplifier. 2. The device according to claim 1, characterized in that the frequency-phase comparator contains two pulse makers, two triggers on the front of the trigger, a logical element OR NOT, a delay unit, two logical elements AND-NOT and a differential amplifier, the first inputs of the flip-flops are connected to the outputs of the pulse shapers, and the second - to the output the element OR NOT, whose inputs are connected to the inverse outputs of the trigger, the first inputs of the elements AND-NOT are connected to the direct outputs of the triggers and the inputs of the delay unit whose output is connected With the second inputs of the NAND elements, the outputs of the NAND elements are connected to the inputs of the differential amplifier, and the inputs of the pulse formers are the inputs of the frequency-phase comparator. 25 26