SU1259333A2 - Device for displaying information - Google Patents

Abstract

The invention relates to the field of automation and computer technology and can be used in devices for communicating an operator with a computer, in particular in devices for inputting information from a computer, and is an improvement of the known device on a.s. No. 960920. The purpose of the invention is to expand the field of application of the device by providing editing of the displayed information, which is achieved by introducing the fifth and sixth counters, the NOT-AND and NOT elements, the ON-VIB and the second register with the corresponding functional links. 1 il. I cl.: § And 1 (50 CiQ

Description

ten

15

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25

The invention relates to automatization and computer technology and can be used in devices for communicating with an electronic calculator, in particular in devices for inputting computer information, and is an improvement on a known device by author. No. 96092G.

The purpose of the invention is to expand the field of device nameplay by providing editing of the displayed information.

The drawing shows a functional; a unit diagram of the device.

The device contains a generator of 1 pulse, a divider of 2 frequencies, the first counter 3, the first decoder 4, the first block 5 keys, the second block 6 Keys, matrix: 5te indicator panel 7, the second decoder 8, the second COP mmutator 9, the second 10, the third 11 and fourth 12 counters, first switch 13, memory block 14, character generator t5, first register 6, second register 17, fifth counter 18, sixth counter 19, element NE-20, Element HE 21, one-shot 22, The first 23, second 24, third 25, fourth 26, 27th and sixth 28 inputs of the device.

The device works as follows.

The pulses from the output of the pulse generator 1 are fed to the input of the splitter 2 frequency, scaling the frequency of the following impulses, from its first output is fed to the input of the second counter 1-0, which has a conversion factor, the grass number of lines on the screen of the matrix display panel 7. Pulses from the output of the second counter 10, enter the third counter 11, which has a conversion factor, equal to 45 the number of vertical fragments of decomposition familiarity in the character generator 15. Pulses from the high output tert, i.e. of its counter 11 stumbles on the fourth input of the counter 12, the address counter is yuschegos familiarity in a row. The playback address signals from the first output of the second counter 10 and the output of the fourth counter 12 through the first switch 13 arrive at the second (address) input of the memory unit 14, thereby causing: cyclic polling of its cells. Codes

thirty

35

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55

five

0

five

five

0

five

0

0

five

characters from the output of the memory block 14 are fed to the first input of the character generator 15, the second (address) input of which receives the address of the vertical sign fragment from the first output of the third counter 11, thereby polling the memory cells of the character generator 15. Backlight codes of the vertical fragments familiarity from the output character generator 15 through the second switch 9 arrive at

1, the first input of the first register 16, to the second input of which, via the second decoder 8, from the second output of the second counter 10, recordings of vertical fragments are received, as a result, the illumination code of the entire vertical electrode of the matrix display panel 7 is generated at the output of the first register 16. the first register 16 through the second key block 6 is supplied to the horizontal electrodes of the matrix display panel 7. Synchronously with this, the scanning pulses from the second output of the divider 2 frequencies are fed to the input ervogo counter 3 and .ego first exit through the first decoder 4 and block 5

. keys on the stand on the vertical electrodes of the matrix display panel 7, the luminous glow of the display elements on. the corresponding vertical electrode in accordance with the pre-light code present on the horizontal electrodes. Then, the whole process is repeated until the entire screen is filled, after which the image is regenerated with a frequency equal to the total period of operation of the primary counter 3.

If it is necessary to write information to any cell of the memory block 14, the device’s address is transferred to the fifth fifth device’s input, which passes to the first input of the second register 17, is stored on the leading edge of the address gating signal that arrives at the second input of the second register 17 from the fourth 26 input of the device, and from its output goes to the fourth input of the first switch 13, to the third input of which from the third 25 input of the device a signal is received Recording that prohibits the passage the playback addresses from the first and second inputs of the first switch 13 and allowing the passage of the write-address code from the fourth input of the first switch 13. At the same time, the recording signal goes to the input of the one-vibrator 22, which generates a signal for information from the first 23 inputs of the device to the first input of the memory block 14, post-output from the output of the one-shot 22 to the third (control) input of the memory block 14.

If it is necessary to display the recording address labels on the Screen (i.e. the state of the second register 17 specifying where the character is recorded in the screen, which is necessary when editing the information, the device receives a high level signal at the sixth and 28th input input element HE-4l 20, opening it. Simultaneously, the signal from the sixth 28 input of the device through the element NOT 21 goes to the control input of the single-vibrator 22, blocks it and prohibits the passage to the t4 memory of the information recording signal that makes it possible to enumerate the addresses of the memory block 14 on the second register 17 while displaying its state on the screen without spoiling the information in the cells of the memory block 14 18 and six (column address code) of counter 19. At the end of each regeneration cycle C: the output of the first counter 3, the control inputs of the fifth 18 and sixth 19 counters receive a signal that records its address code in its leading edge. Pulses from the first output of the frequency divider are reduced to the second input (input of the subtraction) of the second counter 18, reducing the contents of the fifth counter 18 by one synchronously with the change of the playback familiarity address in the second counter 10. Similarly to the SECOND input of the sixth counter 19, the third output pulses counter 11, decreasing the contents of the sixth counter 19 by one synchronously with the change of the replay column address in the fourth counter 12. As a result, the contents of the fifth 18 and sixth 19 counters will become zero at that the moment when the contents of the second 10 and fourth 12 counter becomes equal to the code of the address of the record,. currently present in the second register 17. At the same time, the low level signals from the outputs of the 18 and sixth 19 meters go to the first and second inputs of the NAND element 20, respectively, resulting in a high level signal from its output to the third input ( the chip select input) of the character generator 15, thereby prohibiting its selection, while high level signals are being removed from the output of the character generator for all code buses. visually displayed on the screen as a marker (glowing box) covering everything familiar. When the address mark of the desired familiarity is reached (by changing the owl on the device input 27), the signal at the sixth 28 input of the device is removed, which causes the one-shot 22 to unblock, and the information is recorded in

14 cell of memory.

I- ....

The device allows to display on the screen an indication of the current status of the address register register, which ensures prompt editing of the displayed information.

Claims (1)

Invention Formula Device for displaying information on the author No. 960920, which is designed so that, with the extension circuit of the field of application by ensuring the editing of the displayed information, enter -. Fifth and sixth counters, item NOT-AND, item NOT, one-shot and second register, the first and second inputs of which are respectively the fourth and fifth inputs of the device, the first output of the second register connected to the first input of the fifth counter and the fourth input the switch, the fifth input of which is connected to the second output of the second register connected to the first input of the sixth counter, the outputs of the fifth and sixth counter are connected respectively to the first and   . $, I the second inputs of the NE-Y element, the second inputs of the fifth and sixth meters are connected to the first output of the frequency divider and the output of the third Counter, the third inputs of the fifth and ffiecToro counters are connected to the second output of the first counter, the third input of the element is 2C Editor A.Vorovnch Compiled by L.Abrosimov Tehred M. Khodanich Proofreader I.Muska Order 5127/50 Tirad 455 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, st. Project, 4 2593336 the sixth input of the device connected through the element NOT to the first input of the single vibrator, the second input of which is the third input of the device, 5 the output of the single vibrator is connected to the third input of the memory unit, the output of the NE element is connected to the third input of the character generator.