SU1226453A1 - Microprogram control device - Google Patents

Abstract

The invention relates to the field of computer technology and is intended for use in digital computer control devices, microprocessor controlled machines, in particular, graphic display control devices. The purpose of the invention is to reduce equipment by reducing memory in multi-level branching. The purpose of the invention is achieved by introducing into the device a register memory of branches and a group of branch switches with corresponding functional connections between them and known blocks of the device. 1 hp f-ly, 1 ill. I with N: you 05 4 cl with

Description

The invention relates to the field of computer technology and is intended for use in control devices of digital computers with firmware control, in particular in control units for graphic displays.

The aim of the invention is to reduce the equipment by reducing the amount of memory in a multi-level branching-1.

The drawing shows a block diagram of the proposed firmware control device.

The device contains a memory of 1 micro-commands, a register of 2 micro-commands containing output 3 fields of micro-operations, output 4 fields of branches and output 5 of the code of the branch mode, register 6 addresses, block 7 of the choice of logical conditions, group 8 of inputs of logical conditions, group of switches 9 of branches, register memory There are 10 branches and a group of 11 exits. Block 7 contains a matrix of switches 12,

The device works as follows.

The group of 8 inputs into the device receives signals, the value of which depends on the algorithm of the firmware executed in the device. These signals are: machine command operation code, coming from the RAM memory register, signs that determine the results of the current and future microcommands, the status of the processor, RAM, external devices, various special equipment, signals coming from control panels of digital computers, etc.

The execution cycle of the micro-command is performed by reading from the memory 1 of the micro-commands the code of the next micro-command, which contains the control and address parts. In the address part, the K-bit address of the next micro-command is indicated, with the h lower-order bits of the address being modified during the execution of the micro-command, and the older K-n bits of the address go directly to address register 6. The control part of the micro-command is written to the register 2 of the micro-commands, while the exit code 3 is the floor of the micro-operations of the register 2 enters the outputs 11 of the device and controls the micro-operations

in blocks of digital computers, and outputs 4 and 5 control the formation of the lower bits of the address trace, wush; microcommands for it .- After completion of the formation

the lower bits of the microcommand address, the time of which is determined by the delay time of elements in block 7 and switches 9, the new address is entered into address register 6; After some time, determined by the delay of signals in memory 1 of microcommands, a code appears on its outputs the next micro-instruction, which is again entered into the register of 2 micro-instructions; Registering in registers 2 and b is effected by signals periodically received from a clock generator (not shown).

When unconditionally following a sequence of micro-commands in the field 5 of the micro-command, the following code is set, on receipt of which the lower-order values will be transmitted to the control inputs of the switches 9

bits of the address part of the microcommand. Thus, the address of the next micro-command will be completely determined by the address field of the micro-command being executed.

If it is necessary to change the order of micro-commands, depending on the value of any conditions, in the field 5 micro-commands a code is set that connects to

the outputs of the switches 9 signals from the outputs of block 7, and in the field 6 - the code, under the influence of which the output

unit 7, the signals of the analyzed conditions are selected, selected from a variety of conditions, arriving at a group of 8 inputs. Thus, the address of the following microcommand is determined depending on the value of the analyzed conditions.

If necessary, refer to

microsubroutine executes a microinstruction, which puts in K-and register 10 of memory a code that uniquely corresponds to the point of the algorithm,

from which the transition to the micro subroutine is performed. Writing to the branch registers is controlled by the code in field 4 of the microcommand, for which a special bit is allocated in this field, the unit in which causes writing to one of the registers (if its value is zero, the state of the registers does not change), and the remaining bits of the field 4, the recorded information and the number of the register in which recording is made is determined. In this case, the code in field 5 of the microcommand sets the passage to the lower bits of register 6 of the address of signals from the address part of the microcommand, therefore the state of the signals at the inputs and outputs of block 7 is indifferent. The address of the first microcommand of the desired firmware is indicated in the address field of this microcommand. At the end of the microprogram, the microcommand of the conditional transition is entered according to the value of the register 10 of the memory, the transfer of the values of which to the lower bits of the register 6 of the address is specified by the field 5 of this microcommand. Thus, according to the code previously entered in the R-register, the micro-subprogram is exited with the return to the point of the algorithm from which it was accessed. During the execution of a micro subprogram, it is possible to switch to another micro subprogram using some other memory register 10, etc.

The processing cycle of machine instructions is as follows. Gate recordings are sent to the register of 2 microcommands and the address register 6 permanently, and a sample of microcommands from the memory. 1 is carried out continuously.

After starting the digital computer, micro-commands of conditional transitions are usually performed on signals received from the digital computer control panel, as a result of which the microprogram for testing the specified operating mode is selected and the program start address is created in the RAM. Then, the command is sampled and one or several conditional transition microinstructions are performed using the command code signals received from the RAM memory register for a group of 8 device inputs. As a result of executing these microcommands, the microprogram of testing the selected command is selected, after completion of which a new command is selected from the RAM.

When a command is processed that affects the execution of subsequent commands, one or several registers of 10 memory codes are produced that uniquely correspond to

information of this command, and before working out commands that depend on the previous ones, microcommands of conditional transition by the value of those

registers in which information about the master command is stored.

In cases when it is necessary to change the state of the RAM memory register when processing a command, and then branch again according to the code of the command being processed, the codes defining this command are also pre-recorded in memory registers 10

and subsequently, branching is carried out not by the signals of the memory number register, but by the value of the corresponding memory registers 10.

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Claims (1)

1. A firmware control device containing a microinstructor memory, an address register, a block for selecting logical conditions and a microinstruction register, where the output of the microoperations register field of microcommands is the output of the device, the group of outputs of the field of microcommand register branches is connected to the group of control inputs of the logical selection unit conditions, the group of information inputs of which is connected to the group of inputs of the logical conditions of the device, the output the field of the microinstructions memory operation is connected to the information input of the register of microinstructions, the address input of the microinstructions memory is connected to the output of the address register, informational the higher-order inputs of which are connected to the outputs of the microcommand memory address field, characterized in that, in order to reduce the equipment by reducing the volume memory of microinstructions with multilevel branching, it contains a register memory of branches and a group of branching switches, and branch code outputs of the branch field the microinstructor register is connected to the information inputs of the branch register memory, the address inputs and the read entry of which are connected respectively to the outputs of the code of the level of the branch of the branch of the register of the microcommands and with the output of the sign of the mode of the field of the branches of the register of microinstructions, outputs 51 branch modes of which are connected to the control inputs of the branch switches of the group, the first and second information inputs of which are connected respectively to the outputs of the logic condition selector unit and the corresponding outputs of the register branch memory, the outputs of the group branch switches are connected to the information inputs of the lower address register. 264536 2, The device according to A.1, concerning the fact that the logical condition selection unit is executed on the matrix of switches, the control inputs of the matrix switches are connected to the group of control inputs of the block, the information inputs matrix switches and their outputs are connected respectively to the group of information inputs of the block and to the outputs of the block. ten  edaktor T. Kugrsheva Compiled by Y. Lantsov Tehred V. Kadar Proof-reader I. Erdeyi, Order 2134/48 Circulation 671 Subscription VNIIGSh State Committee of the USSR for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, st. Project, 4