SU1210222A1 - Device for measuring differential non-linearity of analog-to-digital converter - Google Patents

Description

The invention relates to a measuring and measuring technique and can be used for the expert examination and technological control of analog-to-digital converters (ADC) and digital voltmeters.

The aim of the invention is to increase speed.

The drawing shows a structural electrical circuit of the device.

The device contains a source of reference voltage, total. block 2 5 converter 3 code - for voltage (PKN), first 4 and second 5 reversible counters, generator 6 1-1 pulses 5 block 7 comparison of codes, second 8 and third 9 triggers, counter 10, element 11, controlled by the ADC 12,

The proposed device makes it possible to measure the average value of the differential nonlinearity of the ADC, which is defined as the difference of two neighboring quanta corresponding to the csc codes. NO and NO + I

.f

h

., 1; (and „1-; (m. N)

AI (p p J

where cij ((, (No + 1)) are the instantaneous sizes of the angles of the angles of the digital converter, corresponding to the codes MD and Wp +;

n is the total number of block failures; a 7 comparison of the codes at the output of the. and, moreover, n must be even.

Before starting operation, the output bus is also connected to the corresponding inputs of the ADC, whose outputs are connected to the input bus of the device. In the initial state, the pulses at the generator output. 6 pulses are absent, counters 4 and also R5 trigger 8 and 9 are reset, are in the zero state. At the output of source 1 of the reference voltage, there is a voltage corresponding to the nominal value of the boundary between Wg and Id +1 quan. ADC. However, in real ADCs, this voltage may not coincide with the indicated level.

At the initial moment, the input of the I / D converter I2 is supplied only by the source voltage 1 of the reference voltage, taking into account the error of the zero PKN 3 and the back-up unit: 2, On a Start signal, the generator 6 starts polling

10222

controlled ADC 12, in the general case, a production code appears at its output, Allow the initial code at the output of the 12 M N ADC, one: An identical signal from the output code N j, Ng of the code comparison unit 7 sets the RS-triggers 8 and 9 in the unit state 5 that allows the passage of the signal from the output of the K M block

40 7 comparison of the codes to the counting input of the counter 10, and the counting pulses from the output of the generator 6 zvdpulsov begin to sum up in a reversible counter 4. The voltage on the drive

15 PKN 3, and, therefore, summing block 2 begins to increase and (as time passes, it reaches the boundary between the quanta — where is the single signal from the output

20 N о of the code comparison unit 7 permits the summation of the counting pulses from the pulse of the generator of 6 pulses in the reversing counter 5. At the moment I the occurrence of a single difference on

 At the output N J, NJJ + I of the code comparison block 7, a zero difference appears at the output N of the code comparison block 7, which changes the state of the counter. 10 by one,

30 and the counting pulses from the generator output 6 of the pulses start to be subtracted in the reversible counter: e 5. When a single difference occurs at the output NJ p M +1 of the comparison block 7.

The 35 codes R6-trigger 9 switches to the one state inverse. out. At the same time, the output voltage PKN 3 starts to decrease, and the reversible counter 5 stores its state 40. At the moment of the appearance of a single signal N ,, io - the corresponding output of the code comparison unit 7, the sh-pulses from the generator output b of the pulses again begin to read. at

45 when the output voltage of the summing unit 2 crosses the transition boundary between the quanta, the pulses from the output of the generator 6 again begin to sum in the reversing counter 5. When a zero appears

50

differential output

 N.

block 7

By comparing the codes, the state of the counter 10 is again changed by one, and 55 the voltage at the output of the PCN 3 starts to increase again. Thus, in the reversible counter 5, a code is established proportional to the difference of two instantaneous values of the neighboring quanta of the ADC 12 q (Nj) and

ii () Next, the measurement process proceeds as outlined above until the moment when an overflow pulse appears in the meter 10, indicating

i, (no-fl h

where r is the angle determined by the rate of change of the output voltage PKN 3 which depends, in turn, on the frequency of the generator 6 pulses and the size of the quantum PKN 3,

If in the initial state N m, the voltage at the output of the PCN 3 from the beginning

12102224

on the arrival at its input of the h-th counting pulse. A transfer pulse from the output of counter 10 will stop the generator of 6 pulses. As a result, a code proportional to time T, which is equal to

l (0 /

AMifV

N „+1

§

about

 }

It will kill until the appearance of a single signal at the output. N i Ng of block 7 of code comparison, 15 which switches the RS-flip-flop 8 to one state. Further, the device will work as described above.

Claims (1)

4) 1.57) DEVICE FOR MEASURING DIFFERENTIAL NONLINEARITY OF ANALOG-DIGITAL CONVERTERS, containing - series-connected reference voltage source and summing unit, pulse generator, code-voltage converter, code comparison unit, the first inputs of which are the reference code bus, and the second inputs are the input code bus, and the second bus, the first reversible counter, the outputs of which are connected to the inputs of the code-voltage converter, the output of the summing block is the first output bus, and the output of the pulse generator is I am the second output bus, characterized in that, in order to improve performance, a second reversible counter, two R5 triggers, a counter, an And element, the first input of which is combined with the first input of the second reversible counter and connected to the first output of the code comparison unit, are introduced into it , the second output of which is connected to the first input of the first RS trigger, and the third output, respectively, with the second and first inputs of the first and second RS triggers, the first and second outputs of the first RS trigger are connected to the first and second inputs of the first reverse respectively, the third input of which is combined with the second input of the second 'reverse counter and connected to the output of the pulse generator, the first input of which is combined with the second input of the second RS trigger and connected to the output of the counter, the input of which is connected to the output of the element And, the second input of which is connected with the output of the second R5 trigger, and the fourth output of the code comparison unit is connected to the third input of the second reverse counter, the outputs of which are the third output bus, while the second input of the pulse generator It is connected to the Start bus, and the code-voltage converter output is connected to the second input of the summing block.