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SG11201901196RA - Wafer-level package with enhanced performance - Google Patents

Wafer-level package with enhanced performance

Info

Publication number
SG11201901196RA
SG11201901196RA SG11201901196RA SG11201901196RA SG11201901196RA SG 11201901196R A SG11201901196R A SG 11201901196RA SG 11201901196R A SG11201901196R A SG 11201901196RA SG 11201901196R A SG11201901196R A SG 11201901196RA SG 11201901196R A SG11201901196R A SG 11201901196RA
Authority
SG
Singapore
Prior art keywords
international
redistribution
thinned die
mold compound
multilayer
Prior art date
Application number
SG11201901196RA
Inventor
Jan Vandemeer
Jonathan Hammond
Julio Costa
Original Assignee
Qorvo Us Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qorvo Us Inc filed Critical Qorvo Us Inc
Publication of SG11201901196RA publication Critical patent/SG11201901196RA/en

Links

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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00777—Preserve existing structures from alteration, e.g. temporary protection during manufacturing
    • B81C1/00785—Avoid chemical alteration, e.g. contamination, oxidation or unwanted etching
    • B81C1/00801—Avoid alteration of functional structures by etching, e.g. using a passivation layer or an etch stop layer
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0009—Structural features, others than packages, for protecting a device against environmental influences
    • B81B7/0025—Protection against chemical alteration
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032—Packages or encapsulation
    • B81B7/007—Interconnections between the MEMS and external electrical signals
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00222—Integrating an electronic processing unit with a micromechanical structure
    • B81C1/0023—Packaging together an electronic processing unit die and a micromechanical structure die
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
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    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
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    • B—PERFORMING OPERATIONS; TRANSPORTING
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    • B81B2207/00—Microstructural systems or auxiliary parts thereof
    • B81B2207/07—Interconnects
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
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    • B81B2207/09—Packages
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    • B81B2207/094—Feed-through, via
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    • B81B2207/11—Structural features, others than packages, for protecting a device against environmental influences
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    • H01L2223/54486—Located on package parts, e.g. encapsulation, leads, package substrate
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    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
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  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • General Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Materials Engineering (AREA)
  • Micromachines (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property -C.-- -.` 1#11111110111010101111101 1010 01111 OM 0111110111011101110111011# Organization International Bureau (10) International Publication Number 03 (43) International Publication Date .../ WO 2018/031999 Al 15 February 2018 (15.02.2018) WIP0 I PCT (51) International Patent Classification: (72) Inventors: HO1L 23/31 (2006.01) H01L 21/60 (2006.01) erfield Lane, HO1L 21/56 (2006.01) HAMMOND, (21) International Application Number: Oak Ridge, PCT/US2017/046779 6601 Ashton (US). (22) International Filing Date: (74) Agent: WITHROW, 14 August 2017 (14.08.2017) va, P.L.L.C., (25) Filing Language: English olina 27511 (26) Publication Language: English (81) Designated kind of national (30) Priority Data: AO, AT, AU, 62/374,447 12 August 2016 (12.08.2016) US CA, CH, CL, (71) Applicant: QORVO US, INC. [US/US]; 7628 Thorndike DZ, EC, EE, Road, Greensboro, North Carolina 27409 (US). HR, HU, ID, IL, IN, KR, KW, MG, MK, North Carolina 27310 (US). COSTA, Julio, C.; Park Drive, Oak Ridge, North Carolina 27310 VANDEMEER, Kernersville, Jonathan, Jan, Edward; 279 Weath- North Carolina 27284 (US). Hale; 5808 Autumn Gate Drive, Benjamin, S.; Withrow & Terrano- Pinedale Springs Way, Cary, North Car- (unless otherwise indicated, for every available): AE, AG, AL, AM, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, ES, FI, GB, GD, GE, GH, GM, GT, HN, IR, IS, JO, JP, KE, KG, KH, KN, KP, LC, LK, LR, LS, LU, LY, MA, MD, ME, MX, MY, MZ, NA, NG, NI, NO, NZ, protection 106 (US). States AZ, CN, EG, KZ, LA, MN, MW, (54) Title: WAFER — -LEVEL PACKAGE WITH ENHANCED PERFORMANCE 2 38 42 redistribution layer (24) the first device between the redistribution within the the top surface = = _ = — = = = 24 : 6 . „ = = . . ' . = 18 : (18), from to package and mold compound and over the first thinned die. the first thinned die. (57) 01 structure M redistribution interconnects and --.... structure W . 7 7: / t , . ,,, , . . 6 L y c l +.,,,,, , AV • 0 6 ••. . , -- 4 l ' 40 ,,,, ;/07. 7 . '-', /-:1-. % J = 46 44 The present disclosure relates to a wafer-level package that includes a first thinned die (12), a a first mold compound glass materials. contacts (44) around the first thinned die, and extends A (20), and The multilayer redistribution on a bottom surface the first device layer are solder-free. The first mold compound resides over the 44 46 44 46 FIG. i a second mold compound (22). The first thinned die includes a first device structure includes redistribution interconnects that of the multilayer redistribution beyond a top surface of the first thinned die to define The second mold compound fills the opening and is in contact 44 46 44 multilayer connect multilayer an opening with = = = ,-1 C'N formed 01 ,1 layer 0 GC first 1-1 C of N structure. Herein, the connections C [Continued on next page] WO 2018/031999 Al MIDEDIMOMOIDEIREEMODHOMMEHOHOMEin OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (84) Designated States (unless otherwise indicated, for every kind of regional protection available): ARIPO (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG). Published: — with international search report (Art. 21(3)) — with amended claims and statement (Art. 19(1))
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Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10085352B2 (en) 2014-10-01 2018-09-25 Qorvo Us, Inc. Method for manufacturing an integrated circuit package
US10784149B2 (en) 2016-05-20 2020-09-22 Qorvo Us, Inc. Air-cavity module with enhanced device isolation
US10773952B2 (en) 2016-05-20 2020-09-15 Qorvo Us, Inc. Wafer-level package with enhanced performance
US10103080B2 (en) 2016-06-10 2018-10-16 Qorvo Us, Inc. Thermally enhanced semiconductor package with thermal additive and process for making the same
JP7022112B2 (en) * 2016-08-12 2022-02-17 コーボ ユーエス，インコーポレイティド Wafer level package with improved performance
JP7037544B2 (en) 2016-08-12 2022-03-16 コーボ ユーエス，インコーポレイティド Wafer level package with improved performance
US10109502B2 (en) 2016-09-12 2018-10-23 Qorvo Us, Inc. Semiconductor package with reduced parasitic coupling effects and process for making the same
US10068831B2 (en) 2016-12-09 2018-09-04 Qorvo Us, Inc. Thermally enhanced semiconductor package and process for making the same
US10490471B2 (en) 2017-07-06 2019-11-26 Qorvo Us, Inc. Wafer-level packaging for enhanced performance
US10784233B2 (en) 2017-09-05 2020-09-22 Qorvo Us, Inc. Microelectronics package with self-aligned stacked-die assembly
US11152363B2 (en) 2018-03-28 2021-10-19 Qorvo Us, Inc. Bulk CMOS devices with enhanced performance and methods of forming the same utilizing bulk CMOS process
WO2019195428A1 (en) 2018-04-04 2019-10-10 Qorvo Us, Inc. Gallium-nitride-based module with enhanced electrical performance and process for making the same
US12046505B2 (en) 2018-04-20 2024-07-23 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same utilizing localized SOI formation
US10804246B2 (en) 2018-06-11 2020-10-13 Qorvo Us, Inc. Microelectronics package with vertically stacked dies
US12165951B2 (en) 2018-07-02 2024-12-10 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same
US11069590B2 (en) 2018-10-10 2021-07-20 Qorvo Us, Inc. Wafer-level fan-out package with enhanced performance
US10964554B2 (en) 2018-10-10 2021-03-30 Qorvo Us, Inc. Wafer-level fan-out package with enhanced performance
US11646242B2 (en) 2018-11-29 2023-05-09 Qorvo Us, Inc. Thermally enhanced semiconductor package with at least one heat extractor and process for making the same
US12046570B2 (en) 2019-01-23 2024-07-23 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same
US12046483B2 (en) 2019-01-23 2024-07-23 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same
US12125825B2 (en) 2019-01-23 2024-10-22 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same
US12057374B2 (en) 2019-01-23 2024-08-06 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same
US11923313B2 (en) 2019-01-23 2024-03-05 Qorvo Us, Inc. RF device without silicon handle substrate for enhanced thermal and electrical performance and methods of forming the same
US11387157B2 (en) 2019-01-23 2022-07-12 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same
CN110233139B (en) * 2019-06-18 2021-12-03 青岛歌尔微电子研究院有限公司 Circuit unit packaging method
US11948855B1 (en) * 2019-09-27 2024-04-02 Rockwell Collins, Inc. Integrated circuit (IC) package with cantilever multi-chip module (MCM) heat spreader
US12074086B2 (en) 2019-11-01 2024-08-27 Qorvo Us, Inc. RF devices with nanotube particles for enhanced performance and methods of forming the same
US11646289B2 (en) 2019-12-02 2023-05-09 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same
US11923238B2 (en) 2019-12-12 2024-03-05 Qorvo Us, Inc. Method of forming RF devices with enhanced performance including attaching a wafer to a support carrier by a bonding technique without any polymer adhesive
US12129168B2 (en) 2019-12-23 2024-10-29 Qorvo Us, Inc. Microelectronics package with vertically stacked MEMS device and controller device
WO2022186857A1 (en) 2021-03-05 2022-09-09 Qorvo Us, Inc. Selective etching process for si-ge and doped epitaxial silicon

Family Cites Families (206)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS505733Y1 (en) 1970-02-23 1975-02-18
JPS6013257B2 (en) 1976-02-20 1985-04-05 松下電器産業株式会社 Secondary electron multiplier and its manufacturing method
US4366202A (en) 1981-06-19 1982-12-28 Kimberly-Clark Corporation Ceramic/organic web
US5061663A (en) 1986-09-04 1991-10-29 E. I. Du Pont De Nemours And Company AlN and AlN-containing composites
US5069626A (en) 1987-07-01 1991-12-03 Western Digital Corporation Plated plastic castellated interconnect for electrical components
US5013681A (en) 1989-09-29 1991-05-07 The United States Of America As Represented By The Secretary Of The Navy Method of producing a thin silicon-on-insulator layer
JP2821830B2 (en) 1992-05-14 1998-11-05 セイコーインスツルメンツ株式会社 Semiconductor thin film device and its application device and method of manufacturing semiconductor thin film device
EP0603850B1 (en) 1992-12-24 2004-06-09 Canon Kabushiki Kaisha Plastic additive, plastic composition containing the additive and plastic molding containing the additive
US5459368A (en) 1993-08-06 1995-10-17 Matsushita Electric Industrial Co., Ltd. Surface acoustic wave device mounted module
DE4329696C2 (en) 1993-09-02 1995-07-06 Siemens Ag Multichip module with SMD-compatible connection elements that can be surface-mounted on printed circuit boards
US5391257A (en) 1993-12-10 1995-02-21 Rockwell International Corporation Method of transferring a thin film to an alternate substrate
CN1099158C (en) 1994-05-02 2003-01-15 埃普科斯股份有限公司 Encapsulation for electronic components
US6124179A (en) 1996-09-05 2000-09-26 Adamic, Jr.; Fred W. Inverted dielectric isolation process
JP3301262B2 (en) 1995-03-28 2002-07-15 松下電器産業株式会社 Surface acoustic wave device
US5729075A (en) 1995-06-12 1998-03-17 National Semiconductor Corporation Tuneable microelectromechanical system resonator
US6013948A (en) 1995-11-27 2000-01-11 Micron Technology, Inc. Stackable chip scale semiconductor package with mating contacts on opposed surfaces
EP0794616B1 (en) 1996-03-08 2003-01-29 Matsushita Electric Industrial Co., Ltd. An electronic part and a method of production thereof
US5709960A (en) 1996-06-21 1998-01-20 Motorola, Inc. Mold compound
US6250192B1 (en) 1996-11-12 2001-06-26 Micron Technology, Inc. Method for sawing wafers employing multiple indexing techniques for multiple die dimensions
US6117705A (en) 1997-04-18 2000-09-12 Amkor Technology, Inc. Method of making integrated circuit package having adhesive bead supporting planar lid above planar substrate
JP3565547B2 (en) 1998-07-31 2004-09-15 シャープ株式会社 Color liquid crystal display device and method of manufacturing the same
US6236061B1 (en) 1999-01-08 2001-05-22 Lakshaman Mahinda Walpita Semiconductor crystallization on composite polymer substrates
US6271469B1 (en) * 1999-11-12 2001-08-07 Intel Corporation Direct build-up layer on an encapsulated die package
US6154366A (en) * 1999-11-23 2000-11-28 Intel Corporation Structures and processes for fabricating moisture resistant chip-on-flex packages
JP4528397B2 (en) 1999-12-17 2010-08-18 ポリマテック株式会社 Bonding method and electronic component
US6426559B1 (en) 2000-06-29 2002-07-30 National Semiconductor Corporation Miniature 3D multi-chip module
US6713859B1 (en) * 2000-09-13 2004-03-30 Intel Corporation Direct build-up layer on an encapsulated die package having a moisture barrier structure
US6423570B1 (en) * 2000-10-18 2002-07-23 Intel Corporation Method to protect an encapsulated die package during back grinding with a solder metallization layer and devices formed thereby
US20020070443A1 (en) * 2000-12-08 2002-06-13 Xiao-Chun Mu Microelectronic package having an integrated heat sink and build-up layers
US6555906B2 (en) * 2000-12-15 2003-04-29 Intel Corporation Microelectronic package having a bumpless laminated interconnection layer
US6943429B1 (en) 2001-03-08 2005-09-13 Amkor Technology, Inc. Wafer having alignment marks extending from a first to a second surface of the wafer
US6706553B2 (en) * 2001-03-26 2004-03-16 Intel Corporation Dispensing process for fabrication of microelectronic packages
US6596570B2 (en) 2001-06-06 2003-07-22 International Business Machines Corporation SOI device with reduced junction capacitance
US7332819B2 (en) 2002-01-09 2008-02-19 Micron Technology, Inc. Stacked die in die BGA package
US6841413B2 (en) * 2002-01-07 2005-01-11 Intel Corporation Thinned die integrated circuit package
DE10206919A1 (en) 2002-02-19 2003-08-28 Infineon Technologies Ag Production of a cover for a region of a substrate used for a SAW or BAW filter or a micromechanical element comprises forming a frame structure in the region of the substrate, and applying a lid structure on the frame structure
KR100476901B1 (en) 2002-05-22 2005-03-17 삼성전자주식회사 Method of forming SOI(Silicon-On-Insulator) semiconductor substrate
US7042072B1 (en) 2002-08-02 2006-05-09 Amkor Technology, Inc. Semiconductor package and method of manufacturing the same which reduces warpage
US7710771B2 (en) 2002-11-20 2010-05-04 The Regents Of The University Of California Method and apparatus for capacitorless double-gate storage
WO2004061961A1 (en) 2002-12-31 2004-07-22 Massachusetts Institute Of Technology Multi-layer integrated semiconductor structure having an electrical shielding portion
US6855606B2 (en) 2003-02-20 2005-02-15 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor nano-rod devices
KR100486627B1 (en) 2003-02-21 2005-05-03 엘지전자 주식회사 Semiconductor package
JP3917946B2 (en) 2003-03-11 2007-05-23 富士通株式会社 Multilayer semiconductor device
US6864156B1 (en) 2003-04-04 2005-03-08 Xilinx, Inc. Semiconductor wafer with well contacts on back side
US7596849B1 (en) 2003-06-11 2009-10-06 Triquint Semiconductor, Inc. Method of assembling a wafer-level package filter
US7109635B1 (en) 2003-06-11 2006-09-19 Sawtek, Inc. Wafer level packaging of materials with different coefficients of thermal expansion
WO2005010987A1 (en) 2003-07-24 2005-02-03 Matsushita Electric Industrial Co., Ltd. Wiring board embedded with spherical semiconductor element
JP2005064188A (en) 2003-08-11 2005-03-10 Sumitomo Electric Ind Ltd Substrate recovery method and recycling method, and semiconductor wafer manufacturing method
KR20060120224A (en) 2003-12-25 2006-11-24 제이에스알 가부시끼가이샤 Thermoplastic Elastomer Compositions, Methods for Manufacturing the Same, and Molded Articles
US7489032B2 (en) 2003-12-25 2009-02-10 Casio Computer Co., Ltd. Semiconductor device including a hard sheet to reduce warping of a base plate and method of fabricating the same
US6992400B2 (en) 2004-01-30 2006-01-31 Nokia Corporation Encapsulated electronics device with improved heat dissipation
US20050212419A1 (en) 2004-03-23 2005-09-29 Eastman Kodak Company Encapsulating oled devices
JP3925809B2 (en) 2004-03-31 2007-06-06 カシオ計算機株式会社 Semiconductor device and manufacturing method thereof
JP4398305B2 (en) 2004-06-02 2010-01-13 カシオ計算機株式会社 Semiconductor device and manufacturing method thereof
JP3801601B2 (en) 2004-06-15 2006-07-26 シャープ株式会社 Manufacturing method of semiconductor wafer provided with lid and manufacturing method of semiconductor device
US7238560B2 (en) 2004-07-23 2007-07-03 Cree, Inc. Methods of fabricating nitride-based transistors with a cap layer and a recessed gate
US7591958B2 (en) * 2004-09-14 2009-09-22 Stmicroelectronics Sa Thin glass chip for an electronic component and manufacturing method
US20060099733A1 (en) 2004-11-09 2006-05-11 Geefay Frank S Semiconductor package and fabrication method
US7098070B2 (en) 2004-11-16 2006-08-29 International Business Machines Corporation Device and method for fabricating double-sided SOI wafer scale package with through via connections
TWI259538B (en) 2004-11-22 2006-08-01 Au Optronics Corp Thin film transistor and fabrication method thereof
US7519257B2 (en) 2004-11-24 2009-04-14 Cornell Research Foundation, Inc. Waveguide structure for guiding light in low-index material
US7393770B2 (en) 2005-05-19 2008-07-01 Micron Technology, Inc. Backside method for fabricating semiconductor components with conductive interconnects
US7619347B1 (en) 2005-05-24 2009-11-17 Rf Micro Devices, Inc. Layer acoustic wave device and method of making the same
WO2006134928A1 (en) 2005-06-16 2006-12-21 Murata Manufacturing Co., Ltd. Piezoelectric device and manufacturing method thereof
JP4644577B2 (en) 2005-09-30 2011-03-02 セイコーエプソン株式会社 Semiconductor device and manufacturing method of semiconductor device
US8465175B2 (en) 2005-11-29 2013-06-18 GE Lighting Solutions, LLC LED lighting assemblies with thermal overmolding
WO2007074651A1 (en) 2005-12-26 2007-07-05 Sharp Kabushiki Kaisha Solid state imaging element module fabrication method
JP4476939B2 (en) 2006-01-12 2010-06-09 株式会社東芝 Semiconductor device
US20070194342A1 (en) 2006-01-12 2007-08-23 Kinzer Daniel M GaN SEMICONDUCTOR DEVICE AND PROCESS EMPLOYING GaN ON THIN SAPHIRE LAYER ON POLYCRYSTALLINE SILICON CARBIDE
US20070190747A1 (en) 2006-01-23 2007-08-16 Tessera Technologies Hungary Kft. Wafer level packaging to lidded chips
US7863727B2 (en) * 2006-02-06 2011-01-04 Micron Technology, Inc. Microelectronic devices and methods for manufacturing microelectronic devices
JP4591378B2 (en) 2006-02-21 2010-12-01 株式会社デンソー Manufacturing method of semiconductor device
US20070243662A1 (en) 2006-03-17 2007-10-18 Johnson Donald W Packaging of MEMS devices
KR101478810B1 (en) 2006-07-28 2015-01-02 가부시키가이샤 한도오따이 에네루기 켄큐쇼 Power storage device
US7749882B2 (en) * 2006-08-23 2010-07-06 Micron Technology, Inc. Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices
KR20080017965A (en) 2006-08-23 2008-02-27 삼성전자주식회사 Manufacturing Method of Display Board for Flexible Display
US7960218B2 (en) 2006-09-08 2011-06-14 Wisconsin Alumni Research Foundation Method for fabricating high-speed thin-film transistors
US7888742B2 (en) 2007-01-10 2011-02-15 International Business Machines Corporation Self-aligned metal-semiconductor alloy and metallization for sub-lithographic source and drain contacts
JP2008235490A (en) 2007-03-19 2008-10-02 Sumitomo Bakelite Co Ltd Hollow structure and manufacturing method therefor
US8183151B2 (en) 2007-05-04 2012-05-22 Micron Technology, Inc. Methods of forming conductive vias through substrates, and structures and assemblies resulting therefrom
US20080277778A1 (en) 2007-05-10 2008-11-13 Furman Bruce K Layer Transfer Process and Functionally Enhanced Integrated Circuits Products Thereby
JP2008279567A (en) 2007-05-11 2008-11-20 Denso Corp Manufacturing method of semi-conductor apparatus
US7553752B2 (en) 2007-06-20 2009-06-30 Stats Chippac, Ltd. Method of making a wafer level integration package
KR20090004147A (en) 2007-07-06 2009-01-12 삼성전자주식회사 Semiconductor element and method of forming the same
US20090014856A1 (en) 2007-07-10 2009-01-15 International Business Machine Corporation Microbump seal
JP5013467B2 (en) 2007-07-18 2012-08-29 株式会社デンソー Manufacturing method of semiconductor device
US9391588B2 (en) 2007-08-31 2016-07-12 Rf Micro Devices, Inc. MEMS vibrating structure using an orientation dependent single-crystal piezoelectric thin film layer
US9941245B2 (en) * 2007-09-25 2018-04-10 Intel Corporation Integrated circuit packages including high density bump-less build up layers and a lesser density core or coreless substrate
US7868419B1 (en) 2007-10-18 2011-01-11 Rf Micro Devices, Inc. Linearity improvements of semiconductor substrate based radio frequency devices
US7790543B2 (en) 2008-01-11 2010-09-07 International Business Machines Corporation Device structures for a metal-oxide-semiconductor field effect transistor and methods of fabricating such device structures
JP4840373B2 (en) 2008-01-31 2011-12-21 カシオ計算機株式会社 Semiconductor device and manufacturing method thereof
US20110102002A1 (en) 2008-04-09 2011-05-05 Riehl Bill L Electrode and sensor having carbon nanostructures
US20100012354A1 (en) 2008-07-14 2010-01-21 Logan Brook Hedin Thermally conductive polymer based printed circuit board
US8236609B2 (en) * 2008-08-01 2012-08-07 Freescale Semiconductor, Inc. Packaging an integrated circuit die with backside metallization
US7843072B1 (en) 2008-08-12 2010-11-30 Amkor Technology, Inc. Semiconductor package having through holes
JP4638530B2 (en) 2008-08-19 2011-02-23 日本電波工業株式会社 Piezoelectric component and manufacturing method thereof
US20100081237A1 (en) 2008-09-30 2010-04-01 Avago Technologies Fiber Ip (Singapore) Pte. Ltd. Integrated Circuit Assemblies and Methods for Encapsulating a Semiconductor Device
US9059174B2 (en) 2008-11-05 2015-06-16 Stmicroelectronics, Inc. Method to reduce metal fuse thickness without extra mask
JP5468242B2 (en) 2008-11-21 2014-04-09 株式会社東芝 MEMS package and method for manufacturing MEMS package
US7927904B2 (en) 2009-01-05 2011-04-19 Dalsa Semiconductor Inc. Method of making BIOMEMS devices
JP5556072B2 (en) 2009-01-07 2014-07-23 ソニー株式会社 Semiconductor device, method of manufacturing the same, and millimeter wave dielectric transmission device
JP4984179B2 (en) 2009-02-06 2012-07-25 ソニー株式会社 Semiconductor device
US8508056B2 (en) 2009-06-16 2013-08-13 Dongbu Hitek Co., Ltd. Heat releasing semiconductor package, method for manufacturing the same, and display apparatus including the same
JP5175803B2 (en) 2009-07-01 2013-04-03 新光電気工業株式会社 Manufacturing method of semiconductor device
US8921168B2 (en) 2009-07-15 2014-12-30 Silanna Semiconductor U.S.A., Inc. Thin integrated circuit chip-on-board assembly and method of making
US8432016B1 (en) 2009-07-29 2013-04-30 Rf Micro Devices, Inc. Stacked body-contacted field effect transistor
EP2460180B1 (en) 2009-07-30 2020-02-19 QUALCOMM Incorporated System-in packages
TW201115755A (en) 2009-08-17 2011-05-01 First Solar Inc Barrier layer
US8164158B2 (en) * 2009-09-11 2012-04-24 Stats Chippac, Ltd. Semiconductor device and method of forming integrated passive device
US8362599B2 (en) 2009-09-24 2013-01-29 Qualcomm Incorporated Forming radio frequency integrated circuits
WO2011060558A1 (en) 2009-11-18 2011-05-26 Sensirion Ag Sensor mounted in flip-chip technology on a substrate
US9202769B2 (en) * 2009-11-25 2015-12-01 Stats Chippac, Ltd. Semiconductor device and method of forming thermal lid for balancing warpage and thermal management
US8030145B2 (en) 2010-01-08 2011-10-04 International Business Machines Corporation Back-gated fully depleted SOI transistor
US9196509B2 (en) 2010-02-16 2015-11-24 Deca Technologies Inc Semiconductor device and method of adaptive patterning for panelized packaging
US9576919B2 (en) * 2011-12-30 2017-02-21 Deca Technologies Inc. Semiconductor device and method comprising redistribution layers
US9431316B2 (en) * 2010-05-04 2016-08-30 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming channels in back surface of FO-WLCSP for heat dissipation
JP5584011B2 (en) * 2010-05-10 2014-09-03 新光電気工業株式会社 Manufacturing method of semiconductor package
JP2011248072A (en) 2010-05-26 2011-12-08 Hitachi Displays Ltd Method of manufacturing image display device
US8557679B2 (en) 2010-06-30 2013-10-15 Corning Incorporated Oxygen plasma conversion process for preparing a surface for bonding
KR101698932B1 (en) 2010-08-17 2017-01-23 삼성전자 주식회사 Semiconductor Package And Method For Manufacturing The Same
US8551798B2 (en) 2010-09-21 2013-10-08 Taiwan Semiconductor Manufacturing Company, Ltd. Microstructure with an enhanced anchor
US20120094418A1 (en) 2010-10-18 2012-04-19 Triquint Semiconductor, Inc. Wafer Level Package and Manufacturing Method Using Photodefinable Polymer for Enclosing Acoustic Devices
US8716051B2 (en) 2010-10-21 2014-05-06 Taiwan Semiconductor Manufacturing Company, Ltd. MEMS device with release aperture
CN102456737B (en) 2010-10-27 2016-03-30 中国科学院微电子研究所 Semiconductor structure and manufacturing method thereof
KR20120053332A (en) 2010-11-17 2012-05-25 삼성전자주식회사 Semiconductor package and method of forming the same
US8492210B2 (en) 2010-12-17 2013-07-23 Institute of Microelectronics, Chinese Academy of Sciences Transistor, semiconductor device comprising the transistor and method for manufacturing the same
US8716800B2 (en) 2010-12-31 2014-05-06 Institute of Microelectronics, Chinese Academy of Sciences Semiconductor structure and method for manufacturing the same
US8420447B2 (en) 2011-03-23 2013-04-16 Stats Chippac Ltd. Integrated circuit packaging system with flipchip leadframe and method of manufacture thereof
US8399957B2 (en) 2011-04-08 2013-03-19 International Business Machines Corporation Dual-depth self-aligned isolation structure for a back gate electrode
US8507989B2 (en) 2011-05-16 2013-08-13 International Business Machine Corporation Extremely thin semiconductor-on-insulator (ETSOI) FET with a back gate and reduced parasitic capacitance
US8415743B2 (en) 2011-05-24 2013-04-09 International Business Machines Corporation ETSOI CMOS with back gates
US9633854B2 (en) 2011-06-23 2017-04-25 Institute of Microelectronics, Chinese Academy of Sciences MOSFET and method for manufacturing the same
US8772853B2 (en) 2011-07-12 2014-07-08 The Regents Of The University Of California All graphene flash memory device
US9390364B2 (en) 2011-08-08 2016-07-12 Féinics Amatech Teoranta Transponder chip module with coupling frame on a common substrate for secure and non-secure smartcards and tags
US9064883B2 (en) * 2011-08-25 2015-06-23 Intel Mobile Communications GmbH Chip with encapsulated sides and exposed surface
CN102983116B (en) 2011-09-07 2015-09-30 中国科学院微电子研究所 Semiconductor substrate, integrated circuit having the same, and method of manufacturing the same
US8963321B2 (en) 2011-09-12 2015-02-24 Infineon Technologies Ag Semiconductor device including cladded base plate
CN103000537B (en) * 2011-09-15 2015-12-09 万国半导体股份有限公司 Encapsulating structure of a kind of wafer scale and preparation method thereof
CN103000671B (en) 2011-09-16 2015-07-15 中国科学院微电子研究所 Mosfet and manufacturing method thereof
US9368429B2 (en) 2011-10-25 2016-06-14 Intel Corporation Interposer for hermetic sealing of sensor chips and for their integration with integrated circuit chips
US9190391B2 (en) * 2011-10-26 2015-11-17 Maxim Integrated Products, Inc. Three-dimensional chip-to-wafer integration
US8664044B2 (en) 2011-11-02 2014-03-04 Stmicroelectronics Pte Ltd. Method of fabricating land grid array semiconductor package
US8643148B2 (en) 2011-11-30 2014-02-04 Taiwan Semiconductor Manufacturing Company, Ltd. Chip-on-Wafer structures and methods for forming the same
KR20130064289A (en) 2011-12-08 2013-06-18 에스케이하이닉스 주식회사 Semiconductor device and method for manufacturing the same
US20130193445A1 (en) 2012-01-26 2013-08-01 International Business Machines Corporation Soi structures including a buried boron nitride dielectric
KR101918608B1 (en) * 2012-02-28 2018-11-14 삼성전자 주식회사 Semiconductor package
US8835978B2 (en) 2012-05-14 2014-09-16 Infineon Technologies Ag Lateral transistor on polymer
KR101970291B1 (en) 2012-08-03 2019-04-18 삼성전자주식회사 Methods of manufacturing semiconductor packages
US8963336B2 (en) 2012-08-03 2015-02-24 Samsung Electronics Co., Ltd. Semiconductor packages, methods of manufacturing the same, and semiconductor package structures including the same
JP6024400B2 (en) 2012-11-07 2016-11-16 ソニー株式会社 Semiconductor device, method for manufacturing semiconductor device, and antenna switch module
US8796072B2 (en) 2012-11-15 2014-08-05 Amkor Technology, Inc. Method and system for a semiconductor device package with a die-to-die first bond
US9431369B2 (en) 2012-12-13 2016-08-30 Taiwan Semiconductor Manufacturing Company, Ltd. Antenna apparatus and method
US8927405B2 (en) 2012-12-18 2015-01-06 International Business Machines Corporation Accurate control of distance between suspended semiconductor nanowires and substrate surface
KR102031731B1 (en) 2012-12-18 2019-10-14 삼성전자주식회사 Semiconductor package and method of manufacturing the same
US8786105B1 (en) 2013-01-11 2014-07-22 Intel Mobile Communications GmbH Semiconductor device with chip having low-k-layers
US9733428B2 (en) 2013-02-04 2017-08-15 American Semiconductor, Inc. Flexible 3-D photonic device
US9812350B2 (en) 2013-03-06 2017-11-07 Qorvo Us, Inc. Method of manufacture for a silicon-on-plastic semiconductor device with interfacial adhesion layer
US9214337B2 (en) 2013-03-06 2015-12-15 Rf Micro Devices, Inc. Patterned silicon-on-plastic (SOP) technology and methods of manufacturing the same
US20140252566A1 (en) 2013-03-06 2014-09-11 Rf Micro Devices, Inc. Silicon-on-dual plastic (sodp) technology and methods of manufacturing the same
US9583414B2 (en) 2013-10-31 2017-02-28 Qorvo Us, Inc. Silicon-on-plastic semiconductor device and method of making the same
US20140306324A1 (en) 2013-03-06 2014-10-16 Rf Micro Devices, Inc. Semiconductor device with a polymer substrate and methods of manufacturing the same
US8941248B2 (en) 2013-03-13 2015-01-27 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device package and method
US9070660B2 (en) 2013-03-15 2015-06-30 Intel Corporation Polymer thermal interface material having enhanced thermal conductivity
WO2014153513A1 (en) 2013-03-22 2014-09-25 Henkel IP & Holding GmbH Diene/dienophile couples and thermosetting resin compositions having reworkability
US9349700B2 (en) 2013-04-24 2016-05-24 Stats Chippac, Ltd. Semiconductor device and method of forming stress-reduced conductive joint structures
WO2014174994A1 (en) 2013-04-26 2014-10-30 オリンパス株式会社 Image pickup apparatus
US9275916B2 (en) 2013-05-03 2016-03-01 Infineon Technologies Ag Removable indicator structure in electronic chips of a common substrate for process adjustment
US9281198B2 (en) 2013-05-23 2016-03-08 GlobalFoundries, Inc. Method of fabricating a semiconductor device including embedded crystalline back-gate bias planes
US9059123B2 (en) 2013-07-24 2015-06-16 International Business Machines Corporation Active matrix using hybrid integrated circuit and bipolar transistor
US20150243881A1 (en) 2013-10-15 2015-08-27 Robert L. Sankman Magnetic shielded integrated circuit package
US9576930B2 (en) 2013-11-08 2017-02-21 Taiwan Semiconductor Manufacturing Co., Ltd. Thermally conductive structure for heat dissipation in semiconductor packages
CN103730429B (en) * 2013-12-05 2017-06-20 通富微电子股份有限公司 Encapsulating structure
US9352956B2 (en) 2014-01-16 2016-05-31 Taiwan Semiconductor Manufacturing Company, Ltd. MEMS devices and methods for forming same
US10056267B2 (en) 2014-02-14 2018-08-21 Taiwan Semiconductor Manufacturing Company, Ltd. Substrate design for semiconductor packages and method of forming same
US9653443B2 (en) 2014-02-14 2017-05-16 Taiwan Semiconductor Manufacturing Company, Ltd. Thermal performance structure for semiconductor packages and method of forming same
US9368455B2 (en) 2014-03-28 2016-06-14 Intel Corporation Electromagnetic interference shield for semiconductor chip packages
US20150311132A1 (en) 2014-04-28 2015-10-29 Taiwan Semiconductor Manufacturing Company, Ltd. Scribe line structure and method of forming same
US9165793B1 (en) 2014-05-02 2015-10-20 Invensas Corporation Making electrical components in handle wafers of integrated circuit packages
US10141201B2 (en) 2014-06-13 2018-11-27 Taiwan Semiconductor Manufacturing Company Integrated circuit packages and methods of forming same
KR102245003B1 (en) 2014-06-27 2021-04-28 삼성전자주식회사 Semiconductor packages capable of overcoming overhangs and methods for fabricating the same
US9397118B2 (en) 2014-06-30 2016-07-19 International Business Machines Corporation Thin-film ambipolar logic
US9824951B2 (en) 2014-09-12 2017-11-21 Qorvo Us, Inc. Printed circuit module having semiconductor device with a polymer substrate and methods of manufacturing the same
US10085352B2 (en) * 2014-10-01 2018-09-25 Qorvo Us, Inc. Method for manufacturing an integrated circuit package
US10121718B2 (en) 2014-11-03 2018-11-06 Qorvo Us, Inc. Printed circuit module having a semiconductor device with a protective layer in place of a low-resistivity handle layer
KR101647559B1 (en) 2014-11-07 2016-08-10 앰코 테크놀로지 코리아 주식회사 Method of manufactuing semiconductor package and semiconductor package
JP6233285B2 (en) 2014-11-28 2017-11-22 三菱電機株式会社 Semiconductor module, power converter
US9548273B2 (en) 2014-12-04 2017-01-17 Invensas Corporation Integrated circuit assemblies with rigid layers used for protection against mechanical thinning and for other purposes, and methods of fabricating such assemblies
US9613831B2 (en) * 2015-03-25 2017-04-04 Qorvo Us, Inc. Encapsulated dies with enhanced thermal performance
US9960145B2 (en) 2015-03-25 2018-05-01 Qorvo Us, Inc. Flip chip module with enhanced properties
US9875971B2 (en) 2015-03-26 2018-01-23 Globalfoundries Singapore Pte. Ltd. Magnetic shielding of MRAM package
US20160343604A1 (en) 2015-05-22 2016-11-24 Rf Micro Devices, Inc. Substrate structure with embedded layer for post-processing silicon handle elimination
US9969614B2 (en) 2015-05-29 2018-05-15 Taiwan Semiconductor Manufacturing Company, Ltd. MEMS packages and methods of manufacture thereof
US9815685B2 (en) 2015-06-15 2017-11-14 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor sensing structure and manufacturing method thereof
US9461001B1 (en) 2015-07-22 2016-10-04 Advanced Semiconductor Engineering, Inc. Semiconductor device package integrated with coil for wireless charging and electromagnetic interference shielding, and method of manufacturing the same
US10276495B2 (en) 2015-09-11 2019-04-30 Qorvo Us, Inc. Backside semiconductor die trimming
US9850126B2 (en) * 2015-12-31 2017-12-26 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit package and method of forming same
US10062583B2 (en) 2016-05-09 2018-08-28 Qorvo Us, Inc. Microelectronics package with inductive element and magnetically enhanced mold compound component
US10773952B2 (en) * 2016-05-20 2020-09-15 Qorvo Us, Inc. Wafer-level package with enhanced performance
US10103080B2 (en) * 2016-06-10 2018-10-16 Qorvo Us, Inc. Thermally enhanced semiconductor package with thermal additive and process for making the same
US9859254B1 (en) 2016-06-30 2018-01-02 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and a manufacturing method thereof
US10079196B2 (en) 2016-07-18 2018-09-18 Qorvo Us, Inc. Thermally enhanced semiconductor package having field effect transistors with back-gate feature
CN109844937B (en) * 2016-08-12 2023-06-27 Qorvo美国公司 Wafer level package with enhanced performance
JP7037544B2 (en) * 2016-08-12 2022-03-16 コーボ ユーエス，インコーポレイティド Wafer level package with improved performance
JP7022112B2 (en) * 2016-08-12 2022-02-17 コーボ ユーエス，インコーポレイティド Wafer level package with improved performance
US9786586B1 (en) 2016-08-21 2017-10-10 Micron Technology, Inc. Semiconductor package and fabrication method thereof
US10410999B2 (en) 2017-12-19 2019-09-10 Amkor Technology, Inc. Semiconductor device with integrated heat distribution and manufacturing method thereof

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