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SG10201402302PA - Semiconductor device and method of forming openings throughinsulating layer over encapsulant for enhanced adhesion ofinterconnect structure - Google Patents

Semiconductor device and method of forming openings throughinsulating layer over encapsulant for enhanced adhesion ofinterconnect structure

Info

Publication number
SG10201402302PA
SG10201402302PA SG10201402302PA SG10201402302PA SG10201402302PA SG 10201402302P A SG10201402302P A SG 10201402302PA SG 10201402302P A SG10201402302P A SG 10201402302PA SG 10201402302P A SG10201402302P A SG 10201402302PA SG 10201402302P A SG10201402302P A SG 10201402302PA
Authority
SG
Singapore
Prior art keywords
throughinsulating
ofinterconnect
semiconductor device
layer over
forming openings
Prior art date
Application number
SG10201402302PA
Inventor
Lin Yaojian
Chen Kang
Fang Jianmin
Original Assignee
Stats Chippac Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stats Chippac Ltd filed Critical Stats Chippac Ltd
Publication of SG10201402302PA publication Critical patent/SG10201402302PA/en

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    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/20—Structure, shape, material or disposition of high density interconnect preforms
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    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/20—Structure, shape, material or disposition of high density interconnect preforms
    • H01L2224/22—Structure, shape, material or disposition of high density interconnect preforms of a plurality of HDI interconnects
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    • H01L2924/0001—Technical content checked by a classifier
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  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Geometry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
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SG10201402302PA 2010-12-10 2011-11-15 Semiconductor device and method of forming openings throughinsulating layer over encapsulant for enhanced adhesion ofinterconnect structure SG10201402302PA (en)

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Families Citing this family (8)

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Publication number Priority date Publication date Assignee Title
US8951037B2 (en) 2012-03-02 2015-02-10 Taiwan Semiconductor Manufacturing Company, Ltd. Wafer-level underfill and over-molding
US9802349B2 (en) 2012-03-02 2017-10-31 Taiwan Semiconductor Manufacturing Company, Ltd. Wafer level transfer molding and apparatus for performing the same
DE102014109286B4 (en) * 2014-06-12 2019-01-10 Taiwan Semiconductor Manufacturing Co., Ltd. Wafer-level transfer presses and apparatus for execution
US9502270B2 (en) 2014-07-08 2016-11-22 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device packages, packaging methods, and packaged semiconductor devices
KR20170061370A (en) * 2015-11-26 2017-06-05 삼성전기주식회사 Electronic component package and manufacturing method for the same
US10128193B2 (en) * 2016-11-29 2018-11-13 Taiwan Semiconductor Manufacturing Co., Ltd. Package structure and method for forming the same
JP2020129608A (en) * 2019-02-08 2020-08-27 セイコーエプソン株式会社 Method of manufacturing electronic device
US20210217707A1 (en) * 2020-01-10 2021-07-15 Mediatek Inc. Semiconductor package having re-distribution layer structure on substrate component

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6441487B2 (en) 1997-10-20 2002-08-27 Flip Chip Technologies, L.L.C. Chip scale package using large ductile solder balls
KR20010004529A (en) * 1999-06-29 2001-01-15 김영환 wafer level package and method of fabricating the same
JP2002016175A (en) * 2000-06-29 2002-01-18 Hitachi Cable Ltd TAB tape with stiffener and semiconductor device using the same
US6740577B2 (en) * 2002-05-21 2004-05-25 St Assembly Test Services Pte Ltd Method of forming a small pitch torch bump for mounting high-performance flip-flop devices
KR100448344B1 (en) 2002-10-22 2004-09-13 삼성전자주식회사 Method for manufacturing wafer level chip scale package
CN100468719C (en) 2003-06-03 2009-03-11 卡西欧计算机株式会社 Stackable semiconductor device and manufacturing method thereof
JP4606145B2 (en) 2004-12-09 2011-01-05 セイコーエプソン株式会社 Semiconductor device and manufacturing method thereof
TWI268564B (en) 2005-04-11 2006-12-11 Siliconware Precision Industries Co Ltd Semiconductor device and fabrication method thereof
KR100647693B1 (en) 2005-05-24 2006-11-23 삼성에스디아이 주식회사 Organic thin film transistor, its manufacturing method and organic light emitting display device comprising organic thin film transistor
US8008770B2 (en) 2005-11-02 2011-08-30 Stats Chippac Ltd. Integrated circuit package system with bump pad
JP4354469B2 (en) * 2006-08-11 2009-10-28 シャープ株式会社 Semiconductor device and manufacturing method of semiconductor device
US8390107B2 (en) * 2007-09-28 2013-03-05 Intel Mobile Communications GmbH Semiconductor device and methods of manufacturing semiconductor devices
US8173488B2 (en) * 2008-09-30 2012-05-08 Intel Mobile Communications GmbH Electronic device and method of manufacturing same
US7741148B1 (en) 2008-12-10 2010-06-22 Stats Chippac, Ltd. Semiconductor device and method of forming an interconnect structure for 3-D devices using encapsulant for structural support
KR101028051B1 (en) 2009-01-28 2011-04-08 삼성전기주식회사 Wafer level package and manufacturing method thereof
JP5508802B2 (en) * 2009-09-30 2014-06-04 株式会社東芝 Manufacturing method of semiconductor device
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