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SE8801000L - DEVICE TO DETECT INCORRECT SHIPPING TO A PROCESSOR BUS - Google Patents

DEVICE TO DETECT INCORRECT SHIPPING TO A PROCESSOR BUS

Info

Publication number
SE8801000L
SE8801000L SE8801000A SE8801000A SE8801000L SE 8801000 L SE8801000 L SE 8801000L SE 8801000 A SE8801000 A SE 8801000A SE 8801000 A SE8801000 A SE 8801000A SE 8801000 L SE8801000 L SE 8801000L
Authority
SE
Sweden
Prior art keywords
situation
processor bus
inputs
unit
drive circuits
Prior art date
Application number
SE8801000A
Other languages
Swedish (sv)
Other versions
SE460808B (en
SE8801000D0 (en
Inventor
J Sjoeblom
Original Assignee
Ellemtel Utvecklings Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ellemtel Utvecklings Ab filed Critical Ellemtel Utvecklings Ab
Priority to SE8801000A priority Critical patent/SE460808B/en
Publication of SE8801000D0 publication Critical patent/SE8801000D0/en
Publication of SE8801000L publication Critical patent/SE8801000L/en
Publication of SE460808B publication Critical patent/SE460808B/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Quality & Reliability (AREA)
  • Hardware Redundancy (AREA)
  • Debugging And Monitoring (AREA)

Abstract

The processor has a number of units, each formed by a number of drive circuits with outputs connected to a common processor bus. The drive circuits (3) each have situation output (8) from which is emitted a situation signal indicating whether the drive circuit is transmitting on the bus. The situation in the drive circuits belonging to the same unit (1-n) are connected to the inputs (10) of a first grid (11), the output signals (b1-bn) of which dependent upon the logical situation at the grid inputs, indicate whether the unit is transmitting data on the processor bus or not. The output signals from all primary grids are connected to the inputs (12) of a fault detector circuit (13), the output signal (a) of which, dependent upon the logicla situation at the inputs of the detection circuit, indicates whether more than one unit (1-n) is transmitting on the processor bus (2). Fault detection occurs if the output signal from the detection circuit indicates that more than one unit is simultaneously transmitting data on the processor bus.
SE8801000A 1988-03-18 1988-03-18 Detector for faulty transmission to processor bus SE460808B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
SE8801000A SE460808B (en) 1988-03-18 1988-03-18 Detector for faulty transmission to processor bus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE8801000A SE460808B (en) 1988-03-18 1988-03-18 Detector for faulty transmission to processor bus

Publications (3)

Publication Number Publication Date
SE8801000D0 SE8801000D0 (en) 1988-03-18
SE8801000L true SE8801000L (en) 1989-09-19
SE460808B SE460808B (en) 1989-11-20

Family

ID=20371744

Family Applications (1)

Application Number Title Priority Date Filing Date
SE8801000A SE460808B (en) 1988-03-18 1988-03-18 Detector for faulty transmission to processor bus

Country Status (1)

Country Link
SE (1) SE460808B (en)

Also Published As

Publication number Publication date
SE460808B (en) 1989-11-20
SE8801000D0 (en) 1988-03-18

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