SE421852B - MULTI-LAYER DECTRONIC LAYER CIRCUIT AND PROCEDURE FOR ITS PREPARATION - Google Patents
MULTI-LAYER DECTRONIC LAYER CIRCUIT AND PROCEDURE FOR ITS PREPARATIONInfo
- Publication number
- SE421852B SE421852B SE7606715A SE7606715A SE421852B SE 421852 B SE421852 B SE 421852B SE 7606715 A SE7606715 A SE 7606715A SE 7606715 A SE7606715 A SE 7606715A SE 421852 B SE421852 B SE 421852B
- Authority
- SE
- Sweden
- Prior art keywords
- layer
- dectronic
- procedure
- preparation
- circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
- H05K3/4667—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders characterized by using an inorganic intermediate insulating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
- H05K1/092—Dispersed materials, e.g. conductive pastes or inks
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE2526553A DE2526553C3 (en) | 1975-06-13 | 1975-06-13 | Multilayer electronic circuit and method for its manufacture |
Publications (2)
Publication Number | Publication Date |
---|---|
SE7606715L SE7606715L (en) | 1976-12-14 |
SE421852B true SE421852B (en) | 1982-02-01 |
Family
ID=5949067
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE7606715A SE421852B (en) | 1975-06-13 | 1976-06-11 | MULTI-LAYER DECTRONIC LAYER CIRCUIT AND PROCEDURE FOR ITS PREPARATION |
Country Status (9)
Country | Link |
---|---|
JP (2) | JPS5210569A (en) |
AT (1) | AT359583B (en) |
CH (1) | CH604344A5 (en) |
DE (1) | DE2526553C3 (en) |
FR (1) | FR2314585A1 (en) |
GB (1) | GB1540112A (en) |
IT (1) | IT1063970B (en) |
NL (1) | NL7604158A (en) |
SE (1) | SE421852B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1991011025A1 (en) * | 1990-01-16 | 1991-07-25 | A.S Micro Electronics | A method for manufacturing of mineature impedance matched interconnection patterns |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2045540B (en) * | 1978-12-28 | 1983-08-03 | Tdk Electronics Co Ltd | Electrical inductive device |
EP0062084A1 (en) * | 1981-04-06 | 1982-10-13 | Herbert Irwin Schachter | Multi-level circuit and method of making same |
US4495479A (en) * | 1982-10-22 | 1985-01-22 | International Business Machines Corporation | Selective wiring for multilayer printed circuit board |
JPS60130883A (en) * | 1983-12-19 | 1985-07-12 | 中央銘板工業株式会社 | Multilayer printed circuit board |
DE3831148C1 (en) * | 1988-09-13 | 1990-03-29 | Robert Bosch Gmbh, 7000 Stuttgart, De |
-
1975
- 1975-06-13 DE DE2526553A patent/DE2526553C3/en not_active Expired
-
1976
- 1976-04-14 CH CH473776A patent/CH604344A5/xx not_active IP Right Cessation
- 1976-04-20 NL NL7604158A patent/NL7604158A/en not_active Application Discontinuation
- 1976-05-17 AT AT358776A patent/AT359583B/en not_active IP Right Cessation
- 1976-05-18 GB GB20417/76A patent/GB1540112A/en not_active Expired
- 1976-06-04 JP JP51065491A patent/JPS5210569A/en active Pending
- 1976-06-09 IT IT24064/76A patent/IT1063970B/en active
- 1976-06-11 FR FR7617770A patent/FR2314585A1/en active Granted
- 1976-06-11 SE SE7606715A patent/SE421852B/en unknown
-
1981
- 1981-07-07 JP JP1981100259U patent/JPS5731876U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1991011025A1 (en) * | 1990-01-16 | 1991-07-25 | A.S Micro Electronics | A method for manufacturing of mineature impedance matched interconnection patterns |
Also Published As
Publication number | Publication date |
---|---|
ATA358776A (en) | 1980-04-15 |
AT359583B (en) | 1980-11-25 |
FR2314585A1 (en) | 1977-01-07 |
IT1063970B (en) | 1985-02-18 |
CH604344A5 (en) | 1978-09-15 |
DE2526553C3 (en) | 1978-06-01 |
FR2314585B1 (en) | 1979-09-28 |
DE2526553B2 (en) | 1977-09-29 |
NL7604158A (en) | 1976-12-15 |
DE2526553A1 (en) | 1976-12-16 |
JPS5731876U (en) | 1982-02-19 |
GB1540112A (en) | 1979-02-07 |
JPS5210569A (en) | 1977-01-26 |
SE7606715L (en) | 1976-12-14 |
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