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SE398787B - Digitaldator med tva rekneenheter - Google Patents

Digitaldator med tva rekneenheter

Info

Publication number
SE398787B
SE398787B SE7400883A SE7400883A SE398787B SE 398787 B SE398787 B SE 398787B SE 7400883 A SE7400883 A SE 7400883A SE 7400883 A SE7400883 A SE 7400883A SE 398787 B SE398787 B SE 398787B
Authority
SE
Sweden
Prior art keywords
digital computer
accounting units
accounting
units
digital
Prior art date
Application number
SE7400883A
Other languages
English (en)
Inventor
A Beroit
Original Assignee
Thomson Csf
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Csf filed Critical Thomson Csf
Publication of SE398787B publication Critical patent/SE398787B/sv

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38Response verification devices
    • G11C29/42Response verification devices using error correcting codes [ECC] or parity check
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001Arithmetic instructions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Executing Machine-Instructions (AREA)
  • Multi Processors (AREA)
SE7400883A 1973-01-26 1974-01-23 Digitaldator med tva rekneenheter SE398787B (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7302836A FR2215877A5 (sv) 1973-01-26 1973-01-26

Publications (1)

Publication Number Publication Date
SE398787B true SE398787B (sv) 1978-01-16

Family

ID=9113912

Family Applications (1)

Application Number Title Priority Date Filing Date
SE7400883A SE398787B (sv) 1973-01-26 1974-01-23 Digitaldator med tva rekneenheter

Country Status (6)

Country Link
US (1) US3932845A (sv)
DE (1) DE2403669C3 (sv)
FR (1) FR2215877A5 (sv)
GB (1) GB1459493A (sv)
NL (1) NL7400904A (sv)
SE (1) SE398787B (sv)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3978457A (en) * 1974-12-23 1976-08-31 Pitney-Bowes, Inc. Microcomputerized electronic postage meter system
JPS5194734A (en) * 1975-02-19 1976-08-19 Tajushorisochino enzanseigyohoshiki
US4085450A (en) * 1976-12-29 1978-04-18 Burroughs Corporation Performance invarient execution unit for non-communicative instructions
GB1592873A (en) * 1977-02-21 1981-07-08 Ferranti Ltd Data processing systems
US4295193A (en) * 1979-06-29 1981-10-13 International Business Machines Corporation Machine for multiple instruction execution
DE3176193D1 (en) * 1981-12-29 1987-06-19 Ibm Control unit connectable to a pair of memories having different speeds
US4594655A (en) * 1983-03-14 1986-06-10 International Business Machines Corporation (k)-Instructions-at-a-time pipelined processor for parallel execution of inherently sequential instructions
GB2140943A (en) * 1983-06-03 1984-12-05 Burke Cole Pullman Improvements relating to computers
CA1270338A (en) * 1985-09-11 1990-06-12 Akihiko Hoshino Data processing system for processing units having different throughputs
TWI226015B (en) * 1999-08-31 2005-01-01 Matsushita Electric Ind Co Ltd Digital signal processor and control method of the same

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3348210A (en) * 1964-12-07 1967-10-17 Bell Telephone Labor Inc Digital computer employing plural processors
DE1549531A1 (de) * 1966-08-16 1971-04-01 Scient Data Systems Inc Digitale Rechenanlage
US3697734A (en) * 1970-07-28 1972-10-10 Singer Co Digital computer utilizing a plurality of parallel asynchronous arithmetic units
US3760171A (en) * 1971-01-12 1973-09-18 Wang Laboratories Programmable calculators having display means and multiple memories

Also Published As

Publication number Publication date
DE2403669B2 (de) 1979-02-01
DE2403669C3 (de) 1979-10-04
GB1459493A (en) 1976-12-22
FR2215877A5 (sv) 1974-08-23
DE2403669A1 (de) 1974-08-01
US3932845A (en) 1976-01-13
NL7400904A (sv) 1974-07-30

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