RU2748455C1 - Method for manufacturing semiconductor device - Google Patents

Abstract

FIELD: electricity.SUBSTANCE: invention relates to the field of technology for the production of semiconductor devices, in particular to the technology of manufacturing a gate dielectric of a field-effect transistor with a reduced value of the leakage current. The method of a semiconductor device manufacturing includes the processes of forming the active regions of a field-effect transistor, the electrodes to them and the gate dielectric, while according to the invention, the gate dielectric is formed on the basis of erbium oxide by electron-beam evaporation in a vacuum 1*10-6Pa with a deposition rate of 0.1 nm/sec, a thickness of 25 nm, followed by oxidation at a temperature of 600-700°С and annealing in the atmosphere of 60% N2- 40% Н2for 20 minutes.EFFECT: invention makes it possible to increase the percentage of the output of suitable devices and improve their reliability.1 cl, 1 tbl

Description

The invention relates to the field of technology for the production of semiconductor devices, in particular to the technology of manufacturing a gate dielectric of a field-effect transistor with a reduced value of the leakage current.

A known method of manufacturing a field-effect transistor [US Pat. No. 5145798 USA, MKI H01L 21/336] with an insulated gate. In the process of manufacturing a field-effect transistor, the formation of oxide side walls of the gate by etching, implantation of phosphorus P, and horizontal diffusion are used to create n + source and drain regions. As a result, transition regions with a smoothly varying concentration of impurities are created under the walls - spacers, located between the n + regions of the source and drain and the channel. In such devices, due to the lack of manufacturability, the formation of oxide side walls of the gate using the etching process forms a large number of defects that worsen the electrical parameters of the devices.

A known method of manufacturing a field-effect transistor [US Pat. No. 5134452 USA, MKI H01L 29/78] with a gate insulating layer. Manufacturing a field-effect transistor on a thick protective oxide layer and on an open silicon surface with source and drain regions, a conductive polysilicon layer is deposited, from which drain and drain electrodes are then formed. After opening the channel region, reactive ion etching is carried out with the formation of a rough surface with irregularities up to 50 nm. Then, a thin gate oxide is created over the channel region with the help of PPCO, and a gate is formed.

The disadvantages of this method are:

- high values of leakage currents;

- high defectiveness;

- low manufacturability.

The problem solved by the invention: reducing leakage currents, ensuring manufacturability, improving the parameters of devices, improving quality and increasing the percentage of yield.

The problem is solved by the fact that the gate dielectric of the field-effect transistor is formed on the basis of erbium oxide by the method of electron-beam evaporation in a vacuum of 1 * 10 ^-6 Pa with a deposition rate of 0.1 nm / s, 25 nm thick, followed by oxidation at a temperature of 600-700 ° C and annealing in an atmosphere of 60% N ₂ - 40% H ₂ for 20 min.

The technology of the method is as follows: the gate dielectric of the field-effect transistor is formed on the basis of erbium oxide on p-type silicon wafers with the orientation (100), with a resistivity of 10 Ohm * cm, the deposition of erbium by the method of electron beam evaporation in a vacuum 1 * 10 ^-6 Pa with a deposition rate of 0.1 nm / s, a thickness of 25 nm, followed by oxidation at a temperature of 600-700 ° C and annealing in an atmosphere of 60% N ₂ - 40% H ₂ for 20 minutes. The active regions of the n-channel field-effect transistor and the electrodes to them were formed according to the standard technology.

According to the proposed method, semiconductor devices were manufactured and investigated. The processing results are presented in the table.

Experimental studies have shown that the yield of suitable structures for batches of plates formed in the optimal mode increased by 19.2%.

EFFECT: reducing leakage currents, ensuring manufacturability, improving the parameters of devices, improving the quality and increasing the percentage of yield.

The stability of the parameters over the entire operating temperature range was normal and met the requirements.

Claims (1)

A method for manufacturing a semiconductor device, including the processes of forming active regions of a field-effect transistor, electrodes to them and a gate dielectric, characterized in that the gate dielectric is formed on the basis of erbium oxide by the method of electron beam evaporation in a vacuum of 1 * 10 ^-6 Pa with a deposition rate of 0.1 nm / s, 25 nm thick, followed by oxidation at a temperature of 600-700 ° C and annealing in an atmosphere of 60% N ₂ - 40% H ₂ for 20 minutes.