RU2707703C1 - Adaptive backup system of operating devices with backup - Google Patents

Abstract

FIELD: computer equipment.

SUBSTANCE: invention relates to automation and computer equipment. Adaptive redundant system of redundant devices comprises a first AND element, a group of second and third AND elements, output of second AND element is output of device and connected to input of third AND element, includes clock pulse generator (CPG), counters, decoder, triggers, OR element, register, comparison circuit, delay element, start-up timer of system connection, NOT elements, CPG output is connected to input of first AND element, output of start-up timer of system connection is to input of first AND element, which output is to input of delay element and to input of counter and to input of decoder, which output is to inputs of third AND elements and to trigger input and to output of element NOT, input of which is connected to input of device, and output is to input of second AND element and to device input, output of delay element is connected to inputs of third AND elements, output of each of which is connected to similar input of OR element, output of which is connected to input of counter, output of which is connected to input of comparison circuit, second input of which is connected to output of register, and output is to inputs of counters.

EFFECT: technical result is wider range of means.

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Description

The invention relates to automation and computer technology and can be used to automatically include the elements of a redundant system. Redundant elements can be functionally complete nodes, blocks of system equipment.

A device for controlling the switching of the reserve [1], which allows you to connect a backup element of the system in case of failure of the main working element.

The disadvantage of this device is the inability to flexibly change in the dynamics of the system the number of main working elements of the system due to the available backup elements and low reliability due to high hardware costs.

The operation of the device is based on the fact that the working network contains n main devices plus k backup devices. Each element of a working system produces two more signals (good or bad). In case of failure of one of the n elements of the system, the device provides the connection to the network of the next of serviceable k backup system elements.

The objective of the invention is to create a device that provides a flexible and reliable change in the number of main working elements of the system due to the available backup elements and increase reliability by reducing hardware costs.

This solution is achieved by the fact that in the backup device of the operating devices backup, containing the first element And 2, a group of second elements And 6 _i (i = 1, ..., n, n + 1, ..., n + k), a group of third elements And 7 _i (i = 1, ..., n, n + 1, ..., n + k), the output of the second element And 6 _i (i = 1, ..., n, n + 1, ..., n + k) is the output 15 _i (i = 1, ..., n, n + 1, ..., n + k) of the device and is connected to the first input of the third element And 7 _i (i = 1, ..., n, n + 1, ..., n + k), _ introduced a clock generator (GTI) 1, first counter 3, decoder 4, triggers 5 _i (i = 1, ..., n, n + 1, ..., n + k), element OR 8, register 9, comparison circuit 10, second counter 11, element delays 12, starting timer for connecting the system 13, elements NOT 14 _i (i = 1, ..., n, n + 1, ..., n + k), the output of the GTI 1 is connected to the first input of the first element And 2, the output of the starting timer for connecting the system 13 is connected to the second input of the first element And 2, the output of which is connected to the input of the delay element 12 and to the first input of the first counter 3, the output of which is connected to the input of the decoder 4, the i-th output (i = 1, ..., n, n + 1 , ..., n + k) which is connected to the first inputs of the third elements And 7 _i (i = 1, ..., n, n + 1, ..., n + k) and to the first input of the trigger 5 _i (i = 1, ..., n, n + 1, ..., n + k), the second input of which a connected to the output of NOT circuit 14 _i (i = 1, ..., n, n + 1, ..., n + k), whose input is connected to the input 16 _i the device, and an output connected to the first input of the second AND gate 6 _i (i = 1, ..., n, n + 1, ..., n + k), the second input of which is connected to the input 16 _{i of the} device, the output of the delay element 12 is connected to the second inputs of the third elements And 7 _i (i = 1, ..., n, n + 1, ..., n + k), the output of each of which is connected to the same input of the OR element 8, the output of which is connected to the first input of the second counter 11, the output of which is connected to the first input of the comparison circuit 10, the second input of which connected to the output of the register 9, and the output to the second input of the first counter 3 and to the second input of the second counter 11.

A search in the well-known scientific and technical literature did not reveal the presence of such technical solutions.

The invention is illustrated in the drawing. In the drawing (Fig. 1) presents a structural diagram of the proposed device. The device contains a clock pulse generator (GTI) 1, element And 2, counter 3, decoder 4, triggers 5 _i (i = 1, ..., n, n + 1, ..., n + k), elements And 6 _i (i = 1, ..., n, n + 1, ..., n + k), AND elements 7 _i (i = 1, ..., n, n + 1, ..., n + k), OR element 8, register 9, comparison scheme 10, counter 11, delay element 12, starting timer for connecting the system 13, elements NOT 14 _i (i = 1, ..., n, n + 1, ..., n + k), outputs 15 _i (i = 1, ..., n , n + 1, ..., n + k), inputs 16 _i (i = 1, ..., n, n + 1, ..., n + k), input 17.

The number n is stored on register 9 and can be changed in the dynamics of the system by overwriting the new number n at the input 17 of the device.

The width of the counter 3 provides the ability to count pulses to the value (n + k), and the capacity of the counter 11 provides the ability to count pulses to the maximum value of n.

The delay element 12 is necessary for the period of reliable operation of the sequence of elements 3, decoder 4, element And 6 _i and trigger 5 _i

The operation of the device begins with the start signal from the output of the system 13 connection timer, after which they begin to receive pulses from the GTI 1 output to the second input of the And 2 element. From the output of the And 2 element, the pulse goes to the input of the delay element 12 and to the input of the counter 3, from the output of which the code goes to the input of the decoder 4.

With serviceable elements of the system (there is a single signal of operability of the i-th element of the system at the input 16 _{i, a} pulse 5 _{i is} installed by the pulse from the decoder 4 output, the output signal of which comes through the open element And 6 _i , the element And 7 _i element OR 8 at the input another counter 11. A single signal from the output of the trigger 5 _i through the And 6 _i element also goes to the output 15 _{i of the} device and then to the input key connecting the network element.

When the counter 11 counts up to the number n of serviceable devices connected in the system, the signal from the output of the comparison circuit 10 (equality signal) will reset the counters 3 and 11 to zero, and the process is then repeated.

A faulty device in the system through the inverter 14 _i resets the trigger 5 _i to zero, and the signal from it to another counter 11 will not pass, and the next standby element will be connected to the working non-operational elements of the system.

The proposed adaptive system for backing up working devices with backup devices as part of elements 1-17 (see Fig. 1) can be built on well-known standard microcircuits manufactured by the domestic industry.

Thus, the technical result of the claimed invention is achieved using the technical means (blocks and elements) mentioned in the description of the operation of the device.

This device provides increased reliability and stability of the functioning of the system in conditions inherent in the real process of its functioning - in the conditions of continuous dynamics and constant changes in the parameters of external conditions and taking into account influencing factors, which significantly expands the scope of the device.

Literature

1. SU No. 1617675, 1990.

Claims (1)

Adaptive backup system of operating devices backup, containing the first element And 2, a group of second elements And 6 _i (i = 1, ..., n, n + 1, ..., n + k), a group of third elements And 7 _i (i = 1, ..., n, n + 1, ..., n + k), the output of the second element And 6 _i (i = 1, ..., n, n + 1, ..., n + k) is the output 15 _i (i = 1, ... , n, n + 1, ..., n + k) of the device and is connected to the first input of the third element And 7 _i (i = 1, ..., n, n + 1, ..., n + k), characterized in that introduced a clock generator (GTI) 1, first counter 3, decoder 4, triggers 5 _i (i = 1, ..., n, n + 1, ..., n + k), element OR 8, register 9, comparison circuit 10, second counter 11, eleme t delay 12, starting the timer activating the system 13, the element is not 14 _{i (i} = 1, ..., n, n + 1, ..., n + k), the output GTI 1 is connected to first input of first AND 2, starting the connection timer output system 13 is connected to the second input of the first element And 2, the output of which is connected to the input of the delay element 12 and to the first input of the first counter 3, the output of which is connected to the input of the decoder 4, i-th output (i = 1, ..., n, n + 1, ..., n + k) which is connected to the first inputs of the third elements And 7 _i (i = 1, ..., n, n + 1, ..., n + k) and to the first input of the trigger 5 _i (i = 1, ... , n, n + 1, ..., n + k), the second input of which th connected to the output of NOT circuit 14 _i (i = 1, ..., n, n + 1, ..., n + k), whose input is connected to the input 16 _i the device, and an output connected to the first input of the second AND gate 6 _i (i = 1, ..., n, n + 1, ..., n + k), the second input of which is connected to the input 16 _{i of the} device, the output of the delay element 12 is connected to the second inputs of the third elements And 7 _i (i = 1, ..., n, n + 1, ..., n + k), the output of each of which is connected to the input of the same element OR 8, the output of which is connected to the first input of the second counter 11, the output of which is connected to the first input of the comparison circuit 10, the second input of which th is connected to the output of the register 9, and the output to the second input of the first counter 3 and to the second input of the second counter 11.

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