RU2479139C1 - Discriminator for synchronisation by delay of b-frequency discretely-coded signal - Google Patents

Abstract

FIELD: radio engineering, communications.

SUBSTANCE: into a receiving device for a single-impulse radar between an output of the first summator and an input of the second filter there are the following serially connected components: an amplifier, the third filter and the second summator, to the second input of which the output of the first summator is connected, and the output of the third filter is an additional output of the device.

EFFECT: higher accuracy of discriminator synchronisation under conditions of relative speed variation between objects due to application of an a priori equation of delay adequate to processes taking place.

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Description

The invention relates to the field of radio engineering and communications, in particular to devices for quasi-coherent reception of discrete-coded multi-frequency radio signals, and can find application in information radio channels of control systems for unmanned aerial vehicles, in particular in active and semi-active radar homing winged and anti-aircraft missiles, in synchronization devices missile telecontrol radio lines.

The closest in technical essence to the claimed object is a discriminator for synchronization by the delay of the B-frequency discrete-coded signal (see Patent No. 2223607, IPC H04L 7/02), selected as a prototype.

The known discriminator comprises a series-connected mixer, the first input of which is the input of the discriminator, the first filter, the output of which is the output of the discriminator, the first control element, a tunable carrier frequency generator, a 90 ° phase shifter, the first and second multipliers, the first adder, the second filter, the second control an element and a reference signal generator, the output of which is connected to the second inputs of the mixer and the first multiplier, as well as the third multiplier connected in series and the fourth multiplier, the output of which is connected to the second input of the first adder, while the first input of the third multiplier is connected to the output of the reference frequency generator, and also contains the fifth and sixth multipliers combined by the first inputs with the discriminator input, the output of the fifth multiplier is connected to the second input of the second multiplier, and the output of the sixth multiplier is connected to the second input of the fourth multiplier, the second inputs of the third and fifth multipliers are connected to the input of the phase shifter 90 °, the first input is not the first multiplier is connected to the second input of the sixth multiplier.

In the case of a constant speed of movement of interacting objects (including at zero speed), the prototype device, due to the exclusion of oscillations of the discriminatory characteristics in the capture area, has high noise immunity and accuracy. In synthesizing the structural diagram of this device, it was taken into account that its operation occurs under conditions when the random delay of the radio signal τ due to the relative instability of the clock generators at the receiving and transmitting sides is wandering, i.e., it is a purely diffusion process.

However, the a priori delay equation used does not fully reflect the processes when the relative speed between the interacting objects changes, that is, during acceleration. When operating under the indicated conditions, the discriminatory characteristic of the discriminator changes significantly (the capture zone and steepness of the characteristic decrease, its linearity worsens, the equilibrium point shifts) and, as a result, the accuracy worsens. The noted circumstance is a significant disadvantage of the prototype.

The technical result of using the proposed discriminator for delay synchronization of a B-frequency discrete-coded signal is, in contrast to the prototype, in increasing the accuracy of discriminator synchronization under conditions of a change in relative speed between objects by using an a priori delay equation that is adequate to the processes taking place.

The problem is solved due to the fact that in the receiving device for a monopulse radar, containing, like the prototype, a series-connected mixer, the first input of which is the input of the discriminator, the first filter, the output of which is the output of the discriminator, the first control element, a tunable carrier generator frequencies, 90 ° phase shifter, first and second multipliers, first adder, second filter connected in series, second control element and reference signal generator, output which is connected to the second inputs of the mixer and the first multiplier, as well as a third multiplier and a fourth multiplier connected in series, the output of which is connected to the second input of the first adder, while the first input of the third multiplier is connected to the output of the reference frequency generator, and also contains the first inputs connected to the input the fifth and sixth multipliers, the output of the fifth multiplier is connected to the second input of the second multiplier, and the output of the sixth multiplier is connected to the second during the fourth multiplier, the second inputs of the third and fifth multipliers are connected to the phase shifter input by 90 °, the first input of the first multiplier is connected to the second input of the sixth multiplier, in contrast to the prototype, an amplifier, a third filter, and a second are connected in series between the output of the first adder and the input of the second filter an adder, to the second input of which the output of the first adder is connected, and the output of the third filter is an additional output of the device.

The invention is illustrated in the drawing, which shows a structural diagram of the proposed discriminator.

The discriminator for delay synchronization of a B-frequency discrete-coded signal contains, in the same way as the prototype, a mixer 1 connected in series, the first input of which is the discriminator input, the first filter 2, the output of which is the discriminator output, the first control element 3, a tunable carrier generator frequency 4, phase shifter 5 by 90 °, the first 6 and second 7 multipliers, the first adder 8 connected in series to the second filter 9, the second control element 10 and the reference signal generator 11, output to which is connected to the second inputs of the mixer 1 and the first multiplier 6, as well as a series-connected third multiplier 12 and a fourth multiplier 13, the output of which is connected to the second input of the first adder 8, while the first input of the third multiplier 12 is connected to the output of the reference frequency generator 11, and also contains the fifth 14 and sixth 15 multipliers combined by the first inputs with the discriminator input, the output of the fifth multiplier 14 is connected to the second input of the second multiplier 7, and the output of the sixth multiplier 15 connected to the second input of the fourth multiplier 13, the second inputs of the third 12 and fifth 14 multipliers are connected to the input of the phase shifter 5 by 90 °, the first input of the first multiplier 6 is connected to the second input of the sixth multiplier 15. In contrast to the prototype, the proposed discriminator for delay synchronization B of a frequency-discrete-coded signal between the output of the first adder 8 and the input of the second filter 9, a series-connected amplifier 16, a third filter 17 and a second adder 18 are connected to the second input of which an output is connected a first adder 8, and the output of the third filter 17 is an additional output device.

The device operates as follows.

The received oscillation, which is an additive mixture of a discrete-coded B-frequency signal of the form

where µ is the amplitude factor;

f _k and φ _k are the frequency and phase code, respectively (k = 1 ... V);

τ is an unknown fluctuating delay,

and interference (for example, white Gaussian noise), enters the second input of the mixer 1, the first input of which from the generator 11 receives a reference signal of the form

where µ 'is the amplitude factor of the reference signal;

- оцененное значение задержки τ принимаемого сигнала.

- estimated delay value τ of the received signal.

In the filter 2, an error signal is generated, which through the control element 3 (as in the prototype) carries out the necessary adjustment of the generator 4 by the delay.

The voltage at the output of the generator 4 can be represented as

The output of the phase shifter 5, the voltage has the form

u_c,

u_s квадратуры колебаний ψ_оп(t) и y(t):At the outputs of the multipliers 12 and 14, 6 and 15 are allocated voltages, which are respectively cosine and sine

u _c

u _{s the} squared oscillations ψ _op (t) and y (t):

The outputs of the multipliers 13 and 7 of the voltage are respectively

In this case, the output of the adder 8 voltage

When changing the relative speed between interacting objects, that is, when acceleration is taken into account, the a priori delay equation should be used [see Aces G.I. Statistical theory of the reception of complex signals. - M .: Owls. radio, 1977, p. 151, expression 3.66] of the form:

where ν is a constant coefficient,

- гауссов процесс с характеристиками

- Gaussian process with characteristics

δ (x) is the Dirac function.

задержки сигнала, входящее в выражения для напряжений u₁₂ и u₆, отличается от действительного значения задержки. В отличие от прототипа для компенсации указанного отклонения с помощью усилителя 16 и интегрирующего фильтра 17 вырабатывается промежуточное напряжение u₁₇ видаUnder the conditions of the propagation of a radio signal with a change in the relative speed between objects, the estimated value

the signal delay included in the expressions for voltages u ₁₂ and u ₆ differs from the actual value of the delay. In contrast to the prototype, to compensate for this deviation with the help of an amplifier 16 and an integrating filter 17, an intermediate voltage u _{17 of the} form

where k is the gain of the amplifier 16.

The voltage u _{17 is} summed with the voltage u ₈ and the voltage u ₁₈ = u ₈ + u ₁₇ is formed at the output of the adder 18, which, with the appropriate choice of the value of k, is

и

- соответственно, синусные и косинусные квадратуры опорного колебания ψ(t), учитывающие изменения задержки принимаемого сигнала при изменении относительной скорости между объектами.Where

and

- respectively, the sine and cosine quadratures of the reference oscillation ψ (t), taking into account changes in the delay of the received signal when the relative speed between the objects changes.

As in the prototype, the filter 9 is made in the form of an integrating amplifier and the voltage at its output has the form

those. directly proportional to the derivative of the envelope of the autocorrelation function ψ _op (t).

Voltage u ₉ through the control element 10 is a follow-up restructuring of the generator 11.

The results of mathematical modeling showed that for typical operating conditions, the increase in synchronization accuracy achieved by the use of the inventive device compared to the prototype device is 17 ... 38%. All newly introduced elements are widely used in radar and communication devices and their practical implementation does not cause difficulties.

Claims (1)

A discriminator for delay synchronization of a B-frequency discrete-coded signal, comprising a series-connected mixer, the first input of which is the discriminator input, the first filter, the output of which is the discriminator output, the first control element, a tunable carrier frequency generator, a 90 ° phase shifter, the first and a second multiplier, a first adder connected in series with a second filter, a second control element and a reference signal generator, the output of which is connected to the second input m of the mixer and the first multiplier, as well as the third multiplier and the fourth multiplier, the output of which is connected to the second input of the first adder, while the first input of the third multiplier is connected to the output of the reference frequency generator, and also contains the fifth and sixth multipliers combined by the first inputs with the discriminator input, the output of the fifth multiplier is connected to the second input of the second multiplier, and the output of the sixth multiplier is connected to the second input of the fourth multiplier, the second inputs of the third and fifth the multipliers are connected to the input of the phase shifter by 90 °, the first input of the first multiplier is connected to the second input of the sixth multiplier, characterized in that between the output of the first adder and the input of the second filter, a series-connected amplifier, a third filter and a second adder are introduced, to the second input of which the output of the first adder, and the output of the third filter is an additional output of the device.