RU2271070C2 - Parallel short-wave modem - Google Patents

Abstract

FIELD: radio engineering; short-wave radio and other communication channels suffering character-to-character interference.

SUBSTANCE: novelty is that newly introduced in digital device that functions to demodulate digital signals in multibeam communication channel incorporating input signal conversion unit, resolving unit, and demodulation unit that has input memory item, unit for computing estimates of channel pulse response readings, and detecting unit are (N - 1) series-connected resolving units and (M - 1) demodulation units, each of M demodulation units being provided in addition with (N - 1) series-connected detection units.

EFFECT: enhanced noise immunity in reception.

2 cl, 2 dwg

Description

The invention relates to the field of transmission of discrete information and is intended for use in KB radio channel and other communication channels subject to the effects of intersymbol interference.

Known devices that use in the process of receiving information on a multipath channel the principle of feedback by decision. In such devices, decision making is made on one interference component of the input signal sample (on one beam). The signals of the remaining components (rays), which are delayed by the arrival time relative to the main beam signal, are compensated by subtracting from the input sample the sum of the estimates of the signals of these rays formed by using feedback on the solution [1, 2, 3]. Thus, the "interfering" effect of these beams on the reception of information on the main beam is eliminated.

The closest device that can be considered a prototype is the "adaptive corrector of intersymbol distortions in channels with phase shift keying" according to a.s. 517168 USSR, Cl. H 04 B, 1/12 [2]. The input of this device is connected to the input of the first subtraction circuit, the second input of which is connected through the adder to the outputs of the multipliers, except for the zero one, connected to the outputs of the correlators, some of whose inputs are connected to the output of the second subtraction circuit, and the other to the corresponding outputs of the shift register, the input of which is connected with the output of the solver, the first input of the second subtraction circuit connected to the output of the zero multiplier, and the second with the output of the first subtraction circuit, and the output of the first subtraction circuit connected h coherent detector with the input of the solver, and the second input of the coherent detector with the output of the zero correlator.

However, this device has low noise immunity, since the decision is made based on the result of demodulation of only one interference component of the signal, the energy of the remaining interference components is not used when making the decision. In addition, in this device for decision-making, only one signal sample is used per symbol duration, which also reduces the noise immunity of the device.

Known devices for evaluating the impulse response of the channel [3]. The closest analogue to the proposed invention is a "device for evaluating the parameters of a multipath communication channel" by a.s. 780211, M. Cl. H 04 B 3/46 [5], containing a delay element, N multipliers, the output of each of which is connected to the corresponding input of one of the N averaging and filtering blocks, a decision block, N inverter multipliers, N adders and a shift register.

However, this device uses simple multipliers to remove manipulation and therefore is suitable for receiving only signals of a single phase telegraphy (2-position signals) and cannot be used to receive signals of phase telegraphy of higher multiplicity, for example, 4-position, 8-position, etc. d.

In addition, N N-input adders are used in this device, which is the reason for the excessive complexity.

The objective of the invention is to increase the noise immunity of the reception due to the use of demodulation of the weight addition of the energy of all rays and the energy of several samples of the signal for the duration of the symbol, as well as simplification and ensuring applicability to the reception of multi-position signals of the device for evaluating the pulse response of the channel.

The solution to the problem of improving noise immunity is achieved by the fact that in a digital device for the demodulation of discrete signals in a multipath communication channel containing a block for converting an input signal, a block of solutions that consists of a decision circuit, and a block of demodulation consisting of an input memory element, a block for calculating the estimation of impulse response samples the channel and the detection unit, which contains the first and second subtractors, a coherent detector, a first modulator, a compensation signal storage device and a second modulator, and Together, the first inputs of both subtractors are the input of the detection unit, the output of which is the output of the second subtracter, while the output of the first modulator is connected to the first input of the compensation signal accumulator, the output of which is connected to the second input of the first subtractor, and the output of the first subtractor is loaded on the first input of the coherent detector the second input of which is connected to the first output of the block for calculating the estimates of the impulse response of the channel and the first input of the second modulator, the output of which is connected to the second input In order to increase the noise immunity of the reception, in addition to (N-1) series-connected decision blocks and (M-1) demodulation blocks, in each of the M demodulation blocks, (N-1) series-connected detection blocks are additionally introduced, and in each of N decision blocks is additionally introduced a storage of soft solutions and a memory element, the input of which is connected to the input of the decision circuit and the output of the storage of soft solutions, the second inputs of both modulators of the i-th detection unit of all M blocks demodulations are connected to the output of the decision circuit of the i-th decision block, and the output of the coherent detector of the i-th detection block of each of the M demodulation blocks is connected to the corresponding input of the soft decision store of the i-th decision block, while the (M + 1) th input of the drive soft decisions of the i-th decision block is connected to the output of the memory element of the (i-1) -th decision block, while in each of the M demodulation blocks, the i-th output of the channel impulse response count calculation unit is connected to the first input of the first modulator (i- 1) th detection unit, and the second input of the compensation signal storage device of the i-th detection unit is connected to the output of the compensation signal storage device of the (i + 1) -th detection unit, in addition, in each of the M demodulation units, the input of the i-th detection unit is connected to the output (i-1) - the first detection unit, and the input of the first detection unit is connected to the input of the calculation unit for the estimation of the impulse response samples of the channel and to the output of the input memory element, the input of which is connected to the corresponding output of the input signal conversion unit, the input of which is the input device, the output of the decisive last block circuit making device and is output connected to second inputs of calculating estimates of samples of the channel impulse response of M blocks demodulation blocks.

The solution to the problem of simplification and ensuring applicability to receiving multi-position signals of a channel pulse response estimator is achieved by the fact that a device for evaluating the parameters of a multipath communication channel containing an input delay line, N two-input adders, N averaging filters, a decision block, a decision delay line, an input which is connected to the output of the decision block, in order to simplify and ensure applicability to receiving multi-position signals, N modulation removal circuits, N modulators, a subtraction circuit, and many an input adder, wherein the output of the input delay line is connected to the input of the subtraction circuit, the second input of which is connected to the output of the multi-input adder, each of whose inputs is connected to the first input of the corresponding two-input adder and to the output of the corresponding modulator, the first input of which is connected to the output of the corresponding filter-accumulator and the second input of which is connected to the corresponding output of the decision delay line and to the first input of the corresponding modulation removal circuit, the second input of each of removing modulation m is connected to the output of the corresponding two-input adder, the second inputs of two-input adders coupled to output of the subtractor circuit and the output of each of the relief modulation schemes connected to the input of the corresponding filter averager, wherein the plurality of outputs of filter averager is the output device.

The figure 1 presents a structural diagram of the proposed device for the demodulation of discrete signals in a multipath communication channel, which is intended for demodulation of signals with phase shift keying. The device works in digital form. At the input of the device is an input signal conversion unit, traditional for digital signal processing devices. The functions of this unit are to convert to zero frequency, time sampling, level quantization and splitting into quadrature components of the input radio signal. As a result of these transformations, a sequence of digital samples (samples) of the quadrature components of the signal is formed at the output of this block, which together represent the complex envelope of this signal. The sampling frequency of the input signal is selected from the calculation of M complex samples per received symbol of duration T. The figure 1 shows for simplicity a particular case at M = 2, i.e. in this case, the signal is sampled at a rate of 2 samples per symbol with a T / 2 interval between them. The minimum possible value of M is 1, i.e. - one sample per character. With an increase in M, the quality of reception improves, but the requirements for the resources of a computing device increase.

The connections between the circuit elements shown in bold lines in FIG. 1 are intended to transmit quadrature digital samples, which together represent the complex envelope of the corresponding signal (ReZ + jImZ). In accordance with this, those circuit elements to which the complex signal is supplied are the complex signal processing units. The connections shown by thin lines are designed to transmit digital samples of material signals and to transmit characters.

The device shown in FIG. 1 consists of an input signal conversion block 1, two identical demodulation blocks 2 and N decision blocks 15, and in general, the number of demodulation blocks is M. Each of demodulation blocks 2 contains an input memory element 3, a sample calculation unit pulse response of the channel 11 and N of the detection units 10. Each of the detection units 10 comprises a first subtractor 4, a coherent detector 5, a first modulator 8, a compensation signal signal accumulator 9, a second modulator 6 and a second subtractor 7.

Block of decisions 15 consists of a storage of soft decisions 12, a decision circuit 13 and a memory element 14. The value of N is chosen equal to the maximum expected length of the channel impulse response, expressed in the number of symbol clock intervals T.

The input memory element 3 is a pair of memory cells for storing digital samples of the signal of the complex envelope of the input signal.

Each of the subtractors 4 and 7 is a pair of subtraction schemes that performs the operation of subtracting the complex envelopes of the quantities: (ReZ + jImZ) = (ReX-ReY) + j (ImX-ImY), where ReX, ImX are the quadrature components of the reduced, ReY, ImY are the quadrature components of the subtracted, ReZ, ImZ are the quadrature components of the desired difference.

Coherent detector 5 is a block that performs the operation of multiplying the complex value X, which is an input signal, by the complex conjugate value Y of the reference signal according to the algorithm:

(ReZ + jImZ) = (ReX * ReY + ImX * ImY) + j (ImX * ReY-ReX * ImY).

The output signal of the coherent detector Z is its soft solution.

Modulators 6 and 8 are devices that modulate the reference signal by rotating the vector of the reference signal by a certain angle in accordance with a modulation table that establishes the correspondence between the transmitted symbol and the phase of the modulated signal. The reference signal in this case is the corresponding component of the channel impulse response estimate.

The block for calculating the impulse response samples of channel 11 is a device that, based on the samples of the complex envelope of the input signal and the decisions made, arrives at its inputs, estimates the impulse response samples of the channel.

The drive 9 is a pair of adders for summing complex input values together with a pair of storage devices in which the resulting complex sum is stored. The storage of soft solutions 12 is a pair of M-input adders for summing complex soft solutions and a pair of storage devices for storing the result.

The decision circuit 13 makes a decision about the adopted symbol based on the total soft decision arriving at its input.

The memory element 14 is a pair of storage devices for storing the total soft decisions arriving from the output of the soft decision store on a clock interval.

The figure 2 shows a structural diagram of the proposed device for evaluating the samples of the impulse response of a multipath communication channel. The device is designed to process the quadrature components of the time sampled and quantized by the input signal level. The sampling interval is equal to the duration of the symbol T. Thus, the signals processed by the proposed device are presented in the form of a complex envelope, and the blocks included in the circuit implement complex operations on them. All connections between blocks, indicated by bold lines, are complex, i.e. transmit the quadrature components of the complex signal. The connections between the blocks, indicated by thin lines, carry information about the decision.

The device contains an input delay line 16, a subtraction circuit 17, N two-input adders 18, N modulators 19, N modulation removal circuits 20, N averaging filters 21, a decision block 22, a shift register 23, and a multi-input adder 24.

The device for demodulating discrete signals, presented in figure 1, operates as follows. For simplicity, we consider the operation of the device in steady state at a sampling rate of the input signal equal to 2 samples per received symbol in accordance with figure 1.

The input of the upper block of demodulation receives even samples of the complex envelope of the input signal, and the input of the lower block of demodulation receives odd samples, therefore, each of the blocks of demodulation 2 samples come with an interval equal to the duration of the symbol T. The input sample can be represented as a superposition of samples of interference signals components carrying consecutive characters:

where Z _{k, 1} is the kth in order sampling of the signal at the input of the 1st detection unit 10,

H _i - reference complex envelope of the i-th component of the pulse response of the channel (beam),

b is the transmitted character,

U _wk is the complex envelope of the noise component of the sample,

N is the maximum possible number of expected components of the channel impulse response.

The device starts to work when the samples of the complex envelope of the input signals are written to the input memory elements 3 of all the demodulation blocks 2. For one clock interval T, the detection of signals of all interference components of the input sample is performed. And the successive accumulation during NT in the chain of decision blocks 15 of partial soft decisions of all coherent detectors 5 forms the total soft decision about the next symbol for all interference components of the input signal. For all intermediate accumulated soft decisions, hard decisions are made by corresponding decision circuits 13. Moreover, at each clock interval, the decision circuit 13 of the last decision block produces the final hard decision about the next received symbol, which is the output.

The operation algorithm of the demodulation units 2 is based on the application of the decisions made on the received symbols to compensate for the effect of the signals of the "interfering" rays on the process of detecting the signal of each beam.

Conventionally, the clock interval T is divided into a number of microtact intervals, the number of which should be at least N - the maximum number of expected samples of the channel impulse response. In each micro-cycle interval, the detection units 10 operate in turn. In the first micro-cycle interval, the signals of the first time the beam arrives are detected. This is done in the first left-hand detection units 10 of all M demodulation units 2. In the second microtact interval, in the next order of detection units 10 of all M demodulation units 2, signals of the second ray arrival time are detected. And, finally, in the Nth microtact interval in the rightmost detection units, the signals of the last ray having the greatest delay relative to the first ray are detected.

Consider the algorithm of the first demodulation block 2, the work of the remaining demodulation blocks is similar to the first. The detection blocks 10 included in one demodulation block can be arbitrarily numbered from 1 to N.

The accumulators of compensation signals 9 contain the sum of the estimates of the signals of the interfering rays, which are delayed by the arrival time relative to the signals of the detected rays. A sample of the input signal stored in the input memory element 3 is fed to the input of the subtractor 4 of the first detection unit 10, designed to detect the signal of the first beam. The second input of this subtractor receives the countdown of the compensation signal from the output of the drive 9, which is a superposition of estimates of the signals of all beams that are delayed relative to the first, and can be represented as:

- оценка соответствующего символа, принятого в предыдущем тактовом интервале i-ой решающей схемой,Where

- evaluation of the corresponding symbol adopted in the previous clock interval of the i-th deciding circuit,

отсчет (луч) оценки комплексной огибающей импульсной реакции канала,

reference (beam) estimates of the complex envelope of the impulse response of the channel,

n = 1,2, ... (N-1) is the number in the order of the detection unit to which this compensation signal is supplied.

Since the last beam is detected in the Nth detection unit, the compensation signal for this unit

Since the compensation signal is the expected total estimate of the signals of the delayed rays, the output of the subtractor 4 of the first detection unit remains a “cleaned” signal of the first time the beam arrives and noise.

принятом по первому лучу. Надо отметить, что накопитель мягких решений имеет еще один (М+1)-й вход, на который в первом блоке решения поступает сигнал, равный нулю, а в каждом из последующих блоков на этот вход поступает сигнал с выхода элемента памяти 14 предыдущего блока решений.The signal from the output of the subtractor 4 is fed to a coherent detector 5, the second input of which estimates the 1st sample of the channel impulse response (reference signal of the first beam) coming from the block for calculating the samples of the pulse response of channel 11. A soft solution from the output of the detector enters the drive input soft solutions 12 included in the first block of solutions 15. The corresponding soft solutions of the detectors, obtained in a similar way in the first blocks for detecting the remaining (M-1) blocks of demodulation 2, are fed to the other inputs of this drive (in the particular case shown in figure 1, M = 2). Thus, at the output of drive 12, the sum of partial soft decisions with respect to the same symbol for the first ray over all M samples of the signal on the kth clock interval is stored. This total soft decision arrives at the input of the decision circuit 13, which makes a particular hard decision about the symbol

taken on the first ray. It should be noted that the soft decision store has another (M + 1) -th input, to which a signal equal to zero is received in the first block of the solution, and in each of the subsequent blocks this signal receives the output from the memory element 14 of the previous block of solutions .

который только что был продетектирован.The obtained hard decision is fed to the input of modulator 6, the second input of which is used to estimate the first reference of the channel impulse response. Thus, at the output of the modulator, based on this particular decision taken, an estimate of the signal of the first beam is formed

which has just been detected.

This estimate is subtracted from the sample of the input signal in the subtractor 7, forming

image input sample for the second order of detection unit 10:

As can be seen, in this sample, the first interference component (the signal of the first beam) is already compensated and will not interfere with the detection of signals of all subsequent interference components.

достоверность приема которого увеличивается благодаря сложению энергии первого и второго лучей.In the second-order detection unit 10, designed to detect the signal of the second beam, the compensation signal coming from the second drive 9 is subtracted from the subtractor 4 from this sample, which is the total estimate of the interference components that are delayed relative to the second beam. Thus, from the output of the subtractor 4, the signal of the 2nd ray is fed to the input of the second coherent detector 5, which is "cleared" of the effects of both leading and all delayed rays. The second input of this detector from the block for calculating the impulse response samples of channel 11 receives the estimate of the second reference impulse response of the channel. The soft solution from the output of the detector 5 is fed to the input of the soft solutions storage device 12, which is part of the second order block of solutions 15. The soft inputs of the detectors obtained in a similar manner in the second-order detection blocks of the remaining demodulation blocks 2 are sent to the other inputs of this soft solutions storage device. In addition, this drive 12 also receives a soft decision from the output of the previous in order drive of soft decisions stored in the buffer memory element 14 of the first decision block at the previous clock inter a shaft that carries information about the same symbol, the reception of which is carried out in the second-order detection blocks. Thus, at the output of this drive, an accumulated sum of private soft decisions about one and the same symbol is taken, taken on the first and second rays. This total soft decision arrives at the input of the decision circuit 13, which makes a particular hard decision about the received symbol

the reliability of the reception of which increases due to the addition of the energy of the first and second rays.

который только что был продетектирован. Эта оценкаThe resulting hard decision is fed to the input of the modulator 6 of the second detection unit. At the second input of this modulator, an estimate of the second sample of the channel impulse response is applied. Thus, the modulator generates an estimate of the signal of the second beam

which has just been detected. This grade

subtracted in the subtractor 7 from the sample of the input signal of the second in order detection unit 10, thus forming the input sample of the 3rd detection unit:

As can be seen, in this sample the signals of the 1st and 2nd rays are compensated and, therefore, will not interfere with the detection of signals of all subsequent rays. After subtracting from this sample in the third order of detection unit 10 the delayed ray compensation signal generated in the corresponding drive 9, the signal of the third interference component is received at the input of the third coherent detector, which is “cleared” of the influence of other interference components.

This procedure is sequentially repeated for the following detection units 10, each time ensuring the detection of the signal of the corresponding beam, "cleared" of the interfering effects of the signals and leading and retarded beams.

It can be seen that over N clock intervals, each detector 5 of the demodulation block sequentially demodulates a signal of a certain interference component that carries the same symbol: on the 1st clock interval - the first detector, on the 2nd clock interval - the second detector etc., on the N-th clock interval - N-th detector. Thus, we can assume that the signals spaced in time, which are “separated” by the compensation method using feedback for the solution (for delayed rays) and direct communication for the solution (for leading rays).

It is known [4] that the rule of optimal addition of diversity signals provides for their weighting in proportion to the expected signal amplitude and inversely to the power of the interference in the channel. In the proposed device, weighing is proportional to the expected amplitude of the signal is ensured by the fact that the modules of complex samples of the reference signals of coherent detectors coming from the block for calculating the samples of the impulse response of channel 11 are equal to the expected amplitudes of the received signals of the corresponding interference components (rays).

Moreover, since the same noise component of the input signal is affected by all the detection blocks, and the signals of the “interfering” rays are compensated, we can assume that the interference power in all branches of the time diversity is the same. Therefore, the need to weigh inversely with the interference power disappears and we can assume that the algorithm for adding partial soft solutions is close to optimal.

The last decision circuit 13 makes the final hard decision on the transmitted symbol, which is the output in a given clock interval.

After the output decision is made, the compensation signals from the delayed rays, necessary for the operation of the device in the next clock interval during the reception of the next symbol, are calculated. This is done using a chain of modulators 8 and drives 9. Modulators provide the calculation of signal estimates of the corresponding "interfering" rays, and drives - their gradual accumulation.

The calculation procedure starts from the right-most shaper. Since the input signal of the Nth detection unit contains only one interference component, the modulator 8 and the drive 9 located on the right generate a compensation signal equal to zero.

которая запоминается в накопителе 9. В следующем тактовом интервале она будет служить сигналом компенсации для (N-1)-го детектора.At the output of the (N-1) th modulator 8, an estimate of the N-th interference component of the input signal is formed for the following clock interval T:

which is stored in drive 9. In the next clock interval, it will serve as a compensation signal for the (N-1) -th detector.

а полученная сумма запоминается и является сигналом компенсации для (n-2)-го детектора. Далее эта процедура повторяется до тех пор, пока для всех детекторов методом последовательного накопления не будут сформированы сигналы компенсации для следующего тактового интервала.In the third drive 9 on the right, a signal is added to this estimate

and the received amount is stored and is a compensation signal for the (n-2) -th detector. Further, this procedure is repeated until compensation signals for the next clock interval are generated for all detectors by the method of sequential accumulation.

After this, 14 partial soft decisions are stored in memory elements from the outputs of the soft decision drives 12. These stored private soft decisions are designed to accumulate soft decisions in the next clock interval.

This completes the processing of input samples of a given clock interval and the device waits for the arrival of input samples of the next clock interval.

Consider in steady state the operation of the device for evaluating the parameters of a multipath communication channel, the structure of which is presented in figure 2. Digital samples of the complex envelope of the input signal are fed to the input delay line 16, the delay time of which is equal to the maximum expected difference in the arrival of the extreme components of the channel impulse response (rays). This signal can be represented by equation (1).

The solution from the output of the decision block 22 is fed to the input of the shift register 23, each of the outputs of which is connected to the input of the corresponding modulator 19, the second input of which from the output of the corresponding filter-averager 21 is used to evaluate the corresponding component of the channel impulse response — the reference signal. A modulator is a device that, under the influence of a symbol arriving at its input, rotates the vector of the reference signal by a certain angle in accordance with the modulation table. For example, with 2-position modulation this angle is 0 or 180 degrees, with 4-position modulation it is selected from a number of 0, 90, 180 and 270 degrees, etc. As a result, an estimate of the corresponding component of the input signal is generated at the output of each modulator. All estimates from the outputs of the modulators are summed up in a multi-input adder 24, forming an estimate of the signal present in the input sample, in the form

The output of the input delay line 16 is connected to the input of the subtraction circuit 17, the second input of which receives an estimate of the received signal from the output of the multi-input adder 24. This estimate is subtracted from the sample of the received signal in order to compensate it. Thus, the signal at the output of the subtraction circuit 17 contains the noise component and the residual product of the compensation error of the input signal:

This signal from the output of the subtraction circuit 17 enters the first input of each of the N two-input adders 18, the second input of each of which receives a corresponding estimate of the component of the input signal from the output of the corresponding modulator 19.

Thus, at the output of the i-th two-input adder 18, a signal is formed consisting of the signal of the i-th interference component of the input sample, the noise component and the residual product of the compensation error of all other interference components:

The signal from the output of each of the two-input adders 18 is fed to the first input of the corresponding modulation removal circuit 20, to the second input of which a decision is made from the corresponding output of the shift register 23. The modulation removal circuit 20 is a device that rotates the input vector under the influence of the input symbol signal at the same angle as in the modulation process, but in the opposite direction. Thus, at the output of the i-th modulation removal circuit, a noisy estimate of the reference of the i-th component of the channel impulse response is formed, which is fed to the input of the corresponding averaging filter. The output signal of the i-ro filter-averager is a filtered average estimate of the i-th component of the channel impulse response. The set of outputs of all averaging filters is the output of the device. The passband of the filter-averager in order to minimize the dispersion of the output signal is selected to be minimal, but large enough from the point of view of reducing the inertia of tracking changes in the pulse response of the channel.

By introducing into the circuit a set of modulators and modulation removal circuits instead of a set of multipliers, the device is suitable for receiving multi-position signals, and replacing a set of N-input adders with a set of 2-input adders provides a simplification of the device.

Information sources

1. A.S. 343394 USSR, cl. N 04 L 17/02, 1972. A device for transmitting binary signals in a multipath communication channel, D. D. Klovsky, B. I. Nikolayev, I. L. Dorondov, - Published 1972, Bull. No. 20.

2. A.S. 517168 USSR, Cl. H 04 V 1/12. Adaptive corrector of intersymbol distortions in channels with phase manipulation, Yu.A. Goncharov et al. - Published 1976, Bull. No. 21.

3. Kureshi Sh.U.H. Adaptive correction, TIIER, 1985, T.73, No. 9, S.5-49.

4. Andronov I.S., Fink L.M. Discrete messaging over parallel channels. Publishing house "Soviet Radio", Moscow, 1971, p. 55.

5. A.S. 780211 USSR, Cl. H 04 B 3/46. A device for evaluating the parameters of a multipath communication channel, VG Kartashevsky and BN Nikolayev, - Published 1980, Bull. Number 42.

Claims (2)

1. A digital device for demodulating discrete signals in a multipath communication channel, comprising a block for converting an input signal, a block of decisions that consists of a decision circuit, and a block of demodulation consisting of an input element of memory, a block for calculating the estimation of samples of the pulse response of the channel, and a detecting block that contains first and second subtractors, a coherent detector, a first modulator, a compensation signal storage device and a second modulator, the first inputs of both subtractors being connected together being the input of the block detection, the output of which is the output of the second subtractor, while the output of the first modulator is connected to the first input of the drive signal compensation, the output of which is connected to the second input of the first subtracter, and the output of the first subtractor is loaded on the first input of the coherent detector, the second input of which is connected to the first output of the unit computing estimates of the samples of the pulse response of the channel and the first input of the second modulator, the output of which is connected to the second input of the second subtractor, characterized in that (N-1) series-connected decision blocks and (M-1) demodulation blocks, moreover, in each of the M demodulation blocks, (N-1) series-connected detection blocks are additionally introduced, and soft decision storage is additionally introduced into each of N decision blocks and a memory element, the input of which is connected to the input of the decision circuit and to the output of the storage of soft solutions, the second inputs of both modulators of the i-th block of detecting all M demodulation blocks connected to the output of the decision circuit of the 1st block of decisions, and the output is coherent about the detector of the i-th detection unit of each of the M demodulation units is connected to the corresponding input of the soft decision store of the i-th decision block, while the (M + 1) th input of the soft decision drive of the i-th decision block is connected to the output of the memory element (i -1) -th block of solutions, while in each of the M demodulation blocks, the i-th output of the channel impulse response sample calculation block is connected to the first input of the first modulator of the (i-1) -th detection unit, and the second input of the compensation signal storage i the detection block is connected to the output the accumulator of the compensation signal of the (i + 1) -th detection unit, in addition, in each of the M demodulation units, the input of the i-th detection unit is connected to the output of the (i-1) -th detection unit, and the input of the first detection unit is connected to the input of the unit computing estimates of the impulse response samples of the channel and with the output of the input memory element, the input of which is connected to the corresponding output of the input signal conversion unit, the input of which is the input of the device, while the output of the decision circuit of the last decision block is the output of oystva and connected to second inputs of calculating estimates of samples of the channel impulse response of M blocks demodulation blocks. 2. A device for evaluating the parameters of a multipath communication channel, containing an input delay line, N two-input adders, N averaging filters, a decision block, a shift register, the input of which is connected to the output of the decision block, characterized in that N modulation removal circuits are introduced, N modulators , a subtraction circuit and a multi-input adder, wherein the output of the input delay line is connected to the input of the subtraction circuit, the second input of which is connected to the output of the multi-input adder, each of whose inputs is connected to the first input of the corresponding a two-input adder and with the output of the corresponding modulator, the first input of which is connected to the output of the corresponding filter-accumulator, and the second input of which is connected to the corresponding output of the shift register and to the first input of the corresponding modulation removal circuit, the second input of each of the modulation removal circuits connected to the output of the corresponding two-input adder, while the second inputs of all two-input adders are connected to the output of the subtraction circuit, and the output of each of the modulation removal circuits is connected to the input of sponds-averager filter, wherein the plurality of outputs of filter averager is the output device.

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