RU2032989C1 - Device testing susceptibility of receiver to noises - Google Patents

Abstract

FIELD: radio engineering. SUBSTANCE: device testing susceptibility of receiver to noises includes generators 1,4,7, counter 2,5,10,14,17, two digital-to-analog converters 3,6, adder 8, starter 9, decoders 11,18, attenuator 12, storage 13, comparator 15, amplitude detector 16, indicator 19, tested radio receiver 20. Positive effect is achieved due to exclusion from measurement process of time intervals during which a priori known information on tested radio receiver is registered which leads to reduced time of testing. EFFECT: reduced time of testing. 2 dwg

Description

 The invention relates to radio engineering and can be used to control the susceptibility of a radio receiver to interference through non-primary reception channels during production control, acceptance tests and maintenance during operation.

 In FIG. 1 shows a structural electrical diagram of a device for monitoring the susceptibility of a radio receiver to interference; figure 2 timing diagrams explaining the operation of the device.

 The device for monitoring the susceptibility of a radio receiver to noise includes a series-connected clock generator 1, a first pulse counter 2, a first digital-to-analog converter 3 and a first controlled generator 4, connected in series with a second pulse counter 5, the input of which is connected to the overflow output of the first pulse counter 2, and a second digital-to-analog converter 6 , a second controlled generator 7 and an adder 8, the second input of which is connected to the output of the first controlled generator, a start block 9, the output of which the second is connected to the blocking input of the clock 1, a third pulse counter 10 is connected in series, the input of which is connected to the overflow output of the second pulse counter 5, and the overflow output with the input of the start block 9, the first decoder 11 and the controlled attenuator 12, the signal input of which is connected to the output adder 8, and the output is the input of the monitored radio 20, connected in series to the memory unit 13, the input of which is connected to the output of the third counter 10 pulses, and the fourth counter 14 pulses, com an arator 15, the output of which is connected to the input of the fourth counter 14 pulses, an amplitude detector 16, the output of which is connected to the input of the comparator 15, and the input is the output of the monitored radio 20, sequentially connected to the fifth counter 17 pulses, the input of which is connected to the output of the fourth counter 14 pulses, second decoder 18 and indicator 19.

 The clock generator 1 is made on digital microcircuits 561LA7.

 The first, second, third and fifth counters of 2, 5, 10, 17 pulses are made on microcircuits 561IE14 and 561LA7.

 The first and second digital-to-analog converters 3 and 6 are made on K 572PA1A and K140UD8 microcircuits.

 The first and second controlled generators 4 and 7 consist of a high-frequency generator with two transistors, made on the principle of compensating for losses in the circuit due to positive feedback, and a power amplifier with an output transformer for matching the output resistance of the power amplifier and the input resistance of the adder. A varicap is included in the oscillatory circuit of the high-frequency generator, with the help of which the generator is tuned in frequency.

 The adder 8 is made on resistors.

 Launch block 9 is made on 561LA7 digital microcircuits.

 The first and second decoders 11 and 18 are made on digital microcircuits 561ID1 and 561ID5, respectively.

 The controlled attenuator 12 is a resistive matrix, and since the difference in attenuation between adjacent levels is the same, the matrix is made on the required number of resistors of two denominations. Level switching is performed using RES49 relays controlled by electronic keys on transistors of the KTS613B microassembly.

 The memory unit 13 is made on 176RU2 microcircuits.

 The fourth counter 14 pulses made on a digital microcircuit 561IE15.

 The comparator 15 is made on an analog chip 140UD8.

 Amplitude detector serial diode detector.

 Indicator 19 is made on a seven-segment LCD.

 A device for monitoring the susceptibility of a radio receiver to interference works as follows.

The pulses from the output of the clock generator 1 are fed to the input of the first (reverse) counter 2 pulses (mod M ₁ ). A sequence of binary codes of numbers from 0 to M ₁ is formed on its information output:
M ₁ Df / ΔF, where Df is the operating frequency range;
Δ F is the passband of the radio.

These codes are converted by the first digital-to-analog converter 3 into a stepwise increasing voltage. When the number M _{1 is} reached, the overflow signal is generated at the overflow output of the first counter 2 pulses, which switches the addition function to the subtraction function. In this case, a decreasing sequence of numbers from M ₁ to 0 will be formed, with the help of which the first digital-to-analog converter 3 will form a stepwise decreasing voltage. When reaching 0, a loan signal is generated, which will change the subtraction function to the addition function and the process will be repeated. The triangular-shaped voltage thus obtained controls the scanning of the frequency f _{1 of the} first controlled oscillator 4 in the range Df.

The pulses of the change of functions from the overflow output of the first counter of 2 pulses are fed to the input of the second counter (reverse) 5 pulses (mod M ₂ = M ₁ ), which together with the second digital-to-analog converter 6 will generate a triangular voltage that controls the scanning of the frequency f _{2 of the} second controlled generator 7 in the range of Df.

 The power level of the first and second controlled generators 4 and 7 is the same, since there is no reason to set other ratios. Next, the signals are fed to the adder 8, the output of which the total signal is fed to the signal input of the controlled attenuator 12.

The pulses of the change of functions of the second counter of 5 pulses are fed to the input of the third counter of 10 pulses (mod M ₃ ):
M ₃ h, where h is the number of levels of the controlled attenuator 12.

The possible range of powers at the output of the controlled attenuator 12 is
DP (dB) 10 log (R _bl / R _o ), where R _{bl the} power of blocking interference (specified by relevant standards);
P _{about the} sensitivity threshold of the radio.

 The number of attenuation levels h 1 + + DP / ΔP, where ΔР (dB) is the required resolution of the change in the power of the probe signal.

 The third counter 10 pulses is a digital counter with pre-loading data.

Since up to a certain power level Р _{r of the} probing signal (Р _о <Р _r <Р _ow , where 1 <r <h), only the responses corresponding to the main reception channel, the number of which is a priori known, will appear at the output of the monitored radio receiver, it is advisable to start the measurements from level r. The binary code number r is loaded into the third counter 10 pulses when you turn on the device.

The value of P _{r is} determined based on the worst selectivity of the radio receiver on non-primary reception channels (regulated by relevant standards).

 Thus, under the influence of input pulses, the output of the third counter 10 pulses binary numbers of r to h appear in sequence, which are decrypted by the first decoder 11, the output signal of which sequentially switches the controlled attenuator 12 to the corresponding attenuation levels.

 From the output of the controlled attenuator 11, a probing effect is applied to the input of the controlled radio 22, the responses of which from the output of its intermediate-frequency amplifier are supplied to an amplitude detector 16, from the output of which a response envelope is supplied to a comparator 15, designed to normalize the response amplitude for matching with the input levels of digital microcircuits .

 Next, the pulses corresponding to the responses are fed to the input of the fourth counter 14 pulses.

The fourth counter 14 pulses is a digital counter with a programmable conversion module M ₄ .

When switching to each level i (r≅i≅h) of attenuation, the binary code of number i is supplied to the address input of memory unit 13. In this case, the corresponding value of the conversion module M _4i is loaded into the fourth pulse counter 14.

The value of the conversion module for each level is found from the expression
M _4i N _o / K _i , where N _o M _i h the number of responses at the output of the monitored radio during the measurement time corresponding to the main reception channel;
K _i weights.

Using the weighting coefficients with the linear dependence P (t), the required time periods of the presence of the ith attenuation level in the controlled attenuator are taken into account for discrete simulation of the required law of the probability distribution of the powers of the interfering signals in a real electromagnetic environment
w (P) bP ^-m , 1≅P≅10 ^s , where b (1-m) / P _bl ^1-m Р _о ^1-m ) normalizing factor;
m is the degree of hyperbola (known for typical electromagnetic environments).

Weights are found from the expression
K ₁ (B ^{h + 1-1} B ^hi ) / (B 1)> 1, where B (P _bl / P _o ) (m-1) / h.

M

K

/N_o.From the output of the fourth counter 14 pulses each M _4i- th pulse is fed to the input of the fifth counter 17 pulses, which can preload data. When the device is turned on, it loads a binary code of the relative number of responses due to the main reception channel that may occur at the output of the monitored radio receiver when a sounding signal with a level from the 1st to the rth

M

K

/ N _o .

 Upon receipt of each pulse from the output of the fourth counter 14 pulses, this value increases by one.

M

K_i+

N_iK

/N_o.Thus, during the measurement at the output of the fifth counter 17 pulses appears binary code number
G =

M

K _i +

N _i K

/ N _o .

 The numerator is the number of responses due to both the main and minor reception channels appearing at the output of the monitored radio receiver when a probing signal is supplied to its input, simulating a predicted electromagnetic environment with a uniform frequency distribution and a probabilistic power distribution of the interfering signals according to the law w (P).

The physical meaning of the quantity G is seen from the expression:
G ΔF _ec / ΔF, where ΔF _{ec is} equivalent to the number of penetrating signals, the passband of the radio, taking into account the minor reception channels.

 Thus, G is a statistical characteristic of a radio receiver, showing the relative width of the radio-receiver bandwidth equivalent in terms of the number of penetrating signals in a real electromagnetic environment and, thus, quantifying the real susceptibility of the radio receiver to interference.

 The binary code of the resulting value of G is supplied to the second decoder 18, the output of which is connected to a digital indicator 19.

 After passing through the third counter 10 pulses of the entire set of pulses, a blocking pulse will appear at its overflow output, which will be input to the start-up block 9, at the output of which there will be a level blocking the operation of clock generator 1, and the monitoring process will stop.

Ki)/(h r + 1) >> 1 раз.As a result, the control time will be reduced compared to the prototype in
(

Ki) / (hr + 1) >> 1 time.

 At the next start, after pressing the button that is part of the start-up block 9, a level will appear at its output allowing the operation of clock generator 1 and the measurement process will be repeated.

Claims (1)

 DEVICE FOR CONTROL OF THE RADIO RECEIVER'S SENSITIVITY TO INTERFERENCES, containing a controllable attenuator, a radio receiver and an amplitude detector, a first counter, two generators, an adder, a memory unit, a comparator and an indicator, characterized in that, in order to reduce the monitoring time, a second counter is connected in series, the input of which is connected to the first output of the first counter, and the first digital-to-analog converter, the output of which is connected to the input of the second generator, the output of which is connected to the first the input of the adder, the output of which is connected to the first input of the controlled attenuator, the second input of the adder is connected to the output of the second generator, the input of which is connected through the second digital-to-analog converter to the second output of the first counter, the third counter is connected in series, the input of which is connected to the output of the second counter, block start and a clock, the output of which is connected to the input of the first counter, the first decoder, the input of which is connected to the second output of the third counter, which is connected to the input of the memory unit, the output of the first decoder is connected to the second input of the controlled attenuator, a fourth counter is connected in series, one input of which is connected to the output of the memory unit, and the other with the output of a comparator, the input of which is connected to the output of the amplitude detector, the fifth counter and the second decoder, output which is connected to the input of the indicator.

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