RU2002101936A - Method and device for converting a physical quantity measured using a measuring device - Google Patents

Claims (17)

1. A method of converting a certain physical quantity Q _i , measured with a measuring device, into electrical impulses, each of which is representative for a certain elementary quantity P, and this method comprises the following steps, in which the measurement of a given physical quantity Q _i with a quantization frequency fe; calculation and encoding in a number of r bits of an integer n _i corresponding to a given physical quantity Q _i ; adding m _i times this integer n _{i to} itself with the addition frequency f by means of addition, the storage capacity of which is limited to t = 2 ^r , and the number m _i corresponds to the number of additions that must be performed to exceed the said storage capacity t of addition means for a given value of n _i, characterized in that it further comprises the steps of forming is carried out, in the case where the storage capacity of said adding means is exceeded, on the one hand, one electrical mpulsa, and on the other hand, the crushing error x _i in the case where there is no equality relationship Q _i / P integer such that _{x i = (m i xn i} ) / t; transferring the aforementioned crushing error x _i to the input of the addition means and performing its addition with the aforementioned integer n _i if there is no change in any new physical quantity, or with a new integer n _{i + 1} representative for the new measured physical quantity Q _{i + 1} if this new physical quantity has been measured; repeating the stage of formation of the electric pulse and the error of crushing at the output of the addition means and transferring this error of crushing to the input of the addition means. 2. The method according to claim 1, characterized in that they form an SS addition signal with a frequency f at which the addition and transfer steps are carried out, and the said frequency f varies as a function of the value of a given physical quantity Q _i . 3. The method according to claim 1 or 2, characterized in that the said integer n _i is expressed by the ratio:

where E (a) means the mathematical function of the integer part a and where 0≤ α <1. 4. The method according to claim 3, in accordance with which α = 0.5. 5. The method according to claim 1, characterized in that they form a control signal for the control system, the frequency of which is the quantization frequency fe, wherein said signal simultaneously starts the steps of measuring the physical quantity Q _i , adding an integer n _i and selecting the frequency f of the signal of addition CC. 6. A device (10) for converting a certain physical quantity Q _i measured with a quantization frequency fe with a measuring device (12) into electrical pulses, each of which is representative for a certain elementary quantity P, and the said device contains a computing unit (18) associated with the output of the aforementioned measuring device (12) and designed to calculate and encode a number r of bits of an integer n _i corresponding to a given physical quantity Q _i ; a conversion unit (20) associated with the output of said computing unit (18) and designed to generate an electric pulse whenever a certain elementary quantity P passes through said measuring device, and the combination of these electric pulses forms an SPS signal, the frequency of which is representative of this a physical quantity, wherein said conversion unit (20) contains addition means (26), the storage capacity of which is limited to t = 2 ^r , characterized in that These means of addition contain two inputs E ₁ and E ₂ and two outputs S ₁ and S ₂ , namely: input E ₁ connected to said computing unit (18) and receiving said integer n _i ; output S ₁ , yielding either the result of the addition of two input signals (E ₁ , E ₂ ), or the crushing error x _i when there is no equality of the ratio Q _i / P to an integer and when the accumulation capacity of the addition means (26) is exceeded; the input E2 associated with the output S ₁ for transferring the result obtained at this output S ₁ to the input E ₂ so that, on the one hand, the addition means (26) are able to sum m _i times the integer n _i with itself moreover, this number m _i corresponds to the number of additions that must be performed to exceed the accumulation capacity t of said addition means (26), and on the other hand, to transfer the crushing error x _i generated at the output S ₁ to this input E ₂ ; output S ₂ , on which the SPS signal is generated when the accumulation capacity of the addition means (26) is exceeded. 7. The device according to claim 6, characterized in that it further comprises means (30) for selecting an SS addition signal with a frequency f at which additions and transfers are carried out, said frequency f changing as a function of the measured value of a given physical quantity Q _i for implementation automatic control of this frequency f as a function of the value of a given physical quantity. 8. The device according to claim 7, characterized in that the said selection means (30) are controlled by the control signal SU. 9. The device according to claim 7, characterized in that said selection means (30) comprise: a decoding device (32) associated with said computing unit (18); blocking circuit (34), the inputs of which are connected to said decoding device; the set of gate logic circuits (50, 52, 54, 56, 58, 60, 62) of type "I", containing two inputs, one of which is supplied with a signal of a predetermined frequency, and the other is supplied with a selection signal coming from the decoding device (32) and intended to energize only one of the “AND” type gate logic circuits; one OR gate type logic circuit (64) associated with each of the outputs of said AND type gate logic circuits and outputting at its output a signal of a predetermined frequency coming from one of the AND type gate logic circuits. 10. The device according to claim 9, characterized in that the said computing unit (18) is configured to control the issuance by the decoding device (32) of a selection signal designed to activate one of the gate logic circuits of type "I". 11. The device according to claim 6, characterized in that the said addition means (26) are formed by logical adders (26a, 26b, 26c, 26d). 12. The device according to claim 6, characterized in that the said conversion unit (20) further comprises first locking means (22, 22a, 22b) located between the said integer number calculating unit (18) n _i and the input Ei of the means (26) addition, moreover, these first locking means are configured to provide access to the said integer n _i in the addition means under the control of the control signal SU. 13. The device according to p. 12, characterized in that the said block (20) conversion contains the second means (24, 24a, 24b) blocking, located between the aforementioned first means (22, 22a, 22b) blocking and the input E ₁ means (26 ) additions that take the mentioned integer n _i in the case when the access permission is issued using the control signal SU, and these second blocking means give permission to transfer this integer to the input E ₁ means (26) addition in the rhythm of the frequency of the signal f addition SS. 14. The device according to item 12 or 13, characterized in that this device contains third locking means (28, 28a, 28b) located between the output S ₁ and input E ₂ of the addition means (26), and these third locking means allow transfer said value from the output S ₁ to the input E ₂ in the rhythm of the frequency f of the signal of addition of the SS. 15. A device according to any one of claims 12-14, characterized in that at least one of the means among said first, second and third means (22, 24, 28) of blocking is formed by trigger circuits. 16. The device according to any one of paragraphs.6-15, characterized in that the said integer n _i can be expressed by the ratio:

where E (a) means the mathematical function of the integer part a and where 0 ≤ α <1. 17. The device according to clause 16, for which α = 0.5.