RU2000578C1 - Device for frequency measurement - Google Patents

Abstract

The invention relates to measuring technique and can be used to measure the frequency of a signal. The frequency measuring device includes: key 1, delay line 2, adders 3, 6. 7. subtractor 4, phase shift circuits 5, 8, amplitude detectors 9-12, analog-to-digital converters 13-16, calculator 17, control device 18 . 3 s.p. f-ly, 3 ill.

Description

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ABOUT

The invention relates to. to the usability of measuring the frequency of electrical signals, in particular radio signals, and can be used in various measuring systems, including the number in interferometers operating in a wide frequency range.

A device is known for controlling the frequency stability of a generator (see US patent N; 2902С49, class 324-82, 09/01/1959), containing two branches connected to the input of the device with the guards: one limiter, and the other | el connected serially .g- igeg.b, delay line and ps, J.IH g-, .11 th. In this case, the outputs are indicated;; en, I- - i Г; ,; ocsoi I correspond- jn.- 1 - i -I; e 11 (1ge, petector, output 1ot, | i g, -1 mh: 1h indicator.

g.; (“1.3-1 pm of the gzogo device is- v OTI i-th thread accuracy of absolute ii MiVi. frequency associated with n. Ch. |, n .. S.Gu characteristics of fzzovy g;; g, mon-readers, as well as the presence of lmpgtu / h. -t- opom conversion

i.-ci -j P - G digital device

i i „, h ..tgy (see US Patent No.

JL, - -t:, 82, 02.11.71), taken for

,, ,, (d ..- 3 P r.

1 ,. T - 1- o /; epo; nm1T polno and -l, rad. When scrap you. ,, iil i Ч1МЯНУТ1 STRIP

i. j 5 pzhrzhki is formed -:. with the fifth signal, from high i-ji, g / l, shifted-G1. i L, j / H jro signal of a band-pass; ...-,., {, i-m .. hump total l; .--, from - -. сп од ю ю сп сп сп ни ни ад из ад ад ад f ад ад f / со signal; t. Vy-roro at 90 °, a third g% .m gig. 1.1 is formed. Formed; p 1 lean signals are also detected by IO.:T to the corresponding inputs of ps: the second cpmp of the radiator, and the second and third total signals are received from the corresponding inputs of the PTO-rega comparator, the input signals of which compose a code that allows to evaluate input frequency

With this device in mind, there is a need to use a large number of couplings, such as described, to ensure high measurement accuracy, which leads to a significant complication of the entire device, an increase in its size and weight

The aim of the invention is to ensure high accuracy of frequency measurement in a relatively wide frequency range.

NS BOS YAMRTNOGG1 UV-1CHRCIA “I ChMTO 11

 device

This is achieved by the fact that in a known frequency measuring device containing a delay line, the output of which is connected to the input of the first adder, with the input

a subtracting device, the input of the second adder and the input of the first phase shift circuit, and four amplitude detectors connected to the corresponding outputs of the first adder, the subtracting device, the second adder and the third adder, the first input of which is connected to the input of the device, as well as to the second inputs of the first adder and subtracting device and with the input of the second phase shift circuit,

the output of which is a pull to the second input of the adder port, and the output of the first phase shift circuit to the second input of the third adder, a key, four analog-to-digital body transforms (ADCs), a calculator and a control unit are introduced, and the mentioned ADCs are connected between the outputs of the corresponding amplitude detectors and corresponding inputs of the calculator, the key input is connected to the device input, output

- with the input of the delay line, and the control input with the output of the control unit, which is also connected to the control input

Such an arrangement of the device makes it possible to provide high accuracy in measuring the frequency due to the ability of the evaluator to evaluate the arbitrary phase shift created by the delay line, and due to the possibility of compensation

the channel transmission coefficients are identical due to the key entered.

A comparative analysis of the claimed technical solution with the prototype shows that the claimed technical solution differs from the prototype by the presence of a key, four ADCs. the calculator and the control unit, as well as the inclusion of the aforementioned key between the input of the device and the input of the delay line, the connection of the outputs of the amplitude detectors through the corresponding ADCs with the corresponding inputs of the calculator, the control input of which and the control RHOD of the said key are connected to the output of the control unit. Since these characteristics ensure the achievement of the required technical result, they are essential and necessary in all cases of using the proposed device

In Fig. 1, a block with a ".em device;" ne fsh 2 vemorny d.prlmml voltage O OGD 11CH11-),, f 1) b. ,

on fs 3) warhead i nil,

The frequency measuring device comprises a key 1 and a delay line 2 connected in series. In this case, the key input is connected to the input of the device, and the output of the delay line is connected to the first adder 3. subtractor 4, the first phase shift circuit 5 and to the second adder 6. In addition, the input of the device is connected to the second input of the first adder 3, the second input of the subtractor device 4, with the input of the third adder 7 and with the second phase shift circuit 8, the output of which is connected to the second input of the second adder 6, and the output of the first phase shift circuit 5 - with the second input of the third adder 7. In turn, the output of the first adder 3, subtract The device 4, the third adder 7 and the second adder 6 are respectively connected to amplitude detectors 9, 10, 11, 12, the outputs of which are connected to the corresponding ADCs 13,14, 15, 16, the outputs of which are connected to the corresponding inputs of the calculator 17. In this case, the input the control key 1 and the control input of the calculator 17 are connected to the output of the control device 18.

The device operates as follows. Before the next frequency measurement, the control unit generates a command providing the opening of the key 1 and the operation of the calculator 17 in the channel calibration mode. Due to the opening of the key 1 in the presence of a signal at the input of the device, the signals at the outputs of the adders 3, 6, 7 and the subtracting device 4 will be the same in value. Denoting the indicated voltages by U, can record the output voltages of the respective detectors taking into account their transfer coefficients as

Un U Ki3

UH U K, 4

Ui5 U Ki5

  Ki6 (1)

At the same time, the ADC outputs receive digital codes corresponding to the indicated values, which are supplied to the corresponding inputs of the calculator 17. The latter, in the calibration mode, calculates the voltage ratios Uia to the voltages Ui4, Uis and Uie. equal respectively

Ui3jRi3 aJJnJtu

Ul4 U14 Ul5 K15 Y U16 K16

the values of which are memorized.

After a time interval sufficient for calculating the indicated relations and storing them, the control unit releases the command, whereby the key 1 turns out to be closed, and the calculator 17 switches to the frequency measurement mode.

Let the input signal have the form of a sinusoid with an amplitude equal to U. and a frequency equal to co. The instantaneous value of such a signal can be written as

and - U cos ah

(3)

Assuming that the delay in the delay line 15 2 is equal to g, we can write the instantaneous value of the signal at the output of the delay line 2 as

twenty

ig U cos ((about t - al)

(4)

Comparing expressions (3) and (4), we see that the voltage at the output of the delay line is phase shifted relative to the input signal by approx. Denote by 0 the value equal to

r sot-2lp.

where n is an integer, and consider the vector diagram of FIG. 2, where:

X is the voltage amplitude at the input of the device;

Y is the voltage amplitude at the output of the delay line;

Kheo is the voltage amplitude at the output of the second phase shift circuit (by l / 2);

Ygo is the voltage amplitude at the output of the first phase shift circuit (by / 2); A is the voltage amplitude at the output of the first adder;

B is the voltage amplitude at the output of the subtractor;

C is the voltage amplitude at the output of the third adder;

O is the voltage amplitude at the output of the second adder.

Taking into account that the first and second phase shift chains provide a phase shift equal to / 2, and using the known geometric relations in the triangle, we can write

A2 - X3 + Y2 + 2XY cozy 55V2 - X2 + Y2 - 2XY cos p

C2 - X2 + Y2 - 2XY sin (p D2 - X2 + Y2 + 2XY sin p (5)

Subtracting the second from the first equality, and

from the fourth third, we get

A2 - B2 - 4XY COS p

D2-C2-4XY (6)

Dividing the second equality by the first, we get

tgp

D2-C2

(7)

From (7), taking into account the signs of sine and cosine (6), we can find expressions for the value

D2 - C32 2

u- + arctg if A B

A2 - B2

goog

and arctg -t -. if A2 B2 and D2 C2

A2 - B2

(L - 2 L + arctan -. Dg, if A2 B2 and D2 C2 A2 - B2

at TJr, if A2 B2 and D2 C2

p- y, if A2 B2 and D2 C2 (8)

Given the value of /, one can easily determine the desired frequency value, which will be equal to

ABOUT)

2 L n -f 0

 . (-

g

Similarly to (1) in the mode of measuring the frequency of the voltage at the respective outputs of the detectors will be equal

(YU)

and the corresponding codes will be generated at the outputs of the respective ADCs.

In the frequency measurement mode, the calculator 17 multiplies the output codes of the ADCs 14-16 by the corresponding previously calculated ratios a, fl and y, which leads to the formation of Ki3

vanyu four numbers: A-Ktz; W Ki Ki3

Ku

K13

-In-goats; With Kis - With Ki3 and D Ki6 Y-

M5Mb

-D Ktz. Calculated the ratio of the squared differences ((D-Ki3) 2 - (C-Ki3) 2) and ((A-Ki3) 2 - - (В Кп) 2). we are convinced that it coincides with the right-hand side of expression (17), which, in accordance with relations (8) and (9), allows

determine the exact value of the desired frequency.

It follows from the foregoing that the presence of a calibration mode eliminates the influence of the spread and instability of the transmission coefficients of such active elements as amplitude detectors, and the adopted measurement method, in addition, is insensitive to the instability of the transmission coefficient of the closed key 1 (see expressions (5 ) - (7)).

Thus, the measurement accuracy in the proposed device will be determined by the delay line, phase diagrams

5 shift, totalizers and subtractor. But since The listed devices can be made exclusively on passive elements such as transmission lines, their accuracy and stability can be quite high, ensuring the accuracy of frequency measurement at the level of tenths or even hundredths of a percent.

The latter allows one to ensure high accuracy of frequency measurement with a sufficiently simple construction of the device and its small dimensions.

The device is quite easily implemented using a standard element base in terms of creating a key,

0 delay lines, adders, subtractor, phase shift circuits, amplitude detectors, ADC and calculator (taking into account the algorithm shown in Fig. 3). As a control device in

In the simplest case, a multivibrator in self-oscillating mode can be used.

Claims (4)

From the description of the operation of the device it also follows that when squared amplitude detectors are used, squaring operations in the calculator 17 can be excluded (the operations combined by the dashed line in Fig. 3 are excluded). The claims 51. A frequency measuring device comprising two branches connected to the input of the device, one of which contains a delay line, the output of the first branch being connected to a first adder, a subtracting device, a second adder and a first phase shift circuit, four amplitude detectors connected respectively to the outputs a first adder, a subtractor, a second adder and a third adder, the first input of which is connected to the output of the second branch, to which are also connected the second inputs of the first adder, subtracting device and the second phase shift circuit whose output is connected to the second input of the second an adder, and the output of the first phase shift circuit is connected to a second input of a third adder, characterized in that that a key, four analog-to-digital converters, a calculator and a control unit are additionally introduced into it, and the mentioned analog-to-digital converters are connected between the corresponding outputs of the amplitude detectors and the inputs of the calculator, the key is installed in one of the mentioned branches of the device, and its input 0 controls and control input calculate / connected to the output of the control unit. 2. The device according to claim 1, characterized in that the amplitude detectors are linear detectors. 3. The device according to claim 1, characterized in that the amplitude hole detectors are quadratic detectors. 4. A device according to claim 1, characterized in that the phase shift circuits provide a 90 ° phase shift. FIG. 2. Gnaols J Vtfn