RU1817244C - Digital-to-analog converter - Google Patents

Abstract

The invention relates to automation and measurement technology and can be used to create high-precision converters of digital information to analog. The purpose of the invention is to increase reliability through simplification. The digital-to-analog converter contains a code-1 converter, a current source, a voltage reference source 2, a first operational amplifier 3, a first 4 and a second 5 resistors that have thermal communication with each other, a voltage divider 6 on the fourth and fifth resistors, a repeater 7 voltages on the third operational amplifier, code-controlled matrix 8, second 9 operational amplifier, third 11 and sixth 12 resistors, analog inverter 13, input bus 14 of the converted code, output bus 15. On elements 6, 7, 8, 10, 11 . 12 implemented functional pre verters code - current. 1 s.p. f-ly, 2 ill. 2 tab. h% e in Shchig. 1

Description

The invention relates to measuring technique, automation, and also to a technique for converting digital values to analog and can be used to create high-precision analog-to-digital converters.

The aim of the invention is to increase the reliability of the device by simplifying an additional functional converter.

Figure 1 presents the functional diagram of the DAC; figure 2 is an electric functional model of the DAC. .

The DAC contains a code-controlled divider (KUD) 1 current source 2 reference; voltage, operational output amplifier (op-amp) 3, resistor 4 of the output 0-V feedback loop, additional resistor 5, voltage divider, repeater, additional KUD 8 code - current, two additional op-amps 9, 10, two resistors 11 12, feedback of additional op-amps, an analog inverter 13, a control bus 14, an output bus 15, a substrate 16, the second converter 17 being functional.

Figure 2 shows the following notation:

Uon is the reference voltage, the output voltage of the converter is Mpr is the convertible code, Kmp is the DAC conversion coefficient, Km is the dividing factor of the additional KUD, Nnp.cr is the code formed from the high-order bits of the Nnp code, Ux is the voltage at the output of the additional amplifier, return channel, Uy is the voltage at the output of the additional amplifier.-... The functional model of Fig. 2 is an absolute analogue of the circuit of Fig. 1, with the only difference being that a voltage divider is excluded from the structure of the functional circuit, while like a converter on the second The op-amp 9 in the circuit of Fig. 1 has a conversion coefficient twice as high as the same amplifier in the circuit of Fig. 2. This circumstance simplifies Figure 2, without changing the nature of the conversion process.

The device operates as follows.

The converted n-bit code N is supplied via the control bus to the input of the KUD 1, from the output of which a current proportional to the code N goes to the input of the current-voltage converter, made on the operational amplifier 3 and feedback resistor 4, and then to the output bus 15. Persha m bits of code N also come

to the input of additional KUD 8, made as a weighted binary resistive current divider, from the output of which the current is converted to voltage by two additional operational amplifiers 9 and 10 with resistors 11 and 12 in their feedback circuit. We assume that the buffer (analog) amplifier-inverter has a gain of minus 1. Next, we accept for simplicity that the gain of the additional amplifier of the reverse channel K -1 ..

KN Cypr; and the electric model of figure 2 will correspond to the expression represented by the system of equations

- (Uon + Ux) KN .- Uy

- (Uon + Ux) (1-KN) Ux (1)

from the second equation of the system we have

;:. Ux: .Uop (1-Ky) (2) Ux I- (1-Km) ...... ()

twenty

25

Substituting (2) in the first equation of system (1), we obtain

Uv

Uon kn

1 + (1-Km) 3

(3)

The signal Uy is inverted by “tax

inverter 13 and feed / to the first output

additional resistor RT (figure 1) on

another conclusion of which is: : .. ;;, -. ; ..- /: -:: ;; :;: / -; :;:: ..

Thus, the voltage drop across the additional resistor RT will be

equal to ..., -:; .

L) RT ...; Uon2 (1-KN) (1+ (1-KN)

(4)

and proportional to the current flowing through RT. V -.; ....;

We choose the real coefficients KN for a three-bit binary converter, according to the assumption that

 at ; .

and

2 - (I -KN) 1+ (1 -KN.)

The right column of Table 1 shows that when the gain of the additional amplifier of the return channel K is -1, the instability of the total power dissipation in the region of the substrate 16 remains

the entire conversion range is slightly more than 30%.

Suppose that K 2. in this case, the system of equations (1) is transformed into the system of equations (4)

f - {Uon + Ux) KN - Uy

j-2 (Uon + Ux) (1-KN) Ux

The second equation of system (4) is transformed to the form

m- 2 Uon (1 KN) Ux- --T + 2 (1-KN)

Next, substituting (5) in the first equation of system (4), we obtain

Kn

(1 + 2 (1 -KN))

. (6)

URT voltage drop on additional resistor 5

(l- 1 + 2 (-Km)) in -and 3 -O -Km), 71

 vJon -i / l --- tt V /

1 + 2 (1 - KN)

If the transfer coefficient of the additional amplifier of the return channel is taken K -3, then system (1) will get the form (8)

- (Uon + Ux) KN Uy

. | -3 (Uon + Ux) 0-KN) Ux I

Wherein

.. ,, 4 (1 - KN), t URT-Uon 1 + Y (. (9)

We calculate the total power dissipation in the region of the substrate 16 for the cases K -1, K -3 given and reduce these values to Table 2.

Evaluation of the total active power released in the region of the substrate 16, according to Table 2, shows that at a transmission coefficient of K -3 of the additional amplifier 10, the variation of the active power in the entire conversion range is kept at about 10%, which corresponds to 3, 4 -discharge additional KUD 8, thus stabilizing the temperature in the region

substrates 16. and consequently, the accuracy of converting the code to an analog signal is improved. In contrast to the analogue and prototype, the proposed DAC achieves 5 high temperature stability and accuracy of the DAC in the long run, due to the simpler and linear structure of the additional converter.

10

Claims (2)

1. A digital-to-analog converter containing the first and second resistors with thermal coupling between them, the first and second 15 second code-current converters, the last of which is functional, the control inputs of the first of which are combined with the corresponding control inputs of the second converter 20 code is the current and is the input bus of the converted code, and the outputs are connected to the inverting inputs of the first and second operational amplifiers, the non-inverting inputs of which are connected to the zero potential bus, the output of the first operational amplifier is connected through its first resistor to its inverting input and is output bus, analog signal input first 30, the code-current converter is connected to the reference signal output of the second code-current converter, characterized in that, in order to increase reliability due to simplification, an analog inverter and a third resistor are introduced into it, the first and second conclusions of which are connected respectively to the inverting input and the output of the second operational amplifier, the output of which is connected to the input of an analog inverter 40, the output of which through the second resistor is connected to the output of the reference signal of the second code-current converter. 2. The converter according to claim 1, with the fact that the functional code-to-current converter is made in the form of a reference voltage source, a code-controlled divider on a resistive matrix and a block of two-point switches, voltage divider 50 fourth and fifth resistors, a voltage follower on the third operational amplifier and a current to voltage converter on the sixth resistor and fourth operational amplifier, the non-inverting input of which is connected to the zero potential bus, and the output to the first terminals of the sixth and fifth resistors, the second terminal of the last of which is combined with the non-inverting input of the third operational amplifier and the first terminal of the fourth resistor, the second terminal of which is the reference voltage output of the second converter code - a current and is connected to a first terminal of a reference voltage source, a second terminal of which is connected to the bus of the zero potential at all, the output of the third operational amplifier is integrated with its inverting input coupled to analog and vho0 house of a code-controlled divider, the control inputs and the first output of which are with the corresponding control inputs and output of the code-current functional converter, the second output of the code-controlled divider is connected to the second output of the sixth resistor and the inverting input of the fourth operational amplifier. Table 1 table 2 I / V Etc. cm N ty Figg