RU1774483C - Transistor switch - Google Patents

Abstract

The invention relates to a pulse technique and can be used in pulse modulating devices. The inventive device contains n transistors 2, n diodes 4, n resistors 3, 14, resistors 5.9, boost capacitors 6, 10, n-1 storage capacitors 8, diode 11, load 12, power supply 13, control bus 7 . 1 ill.

Description

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The invention relates to a pulse technique and can be used in pulse modulating devices.

The aim of the invention is to increase the efficiency of the switch while increasing its reliability.

The drawing shows a schematic diagram of a transistor switch.

The proposed device contains a switch 1 on n series-connected transistors 2. The emitter-base transition of each of the transistors 2 is shunted by the first resistor 3 and the first diode 4. The base of the first of the transistors 2 through a chain consisting of a second resistor connected in parallel 5 and the first boost capacitor b, connected to the control bus 7. The base of the n-th transistor 2 is connected to the first output of the (p-1) -th storage capacitor 8, the second pin of which is connected to the base of the (p-1) -th transistor 2 The rest of the drive capacitors from (n-2) to the second are connected respectively as well. The first terminal of the first storage capacitor 8 is connected to the base of the second transistor 2, and the second terminal of the capacitor 8 is connected to the first terminal of the fourth resistor 9, the second boost capacitor 10 and the anode of the second diode 11. The second terminals of the resistor 9, the capacitor 10 and the cathode of the diode 11 are combined and connected with a common point. In this case, the collector of the nth transistor 2 is connected through a load 12 to the positive pole of the power supply 13, the negative pole of which and the emitter of the first transistor 2 are connected to a common bus. The collector-emitter transitions of the transistors from the first to the (p-1) -th are shunted by the third resistors 14, and the nth fourth resistor 14 is connected between the emitter of the p-th transistor 2 and the positive pole of the power supply 13.

The proposed device operates as follows

In a static state, transistors 2 of switch 1 are closed, there is no voltage drop at load 12, and storage capacitors 8 accumulate charge. When a trigger pulse arrives on bus 7, the transistor chain is sequentially opened from the first to the nth and a front is formed on load 12 and flat part of the momentum. In this case, the base currents of transistors 2 from the second to the nth are provided by the storage capacitors 8. At the end of the triggering pulse, the transistors 2 are sequentially closed from the first to the nth. Wherein

due to the delay in locking the transistors from the second to the n-th on the collectors of the corresponding transistors, a post-pulse positive emission occurs, which recharges the capacitors 8. The diode 11 serves to accelerate the charge of the capacitors 8. The capacitor 10 provides for the forced switching on of the transistors 2 from the second to n-th, Resistor 9 serves to discharge the capacitor 10 in the pause between pulses and provide the required base current of transistors 2 from the second to the fifth.

The use of the claimed technical solution makes it possible to realize the stated task of increasing the efficiency of the switch while increasing its reliability. The efficiency of the switch is increased by eliminating the divider and the charging capacitors in the prototype. The introduced capacitors with new connections accumulate the energy of post-pulse positive emissions and use this energy to start the transistors of the switch from the second to the nth. Reliability is also enhanced by eliminating post-pulse positive emissions and by virtue of the fact that the second boost capacitor and its shunt resistor and diode are under the common bus potential. The application of the proposed solution also reduces the cost of the switch.

Claims (1)

SUMMARY OF THE INVENTION A transistor switch comprising p series-connected transistors, a control bus, p first resistors and diodes, a second resistor, a first boost capacitor and a power supply, wherein the emitter of the first transistor and the negative pole of the power supply are connected to a common bus, a base-emitter junction each of the transistors is shunted by a chain of parallel-connected first resistor and first diode, the base of the first transistor through parallel-connected second resistor and the first the boost capacitor is connected to the control bus, the collector of the nth transistor is connected through the load to the positive pole of the power supply, the collector-emitter junctions of the transistors from the first to the pth to the 1st are shunted by third resistors, and the nth fourth resistor is connected between the emitter of the transistor and the positive pole of the power source, characterized in that, in order to increase efficiency and reliability, L-1 storage capacitors, a second boost capacitor, a fourth resistor and a second diode, storage are introduced capacitors are connected between the base-boosting capacitor and the first transistors from the second to the fifth, the base is second-water of the fourth resistor, the cathode of the second transistor is connected to the first output diode, the second terminals of the second house of the first storage capacitor forcing the capacitor and the fourth second terminal of which connected to the anode resistor combined and connected to the second diode, the first output of the second busbar.