RU1588245C - Setting device - Google Patents

Description

(46) 02/30/93. Bull. /8 .

(21) 4361227/07

(22) 11.01. (72) V.I. Kotenev. L.Ya. Mzkarovsky. A.V. Zakutilin, A.A. Oskin and A.Z. Yatsenko

(56) Copyright certificate of the USSR 1221706, cl. H 02 P 5/00. 1986.

USSR copyright certificate No. 1503486. cl. H 02 P 5/00. 1987.

(54) DRIVER

(57) The invention relates to electrical engineering and may find application in devices for programmatically changing the generated parameters of electric drives, for example, speed. The aim of the invention is

increasing the accuracy of the program definition at significantly different rates of rise and decrease in the output signal. The device contains integrators 2. 15. 19. the initial voltage adjuster 1, the cycle time adjuster 16, the deceleration start adjuster 5, the maximum and minimum adjusters 9 and 10 of the output signal, the acceleration and deceleration adjusters 13 and 14, blocks 12 and 18 multiplications and keys 7. 8. 20. 21. 22, 23. The generation of programs for increasing and decreasing the output signal is carried out by integrators 15 and 19 with different and independent integration time constants, thereby achieving the goal. 2 ill.

The invention relates to electrical engineering and may find application in software cheating devices (and preset parameters of electric drives, e.g. speed).

The aim of the invention is to increase the accuracy of program definition at significantly different rates of rise and fall of the output signal.

In FIG. 1 shows a functional diagram of a device. figure 2 - temporary diagrams of the state change of the blocks and signals at their outputs, where

a - signal at the output of the first integratRZ & 4

b - signal at the output of the second comparison unit 17:.

to the state of parallel reset key 3 (1 - open. О - closed):

g - signal at the output of the first comparison unit 4:.

d is the signal at the output of the first adder 6;

e is the signal at the output of the comparator 11, - g is the signal at the output of the first multiplication block 12:

3 - signal at the output of the second block 18 multiplication:

and a signal at the output of the second integrator 15:

k is the signal at the output of the third integrator 19:

l - signal at the output of the device.

The master device (Fig. 1) contains in series a starting voltage regulator 1, a first integrator 2 with a parallel reset key 3, a first unit 4 for comparison with a setter 5 for starting the reduction of the output signal connected to its second input, an adder 6, the second and third inputs of which through the first 7 and second 8 keys are connected to the setters 9

Yu

and 10, respectively, the maximum and minimum levels of the output signal, the comparator 11, the second input of which is connected to the output of the device, the first block; 12 multiplication, the second input connected to the sensor 13 of the slew rate of the output signal, as well as the master 14 of the rate of decrease in the output signal, the second integrator 15, the master 16 of the cycle time and the second block

17, the control inputs of the first 7 and second 8 keys are connected to the output of the first comparison unit 4, and the outputs of the first integrator 2 and the cycle time setter 16 are connected to the inputs of the second comparison unit 17, the output of which is connected to the control input of the parallel reset key of the first integrator 2 ,

The device also contains a second unit

18, the third integrator 19 and the keys 20-23, the control inputs of which are connected to the output of the first comparison unit 4. The inputs of the second block 18 are multiplied by 1 and are connected to the master 14 of the rate of decrease in the output signal and the input of the first block 12 of multiplication. The outputs of the first 12 and second 18 multiplication blocks through the third 20 and fourth 21 keys are connected to the inputs of the second 15 and third 19 integrators, respectively, the outputs of which are connected respectively to the fixed closing and fixed disconnecting contacts of the sixth key 23, and the inputs of setting the initial conditions are to the fixed, respectively opening and closing contacts of the fifth key 22. whose movable contact is connected to the output of the adder 6. The movable contact of the sixth key 23 is the output of the device.

The device operates as follows.

The time of the full cycle of the change of the output signal of the device is set using the voltage of the setter 16. The rate of rise of voltage at the output of the first integrator 2 is set by the voltage of the setter 1. The voltage at the output of the first integrator 2 rises linearly (Fig. 2.a), moment time ti. at which the decrease in the output signal of the device starts, it is set by the dial 5. The maximum and minimum levels of the output signal of the device are controlled by the dials 9 and 10., respectively, and the rate of increase and decrease by the dials 13 and 14.

In order to generate the cycle time, the output voltage of the first integrator 2 is compared with the voltage of the master 16 in the second comparison unit 17. At the moment of equality of these voltages, a voltage pulse appears at the output of block 17 (Fig. 2, b). The key 3 closes (Fig. 2, c), which leads to an intensive decrease in the voltage at the output of the first integrator 2 (Fig. 2, a). When this voltage reaches zero, the second block 17 of comparison (fig. 2, b) is activated again, the key 3 is opened (fig. 2, c) and the cycle repeats.

If the voltages of the first integrator 2 and the setter 5 are equal (time ti in Fig. 2, a), the output of the first comparison unit 4 sets the signal value to zero (Fig. 2.d), and at the time 1c - the maximum value. In the time interval ti-O, when 5 the voltage at the output of the comparison unit 4 is maximum, the first switch 7 is activated and the signal of the setpoint generator 9 of the maximum level is set at the output of the adder 6 (Fig. 2, e). Accordingly, in the interval 1c - 0 ti, when the signal at the output of the comparison unit 4 is equal to zero, using the key 8 at the output of the adder b, the signal of the setter 10 of the minimum level is set.

With the appearance at the output of adder 6 5 of the maximum signal level in the interval ti-O at the output of the comparator 11, the maximum signal level is also established (Fig. 2, e). which, being multiplied by the signal of the setter 13 in the first 0 block 12 of the multiplication, enters through the third key 20 closed at that time to the input of the second integrator 15. The voltage at the output of the integrator 15 starts to increase according to a linear law (Fig. 2.i) and through the sixth 5 key 23 is supplied to the second input of the comparator 11, At the moment of equal voltage at the inputs of the comparator 11, its output signal (Fig.2.e). and also the signal at the input of the second integrator 15 becomes equal to zero, and 0 at the output of the integrator the achieved signal level is saved (Fig. 2, and).

At time ti, the voltage at the output of the first comparison unit 4 becomes zero, the keys 7, 8, 20, 21, 22, 5 23 switch and the program for decreasing the output signal of the device starts (Fig, 2, k), the voltage from the output of the switch (Fig. 2.e) is multiplied with the voltage of the master 14 by the second block 18 of the multiplication and 0 through the closed fourth key 21 is fed to the input of the third integrator 19. The voltage at the output of the integrator 19 begins to decrease linearly and through the key 12 is fed to the second input 55 comparator 11. When the voltage at the inputs omparatora 11 become equal, the signal at its inlet vyhode.i third integrator 19 will be zero, and the output of the integrator 19 will be maintained achieved level signal (2, k) to the end of the cycle. As a result, a program for changing the output signal, shown in Fig. 2, l, will be generated at the device output per cycle.

The task of the program with significantly lagging rates of rise and fall of the output signal is carried out by integrators 15 and 19 with different and independent values of the integration time constants, which ensures the achievement of the goal.

SUMMARY OF THE INVENTION A master device comprising in series an initial voltage switch, a first integrator with a parallel reset key, a first comparison unit with a switch for starting the reduction of the output signal connected to its second input, an adder whose second and third inputs are through the first and second the keys are connected to the adjusters of the maximum and minimum levels of the output signal, a comparator, the second input of which is connected to the output of the device. the first multiplication unit, the second input connected to the master of the rate of increase of the output signal, as well as the master of the rate of decrease of the output signal, the second integrator, the clock of the cycle time and the second comparison fleas, while the control inputs of the first and second keys are connected to the output of the first comparison unit, and the outputs of the first integrator and the cycle time setter are connected to the inputs of the second comparison unit, the output of which is connected to the control input of the parallel reset key of the first integrator, characterized in that, in order to increase the accuracy of the program definition at significantly different rates of increase and decrease in the output signal, a second multiplication unit, a third integrator and four keys are inserted into it, the control inputs of which are connected to the output of the first comparison unit, while the inputs of the second multiplication unit are connected to the output rate decrementer the signal and the input of the first block of multiplication, the outputs of the first and second blocks of multiplication through the third and fourth keys are connected to the inputs of the second and third integrators, respectively, the outputs of which connecting a normally open respectively to the fixed and stationary break contact of the sixth switch, and inputs of the initial conditions - fixed respectively to open and close the contacts of the fifth key podvizhmy contact coupled to an output of the adder, and the movable contact of the sixth key is the output device.