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PL270035A1 - Circuit arrangement of tape memory controller - Google Patents

Circuit arrangement of tape memory controller

Info

Publication number
PL270035A1
PL270035A1 PL27003588A PL27003588A PL270035A1 PL 270035 A1 PL270035 A1 PL 270035A1 PL 27003588 A PL27003588 A PL 27003588A PL 27003588 A PL27003588 A PL 27003588A PL 270035 A1 PL270035 A1 PL 270035A1
Authority
PL
Poland
Prior art keywords
memory controller
circuit arrangement
tape memory
tape
arrangement
Prior art date
Application number
PL27003588A
Inventor
Kazimierz Bujnowski
Marek Kazon
Original Assignee
Warszawskie Zaklady Urzadzen I
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Warszawskie Zaklady Urzadzen I filed Critical Warszawskie Zaklady Urzadzen I
Priority to PL27003588A priority Critical patent/PL270035A1/en
Publication of PL270035A1 publication Critical patent/PL270035A1/en

Links

PL27003588A 1988-01-07 1988-01-07 Circuit arrangement of tape memory controller PL270035A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PL27003588A PL270035A1 (en) 1988-01-07 1988-01-07 Circuit arrangement of tape memory controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PL27003588A PL270035A1 (en) 1988-01-07 1988-01-07 Circuit arrangement of tape memory controller

Publications (1)

Publication Number Publication Date
PL270035A1 true PL270035A1 (en) 1989-07-10

Family

ID=20040069

Family Applications (1)

Application Number Title Priority Date Filing Date
PL27003588A PL270035A1 (en) 1988-01-07 1988-01-07 Circuit arrangement of tape memory controller

Country Status (1)

Country Link
PL (1) PL270035A1 (en)

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