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NO873025D0 - Hurtigarbeidende hoeytetthets dynamisk adressetranslatoer. - Google Patents

Hurtigarbeidende hoeytetthets dynamisk adressetranslatoer.

Info

Publication number
NO873025D0
NO873025D0 NO873025A NO873025A NO873025D0 NO 873025 D0 NO873025 D0 NO 873025D0 NO 873025 A NO873025 A NO 873025A NO 873025 A NO873025 A NO 873025A NO 873025 D0 NO873025 D0 NO 873025D0
Authority
NO
Norway
Prior art keywords
dynamic address
address translators
working dynamic
quick working
quick
Prior art date
Application number
NO873025A
Other languages
English (en)
Other versions
NO873025L (no
NO174907C (no
NO174907B (no
Inventor
Thomas F Joyce
Eugene Nusinov
Richard P Brown
Original Assignee
Honeywell Bull
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Bull filed Critical Honeywell Bull
Publication of NO873025D0 publication Critical patent/NO873025D0/no
Publication of NO873025L publication Critical patent/NO873025L/no
Publication of NO174907B publication Critical patent/NO174907B/no
Publication of NO174907C publication Critical patent/NO174907C/no

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G11C15/04—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Static Random-Access Memory (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
NO873025A 1986-07-21 1987-07-20 Oversetter for oversettelse av et inngangsord bestående av N biter til et utgangsord NO174907C (no)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/887,768 US4813002A (en) 1986-07-21 1986-07-21 High speed high density dynamic address translator

Publications (4)

Publication Number Publication Date
NO873025D0 true NO873025D0 (no) 1987-07-20
NO873025L NO873025L (no) 1988-01-22
NO174907B NO174907B (no) 1994-04-18
NO174907C NO174907C (no) 1994-07-27

Family

ID=25391820

Family Applications (1)

Application Number Title Priority Date Filing Date
NO873025A NO174907C (no) 1986-07-21 1987-07-20 Oversetter for oversettelse av et inngangsord bestående av N biter til et utgangsord

Country Status (11)

Country Link
US (1) US4813002A (no)
EP (1) EP0254270B1 (no)
JP (1) JPS6344257A (no)
KR (1) KR910007744B1 (no)
AU (1) AU597697B2 (no)
CA (1) CA1293332C (no)
DE (1) DE3750795T2 (no)
DK (1) DK381687A (no)
FI (1) FI873178A (no)
NO (1) NO174907C (no)
YU (1) YU137487A (no)

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US5301263A (en) * 1990-09-18 1994-04-05 Hewlett-Packard Company High memory bandwidth system for updating z-buffer values
GB2253118B (en) * 1991-02-20 1995-04-12 Roke Manor Research Improvements in or relating to asynchronous transfer mode switching system
GB9205551D0 (en) * 1992-03-13 1992-04-29 Inmos Ltd Cache memory
US5568415A (en) * 1993-02-19 1996-10-22 Digital Equipment Corporation Content addressable memory having a pair of memory cells storing don't care states for address translation
US5426602A (en) * 1993-03-31 1995-06-20 Mentor Graphics Corporation Detection of multiple hits within a device having multiple sense outputs
US5438535A (en) * 1994-03-29 1995-08-01 Panasonic Technologies, Inc. Content addressable memory system
US5530824A (en) * 1994-04-04 1996-06-25 Motorola, Inc. Address translation circuit
US5659697A (en) * 1994-12-14 1997-08-19 International Business Machines Corporation Translation lookaside buffer for faster processing in response to availability of a first virtual address portion before a second virtual address portion
KR100257059B1 (ko) * 1995-03-17 2000-05-15 가나이 쓰도무 반도체 집적회로
US6111584A (en) * 1995-12-18 2000-08-29 3Dlabs Inc. Ltd. Rendering system with mini-patch retrieval from local texture storage
CA2227500C (en) * 1997-02-06 2001-08-14 Northern Telecom Limited Content addressable memory
GB2325321B (en) * 1997-05-12 2001-06-06 Applied Marketing & Technology Associative memories
US6148364A (en) * 1997-12-30 2000-11-14 Netlogic Microsystems, Inc. Method and apparatus for cascading content addressable memory devices
US6199140B1 (en) 1997-10-30 2001-03-06 Netlogic Microsystems, Inc. Multiport content addressable memory device and timing signals
JP3732637B2 (ja) * 1997-12-26 2006-01-05 株式会社ルネサステクノロジ 記憶装置、記憶装置のアクセス方法及び半導体装置
US6240485B1 (en) 1998-05-11 2001-05-29 Netlogic Microsystems, Inc. Method and apparatus for implementing a learn instruction in a depth cascaded content addressable memory system
US6219748B1 (en) 1998-05-11 2001-04-17 Netlogic Microsystems, Inc. Method and apparatus for implementing a learn instruction in a content addressable memory device
US6381673B1 (en) 1998-07-06 2002-04-30 Netlogic Microsystems, Inc. Method and apparatus for performing a read next highest priority match instruction in a content addressable memory device
US6046923A (en) * 1999-01-13 2000-04-04 Lucent Technologies Inc. Content-addressable memory architecture with column muxing
US6539455B1 (en) 1999-02-23 2003-03-25 Netlogic Microsystems, Inc. Method and apparatus for determining an exact match in a ternary content addressable memory device
US6892272B1 (en) 1999-02-23 2005-05-10 Netlogic Microsystems, Inc. Method and apparatus for determining a longest prefix match in a content addressable memory device
US6499081B1 (en) 1999-02-23 2002-12-24 Netlogic Microsystems, Inc. Method and apparatus for determining a longest prefix match in a segmented content addressable memory device
US6574702B2 (en) 1999-02-23 2003-06-03 Netlogic Microsystems, Inc. Method and apparatus for determining an exact match in a content addressable memory device
US6460112B1 (en) 1999-02-23 2002-10-01 Netlogic Microsystems, Llc Method and apparatus for determining a longest prefix match in a content addressable memory device
US6137707A (en) * 1999-03-26 2000-10-24 Netlogic Microsystems Method and apparatus for simultaneously performing a plurality of compare operations in content addressable memory device
US7143231B1 (en) 1999-09-23 2006-11-28 Netlogic Microsystems, Inc. Method and apparatus for performing packet classification for policy-based packet routing
US7110407B1 (en) 1999-09-23 2006-09-19 Netlogic Microsystems, Inc. Method and apparatus for performing priority encoding in a segmented classification system using enable signals
US6757779B1 (en) 1999-09-23 2004-06-29 Netlogic Microsystems, Inc. Content addressable memory with selectable mask write mode
US7272027B2 (en) * 1999-09-23 2007-09-18 Netlogic Microsystems, Inc. Priority circuit for content addressable memory
US6795892B1 (en) 2000-06-14 2004-09-21 Netlogic Microsystems, Inc. Method and apparatus for determining a match address in an intra-row configurable cam device
US6799243B1 (en) 2000-06-14 2004-09-28 Netlogic Microsystems, Inc. Method and apparatus for detecting a match in an intra-row configurable cam system
US7487200B1 (en) 1999-09-23 2009-02-03 Netlogic Microsystems, Inc. Method and apparatus for performing priority encoding in a segmented classification system
US6944709B2 (en) * 1999-09-23 2005-09-13 Netlogic Microsystems, Inc. Content addressable memory with block-programmable mask write mode, word width and priority
US6751701B1 (en) 2000-06-14 2004-06-15 Netlogic Microsystems, Inc. Method and apparatus for detecting a multiple match in an intra-row configurable CAM system
US6567340B1 (en) 1999-09-23 2003-05-20 Netlogic Microsystems, Inc. Memory storage cell based array of counters
US6763425B1 (en) * 2000-06-08 2004-07-13 Netlogic Microsystems, Inc. Method and apparatus for address translation in a partitioned content addressable memory device
US6934795B2 (en) * 1999-09-23 2005-08-23 Netlogic Microsystems, Inc. Content addressable memory with programmable word width and programmable priority
CA2342575A1 (en) * 2001-04-03 2002-10-03 Mosaid Technologies Incorporated Content addressable memory cell
US6910097B1 (en) 2001-04-09 2005-06-21 Netlogic Microsystems, Inc. Classless interdomain routing using binary content addressable memory
US6934796B1 (en) 2002-02-01 2005-08-23 Netlogic Microsystems, Inc. Content addressable memory with hashing function
US6697276B1 (en) 2002-02-01 2004-02-24 Netlogic Microsystems, Inc. Content addressable memory device
US6700809B1 (en) 2002-02-01 2004-03-02 Netlogic Microsystems, Inc. Entry relocation in a content addressable memory device
US7382637B1 (en) 2002-02-01 2008-06-03 Netlogic Microsystems, Inc. Block-writable content addressable memory device
US7486530B2 (en) * 2005-04-28 2009-02-03 Micron Technology, Inc. Method of comparison between cache and data register for non-volatile memory
US7920399B1 (en) 2010-10-21 2011-04-05 Netlogic Microsystems, Inc. Low power content addressable memory device having selectable cascaded array segments
US8467213B1 (en) 2011-03-22 2013-06-18 Netlogic Microsystems, Inc. Power limiting in a content search system
US9652376B2 (en) 2013-01-28 2017-05-16 Radian Memory Systems, Inc. Cooperative flash memory control
US10445229B1 (en) 2013-01-28 2019-10-15 Radian Memory Systems, Inc. Memory controller with at least one address segment defined for which data is striped across flash memory dies, with a common address offset being used to obtain physical addresses for the data in each of the dies
US11249652B1 (en) 2013-01-28 2022-02-15 Radian Memory Systems, Inc. Maintenance of nonvolatile memory on host selected namespaces by a common memory controller
US9542118B1 (en) 2014-09-09 2017-01-10 Radian Memory Systems, Inc. Expositive flash memory control
US10552085B1 (en) 2014-09-09 2020-02-04 Radian Memory Systems, Inc. Techniques for directed data migration
US10552058B1 (en) 2015-07-17 2020-02-04 Radian Memory Systems, Inc. Techniques for delegating data processing to a cooperative memory controller
US11586385B1 (en) 2020-05-06 2023-02-21 Radian Memory Systems, Inc. Techniques for managing writes in nonvolatile memory

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US3261000A (en) * 1961-12-22 1966-07-12 Ibm Associative memory logical connectives
US3195109A (en) * 1962-04-02 1965-07-13 Ibm Associative memory match indicator control
US3184717A (en) * 1962-04-17 1965-05-18 Ibm Associative memory low temperature fast read circuit
US3609702A (en) * 1967-10-05 1971-09-28 Ibm Associative memory
GB1260426A (en) * 1969-08-18 1972-01-19 Marconi Co Ltd Improvements in or relating to memory cells
US3633182A (en) * 1969-08-26 1972-01-04 Bell Telephone Labor Inc Content addressable memory cell
US3693170A (en) * 1970-08-05 1972-09-19 Marconi Co Ltd Memory cells
US3800286A (en) * 1972-08-24 1974-03-26 Honeywell Inf Systems Address development technique utilizing a content addressable memory
DE3138993A1 (de) * 1981-09-30 1983-04-14 Siemens AG, 1000 Berlin und 8000 München Speicherzelle, assoziativspeicher und verfahren zu deren betrieb
US4580217A (en) * 1983-06-22 1986-04-01 Ncr Corporation High speed memory management system and method
US4538241A (en) * 1983-07-14 1985-08-27 Burroughs Corporation Address translation buffer
JPS60150148A (ja) * 1983-09-22 1985-08-07 デイジタル　イクイプメント　コ−ポレ−シヨン ２レベル変換バツフアを用いた仮想アドレスマツピング

Also Published As

Publication number Publication date
DE3750795T2 (de) 1995-07-27
EP0254270B1 (en) 1994-11-30
CA1293332C (en) 1991-12-17
NO873025L (no) 1988-01-22
JPH0520778B2 (no) 1993-03-22
EP0254270A3 (en) 1990-04-04
US4813002A (en) 1989-03-14
DK381687D0 (da) 1987-07-21
YU137487A (en) 1990-02-28
KR910007744B1 (ko) 1991-09-30
EP0254270A2 (en) 1988-01-27
KR880002077A (ko) 1988-04-29
FI873178A (fi) 1988-01-22
DE3750795D1 (de) 1995-01-12
AU597697B2 (en) 1990-06-07
DK381687A (da) 1988-01-22
NO174907C (no) 1994-07-27
AU7598087A (en) 1988-01-28
JPS6344257A (ja) 1988-02-25
NO174907B (no) 1994-04-18
FI873178A0 (fi) 1987-07-20

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