NO123438B - - Google Patents
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- Publication number
- NO123438B NO123438B NO4811/68A NO481168A NO123438B NO 123438 B NO123438 B NO 123438B NO 4811/68 A NO4811/68 A NO 4811/68A NO 481168 A NO481168 A NO 481168A NO 123438 B NO123438 B NO 123438B
- Authority
- NO
- Norway
- Prior art keywords
- plate
- attached
- cardboard
- grooves
- filler
- Prior art date
Links
- 239000000945 filler Substances 0.000 claims description 9
- 239000011230 binding agent Substances 0.000 claims description 2
- 239000011449 brick Substances 0.000 claims description 2
- 239000002131 composite material Substances 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 210000003746 feather Anatomy 0.000 description 1
- 239000000123 paper Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/67—Complementary BJTs
- H10D84/673—Vertical complementary BJTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/2205—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities from the substrate during epitaxy, e.g. autodoping; Preventing or using autodoping
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/761—PN junctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/763—Polycrystalline semiconductor regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
- H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
- H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
- H10D84/615—Combinations of vertical BJTs and one or more of resistors or capacitors
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Semiconductor Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
- Finishing Walls (AREA)
Description
Isolerende bygningsplate og framgangsmåte til dens framstilling.
Foreliggende oppfinnelse omfatter en
godt isolerende bygningsplate som skal anvendes som innvendige vegg- og takenheter
på mur- og betongvegger og liknende, og
framgangsmåte til platens framstilling.
Oppfinnelsen består i at bygningspla-ten framstilles av to deler, den ene del er
en papp-plate hvor der i lengderetningen er
festet noen parallelle trelekter i passe inn-byrdes avstand, og den annen del framstilles av et lett fyllstoff som pappmasje
eller liknende, som blir pressformet slik at
der dannes kanaler eller rom i fyllstoffplatens lengderetning, for lektene på den annen platedel. Fyllstoffplaten har også noen
ribbeliknende parallelle forhøyninger i
tverretningen. Disse to platedelene blir så
presset sammen ved hjelp av herdbart
bindemiddel. På fyllstoffplatens overflate
limes så kartong eller treplate. På den fer-dige bygningsplates overflate er nedfreset
parallelle spor eller riller i passe dybde og
avstand, slik at det papir eller tapet som
skal klistres på denne side får et elastisk
underlag når det tørker og strammes.
Oppfinnelsen er i det etterfølgende nær-mere beskrevet og framstilt på vedheftede
tegning, hvor fig. 1 viser en del av den
pressformete fyllstoffplaten, sett fra den
ene sidekant. Fig. 2 viser samme, sett fra
endekanten. Fig. 3 viser en del av bygnings-platen sammensatt av de to delene, den
pressformete fyllstoffplaten (fig. 1 og 2),
og platen med lektene. Fig. 4 viser byg-ningsplaten i mindre målestokk, med pålimt
kartong eller treplate, og med noen få ned-fresete spor eller riller i lengderetningen.
Endelektene er forsynt med henholdsvis not
og fjær for sammenføyning med andre
plater.
Under henvisning til tegningen betegner A den ene platedel med de langsgående
parallelle trelektene B. C betegner den annen platedel, bestående av pressformet
pappmasje eller liknende fyllstoff, med ka-nalene D for lektene (B) og med de ribbeliknende parallelle forhøyninger E i platens
tverretning. F betegner de utskårne spor
eller riller i byggeplatens overflate G.
Claims (1)
- Sammensatt isolerende bygningsplate,som skal anvendes som innvendige vegg- og takenheter på mur- og betongvegger og liknende, karakterisert ved at den består av en bunnplate (A) som basis, og med av-stivende trelekter (B) festet til denne, samt et annet plateorgan (C), som er festet til platen (A) ved hjelp av et herdbart bindemiddel, hvilket plateorgan (C) er framstilt av et lett fyllstoff som pappmasje eller liknende, som er pressformet slik at der dannes kanaler eller rom (D) for lektene (B) i fyllstoffplatens lengderetning, samt ribbeliknende parallelle forhøyninger (E) i tverretningen, slik at disses topper rager over bunnplatens lekter og danner et fjæ-rende leie for en kartongplate (G) eller liknende, som skal festes på toppene, og at det på denne plates ytre side er nedfreset i passe dybde og avstand noen parallelle spor eller riller (F).
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7803267 | 1967-12-05 |
Publications (1)
Publication Number | Publication Date |
---|---|
NO123438B true NO123438B (no) | 1971-11-15 |
Family
ID=13650454
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NO4811/68A NO123438B (no) | 1967-12-05 | 1968-12-02 |
Country Status (10)
Country | Link |
---|---|
AT (1) | AT309533B (no) |
BE (1) | BE724868A (no) |
CA (1) | CA930478A (no) |
CH (1) | CH481490A (no) |
DE (1) | DE1812178B2 (no) |
FR (1) | FR1601776A (no) |
GB (1) | GB1251348A (no) |
NL (1) | NL143735B (no) |
NO (1) | NO123438B (no) |
SE (1) | SE354546B (no) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL166156C (nl) * | 1971-05-22 | 1981-06-15 | Philips Nv | Halfgeleiderinrichting bevattende ten minste een op een halfgeleidersubstraatlichaam aangebrachte halfge- leiderlaag met ten minste een isolatiezone, welke een in de halfgeleiderlaag verzonken isolatielaag uit door plaatselijke thermische oxydatie van het half- geleidermateriaal van de halfgeleiderlaag gevormd isolerend materiaal bevat en een werkwijze voor het vervaardigen daarvan. |
US3861968A (en) * | 1972-06-19 | 1975-01-21 | Ibm | Method of fabricating integrated circuit device structure with complementary elements utilizing selective thermal oxidation and selective epitaxial deposition |
-
1968
- 1968-11-29 FR FR176116A patent/FR1601776A/fr not_active Expired
- 1968-12-02 AT AT1170268A patent/AT309533B/de not_active IP Right Cessation
- 1968-12-02 NO NO4811/68A patent/NO123438B/no unknown
- 1968-12-02 DE DE1812178A patent/DE1812178B2/de not_active Ceased
- 1968-12-03 GB GB1251348D patent/GB1251348A/en not_active Expired
- 1968-12-03 NL NL686817313A patent/NL143735B/xx not_active IP Right Cessation
- 1968-12-04 BE BE724868A patent/BE724868A/xx not_active IP Right Cessation
- 1968-12-04 CA CA036833A patent/CA930478A/en not_active Expired
- 1968-12-04 CH CH1808168A patent/CH481490A/de not_active IP Right Cessation
- 1968-12-05 SE SE16629/68A patent/SE354546B/xx unknown
Also Published As
Publication number | Publication date |
---|---|
DE1812178B2 (de) | 1978-11-09 |
NL6817313A (no) | 1969-06-09 |
FR1601776A (fr) | 1970-09-14 |
AT309533B (de) | 1973-08-27 |
DE1812178A1 (de) | 1969-07-10 |
GB1251348A (no) | 1971-10-27 |
SE354546B (no) | 1973-03-12 |
NL143735B (nl) | 1974-10-15 |
BE724868A (no) | 1969-05-16 |
CH481490A (de) | 1969-11-15 |
CA930478A (en) | 1973-07-17 |
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