NL7610947A - Werkwijze ter vervaardiging van een halfge- leiderinrichting. - Google Patents
Werkwijze ter vervaardiging van een halfge- leiderinrichting.Info
- Publication number
- NL7610947A NL7610947A NL7610947A NL7610947A NL7610947A NL 7610947 A NL7610947 A NL 7610947A NL 7610947 A NL7610947 A NL 7610947A NL 7610947 A NL7610947 A NL 7610947A NL 7610947 A NL7610947 A NL 7610947A
- Authority
- NL
- Netherlands
- Prior art keywords
- semi
- manufacture
- conductor device
- conductor
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/30—Electron-beam or ion-beam tubes for localised treatment of objects
- H01J37/304—Controlling tubes by information coming from the objects or from the beam, e.g. correction signals
- H01J37/3045—Object or beam position registration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02639—Preparation of substrate for selective deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0277—Electrolithographic processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/5442—Marks applied to semiconductor devices or parts comprising non digital, non alphanumeric information, e.g. symbols
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
- H01L2223/54466—Located in a dummy or reference die
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/102—Mask alignment
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/975—Substrate or mask aligning feature
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- High Energy & Nuclear Physics (AREA)
- Analytical Chemistry (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Bipolar Transistors (AREA)
- Electron Beam Exposure (AREA)
- Recrystallisation Techniques (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB40776/75A GB1520925A (en) | 1975-10-06 | 1975-10-06 | Semiconductor device manufacture |
Publications (1)
Publication Number | Publication Date |
---|---|
NL7610947A true NL7610947A (nl) | 1977-04-12 |
Family
ID=10416557
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NL7610947A NL7610947A (nl) | 1975-10-06 | 1976-10-04 | Werkwijze ter vervaardiging van een halfge- leiderinrichting. |
Country Status (7)
Country | Link |
---|---|
US (1) | US4125418A (nl) |
JP (1) | JPS5259583A (nl) |
CA (1) | CA1066431A (nl) |
DE (1) | DE2642770A1 (nl) |
FR (1) | FR2327641A1 (nl) |
GB (1) | GB1520925A (nl) |
NL (1) | NL7610947A (nl) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1578259A (en) * | 1977-05-11 | 1980-11-05 | Philips Electronic Associated | Methods of manufacturing solid-state devices apparatus for use therein and devices manufactured thereby |
JPS5534442A (en) * | 1978-08-31 | 1980-03-11 | Fujitsu Ltd | Preparation of semiconductor device |
JPS5827663B2 (ja) * | 1979-06-04 | 1983-06-10 | 富士通株式会社 | 半導体装置の製造方法 |
GB2066487B (en) * | 1979-12-18 | 1983-11-23 | Philips Electronic Associated | Alignment of exposure masks |
US4431923A (en) * | 1980-05-13 | 1984-02-14 | Hughes Aircraft Company | Alignment process using serial detection of repetitively patterned alignment marks |
US4327292A (en) * | 1980-05-13 | 1982-04-27 | Hughes Aircraft Company | Alignment process using serial detection of repetitively patterned alignment marks |
DE3123031A1 (de) * | 1981-06-10 | 1983-01-05 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zur kennzeichnung von halbleiterchips und kennzeichenbarer halbleiterchip |
JPS5960306A (ja) * | 1982-09-30 | 1984-04-06 | Fujitsu Ltd | 位置決定用チップを備えた試料 |
JPS59107511A (ja) * | 1982-12-13 | 1984-06-21 | Hitachi Ltd | パタ−ン形成方法 |
DE3336901A1 (de) * | 1983-10-11 | 1985-04-18 | Deutsche Itt Industries Gmbh, 7800 Freiburg | Maskenmarkierung und substratmarkierung fuer ein verfahren zum justieren einer eine maskenmarkierung enthaltenden photomaske auf einer substratmarkierung |
US4487653A (en) * | 1984-03-19 | 1984-12-11 | Advanced Micro Devices, Inc. | Process for forming and locating buried layers |
US4702995A (en) * | 1984-08-24 | 1987-10-27 | Nec Corporation | Method of X-ray lithography |
JPS61222137A (ja) * | 1985-03-06 | 1986-10-02 | Sharp Corp | チップ識別用凹凸パターン形成方法 |
US4632724A (en) * | 1985-08-19 | 1986-12-30 | International Business Machines Corporation | Visibility enhancement of first order alignment marks |
US4936930A (en) * | 1988-01-06 | 1990-06-26 | Siliconix Incorporated | Method for improved alignment for semiconductor devices with buried layers |
US5385850A (en) * | 1991-02-07 | 1995-01-31 | International Business Machines Corporation | Method of forming a doped region in a semiconductor substrate utilizing a sacrificial epitaxial silicon layer |
US5451261A (en) * | 1992-09-11 | 1995-09-19 | Matsushita Electric Industrial Co., Ltd. | Metal film deposition apparatus and metal film deposition method |
US5401691A (en) * | 1994-07-01 | 1995-03-28 | Cypress Semiconductor Corporation | Method of fabrication an inverse open frame alignment mark |
JPH0927529A (ja) * | 1995-07-12 | 1997-01-28 | Sony Corp | 位置合わせ検出用半導体装置 |
JP3528350B2 (ja) * | 1995-08-25 | 2004-05-17 | ソニー株式会社 | 半導体装置の製造方法 |
US5738961A (en) * | 1997-03-03 | 1998-04-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Two-step photolithography method for aligning and patterning non-transparent layers |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1066911A (en) * | 1965-01-01 | 1967-04-26 | Standard Telephones Cables Ltd | Semiconductor devices |
FR1064185A (fr) * | 1967-05-23 | 1954-05-11 | Philips Nv | Procédé de fabrication d'un système d'électrodes |
FR1593881A (nl) * | 1967-12-12 | 1970-06-01 | ||
JPS4924553B1 (nl) * | 1968-12-09 | 1974-06-24 | ||
US3679497A (en) * | 1969-10-24 | 1972-07-25 | Westinghouse Electric Corp | Electron beam fabrication system and process for use thereof |
GB1328803A (en) * | 1969-12-17 | 1973-09-05 | Mullard Ltd | Methods of manufacturing semiconductor devices |
US3710101A (en) * | 1970-10-06 | 1973-01-09 | Westinghouse Electric Corp | Apparatus and method for alignment of members to electron beams |
US3879613A (en) * | 1971-12-13 | 1975-04-22 | Philips Corp | Methods of manufacturing semiconductor devices |
US3895234A (en) * | 1973-06-15 | 1975-07-15 | Westinghouse Electric Corp | Method and apparatus for electron beam alignment with a member |
US3832561A (en) * | 1973-10-01 | 1974-08-27 | Westinghouse Electric Corp | Method and apparatus for electron beam alignment with a substrate by schottky barrier contacts |
-
1975
- 1975-10-06 GB GB40776/75A patent/GB1520925A/en not_active Expired
-
1976
- 1976-09-23 CA CA261,849A patent/CA1066431A/en not_active Expired
- 1976-09-23 DE DE19762642770 patent/DE2642770A1/de not_active Withdrawn
- 1976-09-23 US US05/725,775 patent/US4125418A/en not_active Expired - Lifetime
- 1976-10-04 NL NL7610947A patent/NL7610947A/nl not_active Application Discontinuation
- 1976-10-05 JP JP51119051A patent/JPS5259583A/ja active Pending
- 1976-10-06 FR FR7630037A patent/FR2327641A1/fr active Granted
Also Published As
Publication number | Publication date |
---|---|
FR2327641A1 (fr) | 1977-05-06 |
JPS5259583A (en) | 1977-05-17 |
FR2327641B1 (nl) | 1982-10-15 |
US4125418A (en) | 1978-11-14 |
GB1520925A (en) | 1978-08-09 |
CA1066431A (en) | 1979-11-13 |
DE2642770A1 (de) | 1977-04-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
BV | The patent application has lapsed |