NL246832A - - Google Patents
Info
- Publication number
- NL246832A NL246832A NL246832DA NL246832A NL 246832 A NL246832 A NL 246832A NL 246832D A NL246832D A NL 246832DA NL 246832 A NL246832 A NL 246832A
- Authority
- NL
- Netherlands
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09C—CIPHERING OR DECIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
- G09C1/00—Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system
- G09C1/06—Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system wherein elements corresponding to the signs making up the clear text are operatively connected with elements corresponding to the signs making up the ciphered text, the connections, during operation of the apparatus, being automatically and continuously permuted by a coding or key member
- G09C1/10—Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system wherein elements corresponding to the signs making up the clear text are operatively connected with elements corresponding to the signs making up the ciphered text, the connections, during operation of the apparatus, being automatically and continuously permuted by a coding or key member the connections being electrical
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/58—Random or pseudo-random number generators
- G06F7/582—Pseudo-random number generators
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/58—Random or pseudo-random number generators
- G06F7/582—Pseudo-random number generators
- G06F7/584—Pseudo-random number generators using finite field arithmetic, e.g. using a linear feedback shift register
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B14/00—Transmission systems not characterised by the medium used for transmission
- H04B14/02—Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation
- H04B14/04—Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation using pulse code modulation
- H04B14/042—Special circuits, e.g. comparators
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/58—Indexing scheme relating to groups G06F7/58 - G06F7/588
- G06F2207/581—Generating an LFSR sequence, e.g. an m-sequence; sequence may be generated without LFSR, e.g. using Galois Field arithmetic
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/58—Indexing scheme relating to groups G06F7/58 - G06F7/588
- G06F2207/583—Serial finite field implementation, i.e. serial implementation of finite field arithmetic, generating one new bit or trit per step, e.g. using an LFSR or several independent LFSRs; also includes PRNGs with parallel operation between LFSR and outputs
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL246832T |
Publications (1)
Publication Number | Publication Date |
---|---|
NL246832A true NL246832A (en) |
Family
ID=19780879
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NL246832D NL246832A (en) | |||
NL105457D NL105457C (en) |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NL105457D NL105457C (en) |
Country Status (1)
Country | Link |
---|---|
NL (2) | NL105457C (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3657699A (en) * | 1970-06-30 | 1972-04-18 | Ibm | Multipath encoder-decoder arrangement |
-
0
- NL NL246832D patent/NL246832A/xx unknown
- NL NL105457D patent/NL105457C/xx active
Also Published As
Publication number | Publication date |
---|---|
NL105457C (en) |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US3657699A (en) | Multipath encoder-decoder arrangement | |
US10396816B2 (en) | Pad encoding and decoding | |
US10166476B2 (en) | Secure data encoding for low-resource remote systems | |
US5016263A (en) | Sample-hold circuit with outputs taken between gates of dynamic shift register to avoid skew from unequal interstage connection lengths | |
WO1982003717A1 (en) | Ciphering electronic circuit/mechanical-spatial combinative toy | |
NL105457C (en) |