NL2020289B1

NL2020289B1 - Smart Cell-level Power Managed PV Module

Info

Publication number: NL2020289B1
Application number: NL2020289A
Authority: NL
Inventors: Isabella Olindo; Ziar Hesan; Zeman Miroslav
Original assignee: Univ Delft Tech
Priority date: 2018-01-18
Filing date: 2018-01-18
Publication date: 2019-07-29
Also published as: TW201937746A; EP3741040A1; WO2019143242A1; WO2019143242A4

Abstract

The present invention is in the field of a cell—level power managed PV—module, and a method of operating said module, such as operating a large number of PV—modules, such as in a solar farm. Typically a multitude of individual PV—cells is present at a frOnt side of the module that need to be operated and controlled.

Description

FIELD OF THE INVENTION

The present invention is in the field of a cell-level power managed PV-module, and a method of operating said module, such as operating a large number of PV-modules, such as in a solar farm. Typically a multitude of individual PV-cells is present at a front side of the module that need to be operated and controlled.

BACKGROUND OF THE INVENTION

In the field of energy conversion PV-systems are known. These systems generally use at least one PN-junction to convert solar energy to electricity.

A disadvantage of such a system is that the conversion per se is not very efficient, typically, for Si-solar cells, limited to some 23%. Even using very advanced PV-cells, such as GaAs cells, the conversion is only about 30%. Inherently these systems are limited in their conversion.

Further these systems are still relative expensive to manufacture .

Systems are typically not optimized in terms of energy production, use of energy, availability of energy, etc., especially in view of consumption patterns of a building. Integration with for instance other household applications is otherwise typically not provided.

Integration of systems is typically also in its initial stage. Not many applications are available yet.

So existing PV systems show huge power output losses, and significant quantities of generated power are not usable because of e.g. too low power at low light conditions, due to dirty cells, sub-optimal performance of certain cells, and shading, effecting the total output of a PV-module. Using a micro inverter or the like does not solve this problem.

Especially shading causes a huge power loss in a PV system and it is typically not proportional to the shaded area. Besides, it also causes hot-spots on PV cells and ages the PV module faster.

Bypass diodes may be used in commercial PV modules to reduce effects of hot spots or shading on a PV module. Recently, the active bypass technology has been developed to reduce hot spot even more and provide higher efficiency. However, for these techniques still a considerable amount of PV module power is lost when a small area of shade is present (1/3 of the PV module power or even more).

The present invention therefore relates to an improved cell-level power managed PV-module, and a method of operating such a module, which solve one or more of the above problems and drawbacks of the prior art, providing reliable results, without jeopardizing functionality and advantages.

SUMMARY OF THE INVENTION

The present invention relates to a cell-level power managed PV-module according to claim 1. In a generic perspective the power (circuit) part of the module comprises PV-cells, intelligent bypasses and drivers, and a supply voltage unit for addressing drivers. The control part comprises at least one (micro-) processor and an interface circuit and optionally a communication circuit. The module comprises a multitude of PVcells (i,j), typically a physical array of n*m cells, ie[l;n], and je[l;m], wherein n may be from 2-2¹⁰, preferably 3-2⁸, more preferably 4-2⁶, even more preferably 5-2⁵, such as 6-2⁴, and wherein m may be from 2-2¹⁰, preferably 3-2⁸, more preferably 4-2^e, even more preferably 5-2⁵, such as 6-2⁴. The PV-cells are located at a front side of the module, typically facing the sun. Contrary to prior art PV-modules the present cells may be operated individually, and combinations of electrically connected cells, in parallel, in series, or a combination thereof, are established based on operational characteristics of individual cells. The electrical operation topology is most likely very different from a physical topology with the array of n*m cells. For instance an arbitrary example cell n=l m=l may be connected to a further arbitrary cell n=21 m=8; such a connection is without the present invention at least physically complex or impossible. Thereto, in the present module each individual cell is individually connected by electrical connections to a junction box and controlled by a switching network. The switching network is aimed at providing an electrically based order. The junction box comprises the switching network, the switching network comprises a plurality of switchable bypass elements, a processor for actively controlling the bypass elements, a current or voltage sensor per cell, the switching network forming at least one string of PVcells by electrically connecting k PV-cells, a current and. voltage sensor per string of k cells, a memory, and a plurality of switches and may comprise a wireless transceiver. Therein each bypass element comprises a NPN or PNP bipolar junction transistor. Based on operational characteristics of individual cells these cells are mutually connected in parallel, in series, or a combination thereof, or are left out, such that an optimal power output is achieved. Typically the connections are continuously re-evaluated in terms of power output, and an electrical configuration of PV-cells and the junction box is provided when in operation; this configuration therefore comprises active and contributing PV-cells, electrical connections from the cells to the junction box, the switched network in the junction box, and leaves out underperforming or inactive PV-cells. Connection may be established or switched off at a frequency of 0.1Hz-l MHz, and typically at a rate above 40 kHz.

The present switch is controlled by a bipolar transistor, which may be of NPN or PNP type. The switching network provides a response based on input provided by the current sensors, the voltage sensors, and optionally by temperature sensors. At a sensing step recorded data from the memory may be compared with a previous set of data, such as for establishing a working conditions (e.g. in terms of voltage and current) of all individual cells. The (micro-)processor can than switch the network such that a maximum output is obtained. In addition the processor can evaluate safety issues, such as by identifying to hot cells, and shorts.

Various possible scenarios of operation may occur. In a first scenario no or virtually no current passes through a current sensor. In such as case all cells are in operation under uniform irradiation and the cells have compared to an average c.q. to one and another a minor mismatch. Any electrical configuration is now possible and typically strings of cells are formed such that a maximum voltage and/or power is obtained. In a second scenario a small amount of leakage current passes through at least one current sensor. There seems to be no need for immediate action and therefore no bypass is activated yet. It may be assumed that to the leakage current corresponding cells are sub-optimally functioning, such as caused by dust, cracking, ageing, an inherent mismatch, or a combination thereof. The cause may be determined based on a time duration of the situation. At regular intervals the control circuit (or controller, or processor) decides whether it is better to turn a corresponding bypass on or leave it off, or turn it off. Eventually an alarm may be generated and sent to an operator, such that a visual inspection of the module may be performed. In a third scenario a considerable amount of current, such as lmA-lOA, passes through at least one current sensor. The to the leakage current corresponding cells may be shaded significantly or damaged seriously, which now forces the bypass system to be activated for such cells. Based on a measured output power, and optionally a temperature, the control circuit may decide whether to keep the corresponding bypass activated or to force the current to pass through such cells, which may be determined on a maximum power or on safety requirements .

Various circuit topologies may be envisaged. A first circuit topology optimises efficiency and has a low chance of hot spots, a second circuit topology slightly optimises efficiency and has a low chance of hot spots, a third circuit topology optimises efficiency and has a high chance of hot spots, and a fourth circuit topology slightly optimises efficiency and has a high chance of hot spots. As such the invention provides for a variety in possible circuits.

To minimize shading losses and to reduce their negative effects, the present cell-level power management system is developed to control each cells performance at shading condition which may also to communicate with an operator. A smart celllevel power managed PV module may contain a printed circuit board inside its junction box while all PV cells of the modules are typically connected to this box through a back sheet routing system. This smart PV module can understand the working condition of its cells and manage them to obtain a highest available power. It may also provide communication signals containing information about working condition PV cells for the user. Therefore, more energy will be saved during shading and a PV system user may also be notified about the working condition of every individual cell within the PV system. The ability to decide when and which bypass elements should be turned on or off to obtain a maximum possible power is novel. So obtained results are a higher efficiency, a longer lifetime, improved grid stability, and more reliability for Smart cell-level power managed PV module in comparison with current commercially available PV modules, and therefore a lower costs of ownership.

The present switching network with many bypass elements is controlled by a (micro-)processor to make the module intelligent and robust against non-uniform irradiation conditions. The processor is adapted, such as by programming, to give the module the ability to detect its own working condition, select the best circuit topology for that specific working condition, and also providing information for a PV system user through a communication circuit and monitoring system.

In a second aspect the present invention relates to a method of operating a PV-module comprising n*m cells, and a switching network comprising a plurality of switchable bypass elements, a processor for controlling the bypass elements, a current or voltage sensor per cell, wherein each PV-cell is individually connected by electrical connections to and controlled by the switching network, comprising receiving for at least two cells a cell current, and a cell voltage, and connecting or disconnecting a switchable bypass element.

As identified throughout the description the present module and likewise the present method may comprises further elements or details, as provided throughout the description, and in particular in the claims.

Thereby the present invention provides a solution to one or more of the above mentioned problems and drawbacks.

Advantages of the present description are detailed throughout the description.

DETAILED DESCRIPTION OF THE INVENTION

The present invention relates in a first aspect to a module according to claim 1.

In an exemplary embodiment of the present module the PVcells may be back contacted PV-cells. The back contacted PVcells have a relatively larger surface area available for converting light into electricity. In addition it is easier to contact each individual cell to the present junction box.

In an exemplary embodiment of the present module the junction box may be located at a back side of the module and is centrally placed, preferably at an intersect of two diagonals of the module. As such power losses are minimized, switching times are minimal, and a minimum amount of material is necessary for connecting the individual cells. It is noted that prior art modules typically have a junction box, without any further components other than junctions and bypass diodes, located at a top side of a module.

In an exemplary embodiment of the present module the junction box may comprise a printed circuit board provided with a power circuit.

In an exemplary embodiment of the present module the bypass element may comprise in electrical connection a MOSFET driver, a charge pump and an N-channel MOSFET. Typically the charge pump, MOSFET driver, and MOSFET are in parallel connected. In addition a bipolar junction may be provided in parallel for switching.

In an exemplary embodiment of the present module the bypass element may comprise in electrical connection a Schottky diode and a NPN or PNP bipolar junction transistor.

In an exemplary embodiment of the present module the switch may comprise in electrical connection a DC/DC isolator, a MOSFET driver, and an N-channel MOSFET. Typically these elements are connected in series, and further the MOSFET driver is connected to the microprocessor, and the MOSFET is at one end connected to a currents sensor, and at another end to a string of PV-cells.

In an exemplary embodiment of the present module the switch may comprise in electrical connection a transistor and a diode as a bidirectional half control switch. The diode and transistor are typically connected in parallel, the diode connected to the collector and emitter of the transistor, the base of the transistor being in connection with the microprocessor, and the emitter may further be in connection to a string of PV-cells and the collector may further be in connection to a current sensor.

In an exemplary embodiment of the present module the switch of each cell ie[l,n] may be driven by a current C(i) from the processor. Cells may still be coupled in rows or likewise columns, and combinations thereof, wherein a switch of each cell is driven by the processor, such as to optimize a power output .

In an exemplary embodiment of the present module the NPN or PNP bipolar junction transistor of each cell ie[l,n] may be driven by a current B(i) from the processor.

In an exemplary embodiment of the present module the first bypass i=l may comprise a NPN or PNP bipolar junction transistor and wherein the i=n+l^th bypass may comprise a NPN or PNP bipolar junction transistor, and bypasses ie[2,n] may comprise a NPN bipolar junction transistor and an anti-parallel diode to work as bidirectional half control switch

In an exemplary embodiment of the present module the processor may be a microprocessor.

In an exemplary embodiment of the present module the processor may be integrated in the module, such as a PCB.

In an exemplary embodiment of the present module the processor may comprise at least one of a clock, a ground, a Vcc, an AD current, an AD-voltage, and a temperature sensor.

In an exemplary embodiment the present module may comprise a communication circuit.

In an exemplary embodiment of the present module electrical connections of each individual cell (i,j) may have a thickness, a width, and a length, and optionally a doping, preferably such that power losses are minimal.

In an exemplary embodiment the present module may comprise embedded software for operating the module.

In an exemplary embodiment the present module may comprise at least one power provider selected from a battery, a battery charger, and a voltage regulator.

In an exemplary embodiment the present module may comprise an alarm.

The one or more of the above examples and embodiments may be combined, falling within the scope of the invention.

EXAMPLES

The below relates to examples, which are not limiting in nature.

The invention is further detailed by the accompanying figures, which are exemplary and explanatory of nature and are not limiting the scope of the invention. To the person skilled in the art it may be clear that many variants, being obvious or not, may be conceivable falling within the scope of protection, defined by the present claims.

FIGURES

The invention although described m detailed explanatory context may be best understood panying figures.

Figs, la-e show schematics sent module .

Figs. 2a-e show schematics sent module.

Figs. 3a-e show schematics sent module.

Figs. 4a-e show schematics sent module.

Fig. 5 shows a work flow.

Figs. 6a-c show schematics in conjunction with the accomof a first topology of the preof a second topology of the preof a third topology of the preof a fourth topology of the preof a solar panel.

DETAILED DESCRIPTION OF THE FIGURES

Figures la-4a, as part of power circuit, schematically show PV cells within the PV module. P ¢1} to P(n+1) nodes connect the bypass circuits to the PV cells (interacting figures la-4a and lb-4b).

Figures lb-4b, as part of power circuit, show bypasses, switches, and current and voltage sensors. Ports AD(1) to AD(n+l), AD(current) and AD(voltage) provide feedbacks from power circuit to the control circuit while ports C(l) to C(n+1) and B(l) to B(n+1) are command signals from control circuit to power circuit (interacting figures lb-4b and ld4d). Figures lb-4b contain different types of elements for bypasses and switches but the circuit's functionality is the same.

Figures lc-4c, as part of power circuit, show power supply units to provide stable voltage for the microprocessor, drivers, and other internal consumers.

Figures ld-4d, as part of control circuit, show microprocessor with required ports for controlling the PV cells.

Figures le-4e show a communication circuit and its required ports .

Figure 5 shows a working algorithm of the microprocessor. The flowchart demonstrates all the actions that the microprocessor may perform step-by-step to make sure that PV module will provide the highest possible power in a safe working condition .

Figs. 6a-c show schematics of a solar panel. In fig. 6a a module is shown with a glass plate 61 provided on an array of back contacted solar cells. Further electrical connections 63 are shown, which individually connect each solar cell to a junction box, and a back plate 64, which are located at a back side of the module. Further a frame 65, typically of aluminium, is present. Fig. 6b shows a view from the back side of the module, wherein the junction box is located at a back side of the module. The central part of the figure shows the junction box, and the right part functionality of the junction box. The switching network addresses the (individual) bypass elements. The status and control of the switching network and bypass elements may be wireless communicated. In. fig 6c electrical connection to junction box 66 are shown, in this case for a limited number of cells.

The figures have been detailed throughout the description.

For the purpose of searching the following section is added, of which the last section is a translation into Dutch.

1. Cell-level power managed PV-module comprising a multitude of individual PV-cells (i,j) located at a front side of the module, typically an array of n*m cells, ie[l;n], and j e [l;m] a junction box comprising a switching network, the switching network comprising a plurality of switchable bypass elements, a processor for actively controlling the bypass elements, a current or voltage sensor per cell, the switching network forming at least one string of PV-cells by electrically connecting k PV-cells, a current and voltage sensor per string of k cells, a memory, and a plurality of switches, wherein each bypass element comprises a NPN or PNP bipolar junction transistor, wherein each PV-cell is individually connected by electrical connections to the junction box and controlled by the switching network, such that an electrical configuration of PV-cells and the junction box is provided when in operation.

2. Module according to claim 1, wherein the PV-cells are back contacted PV-cells.

3. Module according to any of the preceding claims, wherein the junction box is located at a back side of the module and is centrally placed, preferably at an intersect of two diagonals of the module.

4. Module according to any of the preceding claims, wherein the junction box comprises a printed circuit board provided with a power circuit.

5. Module according to any of the preceding claims, wherein the bypass element comprises in electrical connection a MOSFET driver, a charge pump, and an N-channel MOSFET.

6- Module according to any of the claims 1-4, wherein the bypass element comprises in electrical connection a Schottky diode and a NPN or PNP bipolar junction transistor.

7. Module according to any of the preceding claims, wherein the switch comprises in electrical connection a DC/DC isolator, a MOSFET driver, and an N-channel MOSFET.

8. Module according to any of the preceding claims, wherein the switch comprises in electrical connection a transistor and a diode as a bidirectional half control switch.

9. Module according to any of the preceding claims, wherein the switch of each cell ie[l,n] is driven by a current C(i) from the processor.

10. Module according to any of the preceding claims, wherein the NPN or PNP bipolar junction transistor of each cell ie[l,n] is driven by a current B(i) from the processor.

11. Module according to any of the preceding claims, wherein the first bypass i=l comprises a NPN or PNP bipolar junction transistor and wherein the i=n+l^th bypass comprises a NPN or PNP bipolar junction transistor, and bypasses ie[2,n] comprise a NPN bipolar junction transistor and an anti-parallel diode to work as bidirectional half control switch.

12. Module according to any of the preceding claims, wherein the processor is a microprocessor.

13. Module according to any of the preceding claims, wherein the processor is integrated in the module, such as a PCB.

14. Module according to any of the preceding claims, wherein the processor comprises at least one of a clock, a ground, a

Vcc, an AD current, an AD-voltage, and a temperature sensor.

15. Module according to any of the preceding claims, comprising a communication circuit.

16. Module according to any of the preceding claims, wherein electrical connections of each individual cell (i,j) have a thickness, a width, and a length, and optionally a doping, preferably such that power losses are minimal.

17. Module according to any of the preceding claims, comprising embedded software for operating the module.

18. Module according to any of the preceding claims, comprising at least one power provider selected from a battery, a battery charger, and a voltage regulator.

19. Module according to any of the preceding claims, comprising an alarm.

20. Method of operating a PV-module comprising n*m cells, and a switching network comprising a plurality of switchable bypass elements, a processor for controlling the bypass elements, a current or voltage sensor per cell, wherein each PVcell is individually connected by electrical connections to and controlled by the switching network, comprising receiving for at least two cells a cell current, and a cell voltage, and connecting or disconnecting a switchable bypass element .

21. Method according to claim 20, wherein the bypass element is connected by activating B(i) or is disconnected by de-activating B(i).

22. Method according to claim 20 or 21, wherein a cell temperature is measured.

23. Method according to any of claims 20-22, wherein an output power of at least two cells is measured.

24. Method according to any of claims 20-23, wherein 2⁶-2²⁰ PV modules are maintained and operated, such as in a solar farm.

Claims

Conclusions

A cell-level power-driven PV module, comprising a plurality of individual PV cells (i, j) located at a front of the module, usually a series of n * m cells, iG [1; n] and je [1; m] a junction box comprising a switching network, the switching network comprising a plurality of switchable bypass elements, a processor for actively controlling the bypass elements, a current or voltage sensor per cell, the switching network comprising at least a series of PV cells by electrically connecting k PV cells, a current and voltage sensor per series of k cells, a memory, and a number of switches, each bypass element comprising an NPN or PNP bipolar junction transistor, each PV cell being separate connected by electrical connections to the terminal box and is controlled by the switching network such that an electrical configuration of PV cells and the terminal box is provided when it is in operation.

The module of claim 1, wherein the PV cells are back-contact PV cells.

3. Module according to one of the preceding claims, wherein the connection box is located at the rear of the module and is centrally located, preferably at an intersection of two diagonals of the module.

4. Module as claimed in any of the foregoing claims, wherein the connection box comprises a printed circuit board which is provided with a power circuit.

The module according to any of the preceding claims, wherein the bypass element in electrical connection comprises a MOSFET driver, a charge pump, and an N-channel MOSFET.

The module of any one of claims 1-4, wherein the bypass element in electrical connection comprises a Schottky diode and an NPN or PNP bipolar junction transistor.

The module of any one of the preceding claims, wherein the switch in electrical connection comprises a DC / DC insulator, a MOSFET driver, and an N-channel MOSFET.

A module according to any one of the preceding claims, wherein the switch in electrical connection comprises a transistor and a diode as a bi-directional semi-control switch.

The module according to any of the preceding claims, wherein the switch of each cell ie [1, n] is driven by a current C (i) of the processor.

The module according to any of the preceding claims, wherein the NPN or PNP bipolar junction transistor of each cell ie [1, n] is driven by a stream B (i) from the processor.

A module according to any one of the preceding claims, wherein the first bypass i = 1 comprises an NPN or PNP bipolar junction transistor, and wherein the i = n + 1 ^e bypass comprises an NPN or PNP bipolar junction transistor, and bypasses ie [2 , n] include an NPN bipolar junction transistor and an anti-parallel diode to act as a bidirectional semi-control switch.

The module of any one of the preceding claims, wherein the processor is a microprocessor.

The module of any one of the preceding claims, wherein the processor is integrated in the module, such as a PCB.

A module according to any one of the preceding claims, wherein the processor comprises at least a clock, a ground, a Vcc, an AD current, an AD voltage, and a temperature sensor.

15. Module according to one of the preceding claims, comprising a communication circuit.

A module according to any one of the preceding claims, wherein electrical connections of each individual cell (i, j) have a thickness, a width, and a length, and optionally a doping, preferably such that power losses are minimal.

17. Module as claimed in any of the foregoing claims, comprising embedded software for operating the module.

A module according to any one of the preceding claims, comprising at least one energy supplier selected from a battery, a battery charger, and a voltage regulator.

19. Module according to one of the preceding claims, comprising an alarm.

A method for operating a PV module comprising n * m cells, and a switching network comprising a plurality of switchable bypass elements, a processor for controlling the bypass elements, a current or voltage sensor per cell, each PV cell is individually connected by electrical connections to and controlled by the switching network, comprising receiving for at least two cells a cell current and a cell voltage, and connecting or disconnecting a switchable bypass element.

The method of claim 20, wherein the bypass element is connected by activating B (i) or disconnected by deactivating B (i).

The method of claim 20 or 21, wherein a cell temperature is measured.

The method of any one of claims 20 to 22, wherein an output power of at least two cells is measured.

24. A method as claimed in any one of claims 20-23, wherein 2 ⁶ ²⁰ -2 PV modules are maintained and operated, such as in a solar operating f.

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FIG. 1 (c)

FIG. 1 (a) + Supply

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FIG. 1 (d)

Microprocessor

FIG. 1 (e)

Communication ^

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Fig.2 (c) τ

Supply

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Fig.2 (d)

Microprocessor

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