NL2010870C2

NL2010870C2 - Optimally controlled waveforms for device under test bias purposes.

Info

Publication number: NL2010870C2
Application number: NL2010870A
Authority: NL
Inventors: Ajay Kumar Manjanna; Koen Buisman; Marco Spirito; Mauro Marchetti; Marco Johannes Pelk; Leonardus Cornelis Nicolaas Vreede
Original assignee: Anteverta Mw B V
Priority date: 2013-05-28
Filing date: 2013-05-28
Publication date: 2014-12-01

Description

Optimally controlled waveforms for Device Under Test bias purposes Field of the invention

The present invention relates to a method for applying a controlled bias waveform at a reference plane of a device under test (DUT), and to a measurement system applying such a method.

Prior art

American patent publication US7518378 entitled ‘Cable compensation for pulsed I-Y measurements’ discloses a method for compensating cable influences in measurements of devices under test, in particular semiconductor devices. The errors related to the resistance of test conductors and sense/load resistances for a pulse I-V measurement system are determined by making open circuit and through circuit measurements using a combination of DC and pulse instrument measurements. .

American patent publication US7205773 entitled ‘Method for calibrating a pulsed measurement system’ discloses a method for calibrating a pulsed measurement system, in particular for testing semiconductor devices under test, as an improvement to earlier DC only measurements. A calibration is performed by determining system characteristics with probe tips being open and closed.

Summary of the invention

The present invention seeks to provide a method and measurement system for providing optimally controlled waveforms for Device Under Test bias purposes.

According to the present invention, a method according to the preamble defined above is provided, wherein an arbitrary waveform generator (AWG) is used connected to the device under test via a connecting line, wherein a measurement plane is defined remote from the reference plane of the device under test. The method comprises an iterative process to control the output of the arbitrary waveform generator based on measurements in the measurement plane, wherein a calibration is performed to obtain calibration data determining the relation between the measurements at the measurement plane and the waveform at the reference plane of the device under test, the calibration comprising determining error-terms for a plurality of frequencies, an amplitude calibration and a phase calibration.

Using the present invention embodiments, the drawbacks of existing measurement methods and systems are not present anymore, and ideal voltage/current pulses can be constructed at a reference plane of a device under test.

Short description of drawings

The present invention will be discussed in more detail below, using a number of exemplary embodiments, with reference to the attached drawings, in which

Fig. la shows a schematic view of a prior art measurement set-up;

Fig. lb shows the waveform shapes at different planes in the measurement setup of Fig. la;

Fig. 2a shows a schematic view of a measurement set-up according to an embodiment of the present invention;

Fig. 2b shows the waveforms shaped obtained at various planes in the measurement set-up of Fig. 2a.

Detailed description of exemplary embodiments

Active devices under test (DUT) need well controlled bias conditions both under static as well as pulsed operation. A prior art measurement set-up for testing DUT’s, such as semiconductor devices, is shown in the schematic view of Fig. la. A waveform (pulse) source 1 providing the bias conditions is connected to one or more amplifiers 2, and connected to a device under test (DUT) 5 via a connecting line 3 and a bias-T circuit 4. The connecting line 3 is usually shielded and grounded as indicated in Fig. la The bias-T circuit 4 can be used to provide an RF signal to the DUT 5, e.g. to provide regular operating conditions of the DUT 5. Measurements are made in a regular fashion, using voltage and current measurements 6, 7 at a measurement plane 9 somewhere between the waveform source 1 and the DUT 5. Practically, the measurement plane 9 is in front of the connecting line 3. The voltage measurement 6 and current measurement 7 (using a series resistance in the set-up shown) are well known to the skilled person.

Providing the bias conditions accurately to the DUT 5 is less trivial than normally assumed. E.g. a bias source 1 will have its own internal impedance, while connecting cables, fixtures and probes connected to the DUT 5 insert additional series resistances and self-inductances as well as capacitive loading. Under pure CW

operation of the DUT 5, only series resistance in the bias path will cause a simple voltage drop, which can be easily corrected. However, when using pulsed or modulated conditions for the DUT 5, e.g. only in the RF signal or DC bias conditions or a combination of those, it is much more difficult to keep the bias provided to the device terminals to a well-controlled user defined condition due to the influence of the inductive and capacitive parasitics in the connecting bias network 2-4. Note that the use of pulsed bias and pulsed RF are both common measurement techniques to study semiconductor device (DUT) behavior. There are several reasons for choosing pulsed bias, examples are: isothermal requirements, study of trapping effects or characterizing devices prone to failures under continuous bias. Conventional pulsed measurement systems suffer from the unavoidable distortion of the bias pulse shape caused by the frequency dependent attenuation of the system, overshoot, non-linear phase transfer and voltage drop within the pulse. Also pulsed RF conditions are often used in device characterization e.g. to avoid severe self-heating of the DUT 5 or to study its behavior for memory effects. Note that the use of pulsed RF also affects the bias condition of the DUT 5. Since when operating in a high efficiency mode, self-biasing of the DUT 5 will occur due to this RF pulse, yielding an increase in the current flowing through the DUT 5, and consequently also appears as voltage fluctuations in the bias conditions offered to the DUT 5 due to non-zero impedance of the bias network. These unwanted bias fluctuations due to RF pulsing or distorted bias pulses when applying pulsed DC conditions reduce the quality and usefulness of the data achieved in the device characterization. This effect is shown very schematically in Fig. lb which shows the actual waveform at various planes along the measurement set-up of Fig. la: starting with a ‘clean’ pulse waveform at the bias source 1, the other parts of the measurement set-up introduce various distortions, resulting in a distorted pulse waveform at the DUT reference plane 8.

The present invention offers embodiments of methods and a measurement system that do not suffer from these drawbacks. Ideal voltage / current pulses can be constructed at a device under test 5 reference plane 8, while at the same time the voltage / current at such reference plane 8 can be obtained. Also unwanted voltage variations due to bias fluctuations caused by pulsed or modulated RF conditions can be avoided.

A schematic diagram of the measurement set-up in which the present invention embodiments can be implemented is shown in Fig. 2a. The bias source 1 of the set-up of Fig. la is replaced by an arbitrary waveform generator (AWG) 11, which generates an output signal towards the amplifier(s) 2 under control of a processing unit 10, via the control interface 16. Furthermore, the voltage and current measurements are digitized in a sensing unit 12 in order to allow easy input of the measurements to the processing unit 10 via measurement interface 15. Furthermore, a synchronization channel 17 is present between the sensing unit 12 and the AWG 11, the function of which will be explained in more detail further below. Measurement interfaces 18, 19 connect the sensing unit 12 to a measurement plane 9 in the measurement set-up, in this case between the amplifier(s) 2 and the connecting line 3, at the level of the ADC’s in the sensing unit.

When applying the present measurement set-up for pulsed DC measurements with a controlled waveform shape at the reference plane 8 of the DUT 5, the sensing unit 12 e.g. comprises an I/V measurement set-up 18, 19 with direct measurement, or measurement via a coupler, and an ADC.

When applying the present measurement set-up for pulsed/ modulated RF measurements with controlled bias conditions, the baseband pulse set-up is the same as above. In the RF-path (bias-T circuit 4), a generic RF analyzer (e.g. network analyzer, spectrum analyzer, real-time or sampling oscilloscope) or a load pull arrangement with internal or external RF signal source arrangement is present. The RF-analyzer of load pull arrangement can be synchronized for its RF envelope with the AWG 11 generating the baseband signal. For these type of measurement, a bias-T circuit 4 is present in a further embodiment, between the arbitrary waveform generator and the device under test 5 for supplying an RF waveform to the device under test 5. The controlled bias waveform is then set to a specific waveform in the presence of the RF waveform (a pulsed RF or modulated RF signal) applied to the device under test (5).

For the lowest frequencies it is advantageous to measure voltage and current directly, however at higher frequencies the use of couplers to measure ‘a’ and ‘b’ waves has advantages. These methods can also be applied in parallel.

In general wording, the measurement system of the present invention is connectable to a device under test, and comprises an arbitrary waveform generator 11 connected to the device under test 5 via a connecting line 3, a sensing circuit 12 for proving measurements in a measurement plane 9 remote from the reference plane 8 of the device under test 5 (e.g. between the arbitrary waveform generator 11 and the connecting line 3), and a processing unit 10 connected to the sensing circuit 12 and the arbitrary waveform generator 11, wherein the processing unit 10 is arranged to execute the method according to any one of the method embodiments described herein.

Fig. 2b shows the resulting wave forms at various planes in the measurement system, which clearly shows that after the final iterations, a desired waveform at the DUT 5 reference plane 8 can be obtained by proper control of the waveform generated by the AWG 11.

Pulsed biased measurements are a common method to characterize devices, either due to isothermal requirements, or to measure the device 5 in bias regimes which are otherwise unobtainable (e.g. close/in avalanche). Commonly the hardware configuration, defined by the length of DC cables, wafer probes and the device 5 itself determines what pulse width can be applied to the device without significant distortion of the pulse shape (e.g. overshoot). According to the present invention embodiments a method is provided which can provide control over the time domain waveform used to bias the device under test 5, allowing the creation of any arbitrary shape at a given reference plane 8. Therefore the method also gives the ability to apply near ideal, exactly defined pulses (no overshoot or undershoot), limited only by the systems bandwidth. The same techniques can be used to keep perfect “static” bias voltage conditions at the DUT terminals when the device 5 is tested with modulated / pulsed RF signals.

Consider a voltage pulse is applied at the input of a transmission line 3 / electrical configuration, which connects to a DUT 5. The input impedance of the DUT 5 can be typically modelled as a (lossy) capacitor. When such a system is driven from a source 11 with a given internal impedance (e.g. 50 Ohm), the higher frequency components of the pulse will be attenuated more due to the capacitive loading and the pulse shape will be distorted. By pre-characterizing the connecting line 3 / network 4 with the device 5, this pulse distortion can be corrected for, e.g. by increasing the amplitude of the higher frequency components. This method will work properly for characterizing passives or linear devices. However when active devices are concerned, their pulsed behaviour will be non-linear, therefore an iterative procedure is necessary to find the correct input signal to result in an exactly defined pulse or bias conditions (no overshoot, undershoot or ringing) for the controlled bias condition at the reference plane 8. A calibration procedure is required to determine the pulse / bias condition at a given reference plane 8.

The same holds when pulsed RF or modulated RF conditions are applied (using the bias-T circuit 4), now due to self-biasing of the active device 5 the non static RF conditions will yield a time varying bias current of the DUT 5. Consequently, due to the non zero impedance of the bias path these current fluctuations will cause an undesired time varying voltage on the device terminals, which will corrupt the device behaviour in terms of its linearity or will make the characterization of memory effects dependent on the bias network used in the measurement setup. This is something that drastically reduces the validity range of the measured results. One can avoid / correct for these voltage variations by adjusting the spectral content of the injected signal provided by the bias unit/source (AWG 11). Also here an iterative procedure needs to be used to determine the baseband injection signal to make the applied bias voltage to the DUT 5 constant in time in a practical measurement setup. When this condition is fulfilled, memory effects due to thermal effects can be clearly separated from memory effects caused by the bias network. In fact when enforcing these voltage fluctuations under pulsed RF or modulated signals to zero is effectively equivalent to providing a baseband short circuit condition to the device under test 5. Consequently, the memory effects in traditional measurement setups, which provide non-zero baseband impedance for their bias networks are eliminated. As such a better model extraction of the DUT 5 is enabled.

Furthermore, a sense port on a bias-T 4 is normally used to sense the voltage, however the actual pulse-shape at the DUT 5 reference plane 8 can be quite different from what is sensed. To overcome this issue the present method embodiment employs a calibration procedure based on the measurement of multiple standards to calculate the transfer function (or the error terms) between the sense port and the desired DUT 5 reference plane 8.

As shown in Fig. 2a, the measurement system consists of some arbitrary waveform generators 11 (comprising a DAC) to create and modify the pulse or bias injection signal and some method of acquisition (using the sensing circuit 12, e.g. comprising an ADC or oscilloscope). The method embodiment optimizes the waveform at a reference plane 8 by comparing it to a user specified goal, e.g. a perfect pulse shape or another desired bias condition. This is done by manipulating the waveform of the bias injection signal through a number of iterations, e.g. in the frequency or in the time domain. Note that if the target waveform is known, its frequency components in phase and amplitude are known. The amplitudes and phases of the different spectral components (frequency domain) or the time dependent amplitude and time delay (time domain) are optimized using an iterative approach to overcome the non-idealities in the system and the nonlinear loading nature of semiconductor devices which are used as DUT 5.

The relation between what is measured with the ADC’s (of the sensing circuit 12) at the measurement plane 9 and the device under test plane (reference plane 8) has to be determined. This is done by connecting known standards at the device plane and measuring them under sinusoidal excitation (one or multiple). From these measurements the so-called error-terms, for each frequency, can be calculated. These will be supplemented with an absolute amplitude (voltage or power) calibration and phase calibration. For measurements at a reference plane 8 where a power meter cannot be connected, a two-tier calibration method can be applied. This introduces an auxiliary measurement plane 9 at which a measurement instrument can be connected.

In general terms, the present invention method embodiments comprise the following features: an iterative process to control the output of the arbitrary waveform generator 11 based on measurements in the measurement plane 9, - wherein a calibration is performed to obtain calibration data determining the relation between the measurements at the measurement plane 9 and the waveform at the reference plane 8 of the device under test 5, - the calibration comprising determining error-terms for a plurality of frequencies, an amplitude calibration and a phase calibration.

The term calibration must be understood in this application as any possible kind of calibration, and could e.g. also include using a model of the circuit network of the measurement system between the measurement plane 9 and the reference plane 8. Such a model could be available from simulation or determined from DC and S-parameter measurements of the network.

Determining error-terms for the plurality of frequencies may be executed using three or more electrical standards with known characteristics as device under test 5, such as an open circuit, closed circuit and a load device with known characteristics. The amplitude and phase calibration are executed using measurements at the reference plane 8 of the device under test 5. Alternatively, the amplitude and phase calibration are executed using measurements in an auxiliary measurement plane 9 different from the reference plane 8. For all measurement alternatives, the controlled bias waveform can be a DC pulse waveform. In a further embodiment the controlled bias waveform is set to a constant supply voltage, to avoid bias fluctuations due to the presence of a pulsed RF or modulated RF signal applied to the device under test.

Part of the implementation of the present method embodiment can also be described as follows in general terms for the iterative process: generating an initial bias waveform using the arbitrary waveform generator 11; measuring the resulting voltage and current waveforms that are related to the device under test 5 at the measurement plane 9 (using one or more ADC’s in the sensing circuit 12 by means of current and voltage probe(s) 18, 19 and/or one or more couplers); calculating from the measured voltage and current waveforms the actual waveform at the reference plane 8 of the device under test 5 using the data obtained during calibration; converting the actual waveform from the time domain to the frequency domain; calculating the error between the actual waveform and the controlled bias waveform at each frequency component composing the waveform; and generating a new bias waveform with the arbitrary waveform generator 11 to minimize the calculated error.

In a further or alternative embodiment of the present invention, the iterative process comprises a time domain optimization process, instead of in the frequency domain, which in specific applications may provide a better result.

The steps of the algorithm for pulsed DC measurements with controlled waveform shape may also be described as follows: 1) Apply initial input voltage using DAC of the AWG 11.

2) Measure voltage and current (or ‘a’ and ‘b’) at measurement plane 9 in the time domain using sensing circuit 12.

3) (optional) Convert to frequency domain.

4) (optional) Calculate ‘a’ and ‘b’ from the measured quantities e.g. voltage and current (if using coupler, ‘a’ and ‘b’ are measured directly).

5) Apply error correction using error terms obtained during calibration to obtain corrected ‘a’ & ‘b’ waves or the corrected ‘Vdut’ and ‘Idut’.

6) Calculate Gdut, Vdut and Idut.

7) Calculate difference between wanted voltage (or current) waveform and Vdut (or Idut).

8) Update the injected voltage waveform and repeat at step 2 until the error between the wanted and the measured reaches a specified threshold.

The steps 3-8 can be implemented in the processing unit 10, and possibly partially in the sensing circuit 12.

The steps of the algorithm for pulsed RF measurements with controlled bias conditions can be described as follows: 1) Synchronize envelope RF signal (e.g. resulting from a network analyzer connected to the bias-T circuit 4) with the arbitrary waveform generator 11 that injects the base band injection signal.

2) Apply the RF signal with its time varying envelope to the DUT 5 and the initial supply voltage using the baseband DAC of the AWG 11.

3) Measure bias / baseband voltage and current (or ‘a’ and ‘b’) at measurement plane 9 in the time domain.

4) (optional) Convert to frequency domain.

5) (optional) Calculate ‘a’ and ‘b’ from the measured quantities e.g. voltage and current or (if using coupler, ‘a’ and ‘b’ are measured directly).

6) Apply error correction using error terms obtained during calibration to obtain corrected ‘a’ & ‘b’ waves or the corrected ‘Vdut’ and ‘Idut’.

7) Calculate Gdut, Vdut and Idut.

8) Calculate difference between wanted voltage (or current) and Vdut (or Idut).

9) Apply again the RF signal with its time varying envelope and update the injected bias / baseband voltage and repeat at step 2 until the error between the wanted and the measured controlled bias conditions at the DUT reference plane 8 reaches a specified threshold.

Similarly, the steps 3-9 can be implemented in the processing unit 10, and possibly partially in the sensing circuit 12

The steps of the calibration (in the baseband) can be implemented as follows: 1) Error terms calculated using standard (e.g. short/open/load) calibration method.

2) Power calibration at reference plane 8 using ADC of sensing circuit 12, oscilloscope or power meter directly connected to reference plane 8 or with known (s-parameter) connection.

3) Power levelling to determine transfer between DAC of AWG 11 and device reference plane 8.

4) Phase calibration at reference plane 8 using ADC of sensing circuit 12, phase-reference or oscilloscope directly connected to reference plane 8 or with known (s-parameter) connection.

5) (optional) measure transfer function between DAC of AWG 11 and reference plane 8.

Note that in a specific embodiment, only a part of the actual waveform in the frequency domain is used to calculate the error. This will lower the amount of harmonics needed to describe the waveform and ease the optimization process.

The exact implementation of the system injecting signals to the device at the various frequencies does not affect the algorithm. For example using amplifiers 2 in parallel is trivial and invisible to the algorithm, such that for baseband envelope generation each of the amplifiers 2 may cover part of the frequency range, defined by filters at each amplified input. For example a dc-dc converter could be used for the lowest frequencies, delivering mainly DC. Whereas (multiple) AC coupled amplifiers 2 could cover the frequencies above the range of the DC-DC converter. The outputs of the amplifiers 2 would be combined using power combiners, frequency multiplexing filters or couplers. In other words, the arbitrary waveform generator 11 is connected to one or more amplifiers 2, the one or more amplifiers 2 being connected in parallel, and each being arranged to cover different frequency bands.

To protect the device under test 5, the system may start at a low bias voltage, after convergence the levels can be slowly increased, using the information obtained at the lower power levels or bias voltage. This will reduce the risk of device failure during the iteration process due to extreme voltage conditions or the exceeding of the device safe operating area. This, in a further embodiment, the initial bias waveform has an amplitude lower than a maximum operating voltage of the device under test 5.

When there is no up conversion/down conversion, during power calibration, an extra calibration step can be done determining the transfer from the DAC (of the AWG 11) to the reference plane 8. This transfer can be used to guarantee that multiple pulses arrive at the device planes at the right timing with respect to each other. For example during pulsed measurements it can be very important which connection gets biased first (e.g. GaN, first the gate, then the drain). In a further embodiment, therefore, the amplitude and phase calibration are executed to obtain transfer timing data from the measurement plane 9 to the reference plane 8, in order to secure proper timing in case of multiple pulses to DUT 5

In some measurements, it may be required to control only the ON part of the pulse and the OFF part may not be forced to 0 V, which can be implemented in the processing unit 10 and/or AWG 11. This might be necessary to allow the charge stored in the device capacitances to flow out during the pulse OFF time.

When measuring a DUT 5 under RF pulsed conditions or RF modulated signals, e.g. using a network analyzer or signal analyzer, a synchronization between the envelope of the RF signal applied to the DUT 5 and the baseband injection signal is desired. Thus, in a further embodiment, a synchronization is executed between the controlled bias waveform and the RF waveform.

Application areas of the present invention method and measurement system embodiments are e.g. load pull, pulsed biasing, envelope tracking systems, measurement arrangements for semiconductor device characterization using network analyzers with pulsed RF or modulated RF signals, variety of measurement systems. The goal can be the study of a variety of physical effects, e.g. trapping effects, thermal time constants and also to keep the device at a constant temperature (isothermal) for modelling purposes. Or to eliminate memory effects due to the non-zero impedance of practical bias arrangements in characterization setups for semiconductor devices.

The present invention may be defined as a number of embodiments:

Embodiment 1. Method for applying a controlled bias waveform at a reference plane (8) of a device under test (DUT) using an arbitrary waveform generator (AWG) (11) connected to the device under test (5) via a connecting line (3), wherein a measurement plane (9) is defined remote from the reference plane (8) of the device under test (5), the method comprising an iterative process to control the output of the arbitrary waveform generator (11) based on measurements in the measurement plane (9), wherein a calibration is performed to obtain calibration data determining the relation between the measurements at the measurement plane (9) and the waveform at the reference plane (8) of the device under test (5), the calibration comprising determining error-terms for a plurality of frequencies, an amplitude calibration and a phase calibration.

Embodiment 2. Method according to embodiment 1, wherein determining error-terms for the plurality of frequencies is executed using three or more electrical standards with known characteristics as device under test (5), such as an open circuit, closed circuit and a load device with known characteristics.

Embodiment 3. Method according to embodiment 1 or 2, wherein the amplitude and phase calibration are executed using measurements at the reference plane (8) of the device under test (5).

Embodiment 4. Method according to embodiment 1 or 2, wherein the amplitude and phase calibration are executed using measurements in an auxiliary measurement plane different from the reference plane (8).

Embodiment 5. Method according to any one of embodiments 1-4, wherein the amplitude and phase calibration are executed to obtain transfer timing data from the measurement plane (9) to the reference plane (8).

Embodiment 6. Method according to any one of embodiments 1-5, wherein the iterative process comprises: generating an initial bias waveform using the arbitrary waveform generator (11); measuring the resulting voltage and current waveforms that are related to the device under test (5) at the measurement plane (9); calculating from the measured voltage and current waveforms the actual waveform at the reference plane (8) of the device under test (5) using the data obtained during calibration; converting the actual waveform from the time domain to the frequency domain; calculating the error between the actual waveform and the controlled bias waveform at each frequency component composing the waveform; and - generating a new bias waveform with the arbitrary waveform generator (11) to minimize the calculated error.

Embodiment 7. Method according to embodiment 6, wherein the initial bias waveform has an amplitude lower than a maximum operating voltage of the device under test (5).

Embodiment 8. Method according to embodiment 6 or 7, wherein a part of the actual waveform in the frequency domain is used to calculate the error.

Embodiment 9. Method according to any one of embodiments 1-8, wherein the controlled bias waveform is a DC pulse waveform.

Embodiment 10. Method according to any one of embodiments 1-9, wherein a bias-T circuit (4) is present between the arbitrary waveform generator and the device under test (5) for supplying an RF waveform to the device under test (5), and wherein the controlled bias waveform is set to a specific waveform in the presence of the RF waveform applied to the device under test (5).

Embodiment 11. Method according to embodiment 10, wherein the controlled bias waveform is set to a constant supply voltage.

Embodiment 12. Method according to embodiment 10 or 11, wherein a synchronization is executed between the controlled bias waveform and the RF waveform.

Embodiment 13. Method according to any one of embodiments 1-12, wherein the arbitrary waveform generator (11) is connected to one or more amplifiers (2), the one or more amplifiers being connected in parallel, and each being arranged to cover different frequency bands.

Embodiment 14. Method according to any one of embodiments 1-13, wherein the iterative process comprises a time domain optimization process.

Embodiment 15. Measurement system connectable to a device under test, comprising an arbitrary waveform generator (11) connected to the device under test (5) via a connecting line (3), a sensing circuit (12) for providing measurements in a measurement plane (9) remote from a reference plane (8) of the device under test (5), and a processing unit (10) connected to the sensing circuit (12) and the arbitrary waveform generator (11), wherein the processing unit (10) is arranged to execute the method according to any one of embodiments 1-14.

The present invention embodiments have been described above with reference to a number of exemplary embodiments as shown in the drawings. Modifications and alternative implementations of some parts or elements are possible, and are included in the scope of protection as defined in the appended claims.

Claims

A method for applying a controlled bias waveform to a reference plane (8) of a device to be tested (DUT) using a random waveform generator (AWG) (11) connected to the device (5) to be tested via a connecting line (3), wherein a measuring plane (9) is defined at a distance from the reference plane (8) of the device (5) to be tested, the method comprising an iterative process to output the generator for random waveforms (11) to control based on measurements in the measurement plane (9), wherein a calibration is performed to obtain calibration data that reflects the relationship between the measurements on the measurement plane (9) and the waveform on the reference plane (8) of the device to be tested (5) wherein the calibration comprises determining error terms for a plurality of frequencies, an amplitude calibration, and a phase calibration.

Method according to claim 1, wherein the determination of error terms for the plurality of frequencies is performed with three or more electrical standards with known characteristics as the device (5) to be tested, such as an open circuit, a short-circuited circuit and a load with known characteristics .

A method according to claim 1 or 2, wherein the amplitude and phase calibration is performed with measurements on the reference plane (8) of the device (5) to be tested.

The method according to claim 1 or 2, wherein the amplitude and phase calibration are performed using measurements in an auxiliary measurement plane that is different from the reference plane (8).

The method of any one of claims 1-4, wherein the amplitude and phase calibration are performed to obtain time transfer data from the measurement plane (9) to the reference plane (8).

The method of any one of claims 1-5, wherein the iterative process comprises: generating an initial bias waveform using the generator for random waveforms (11); measuring the resulting voltage and current waveforms relating to the device (5) to be tested on the measuring surface (9); - calculating from the measured voltage and current waveforms the current waveform on the reference plane (8) of the device (5) to be tested using the data obtained during the calibration; - converting the current waveform from the time domain to the frequency domain; - calculating the error between the current waveform and the controlled bias waveform at each frequency component that compiles the waveform; and generating a new bias waveform with the random waveform generator (11) to minimize the calculated error.

The method of claim 6, wherein the initial bias waveform has an amplitude that is lower than a maximum operating voltage of the device (5) to be tested.

The method of claim 6 or 7, wherein a portion of the current waveform in the frequency domain is used to calculate the error.

The method of any one of claims 1-8, wherein the controlled bias waveform is a DC pulse waveform.

The method of any one of claims 1-9, wherein a bias-T circuit (4) is provided between the random waveform generator and the device (5) to be tested for providing an RF waveform to the device to be tested (5), and wherein the controlled bias waveform is set to a specific waveform in the presence of the RF waveform provided to the device to be tested (5).

The method of claim 10, wherein the controlled bias waveform is set to a constant supply voltage.

The method of claim 10 or 11, wherein a synchronization is performed between the controlled bias waveform and the RF waveform.

A method according to any of claims 1-12, wherein the random waveform generator (11) is connected to one or more amplifiers (2), the one or more amplifiers being connected in parallel, and each arranged to have different frequency bands. cover.

The method of any one of claims 1-13, wherein the iterative process comprises an optimization process in the time domain.

A measuring system connectable to a device to be tested, comprising a generator for random waveforms (11) connected to the device to be tested (5) via a connecting line (3), a recording circuit (12) for providing measurements in a measuring surface (9) at a distance from a reference surface (8) of the device (5) to be tested, and a processing unit (10) connected to the recording circuit (12) and the random waveform generator (11), the processing unit is adapted to carry out the method according to one of claims 1-14.