[go: up one dir, main page]

MY156986A - A method of forming a device with nanostructures - Google Patents

A method of forming a device with nanostructures

Info

Publication number
MY156986A
MY156986A MYPI2011006032A MYPI2011006032A MY156986A MY 156986 A MY156986 A MY 156986A MY PI2011006032 A MYPI2011006032 A MY PI2011006032A MY PI2011006032 A MYPI2011006032 A MY PI2011006032A MY 156986 A MY156986 A MY 156986A
Authority
MY
Malaysia
Prior art keywords
forming
present
nanostructures
nanowires
layers
Prior art date
Application number
MYPI2011006032A
Inventor
Teh Aun Shih
Daniel Bien Chia Sheng
Lee Hing Wah
Original Assignee
Mimos Berhad
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mimos Berhad filed Critical Mimos Berhad
Priority to MYPI2011006032A priority Critical patent/MY156986A/en
Priority to PCT/MY2012/000186 priority patent/WO2013089556A1/en
Publication of MY156986A publication Critical patent/MY156986A/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H10D62/118—Nanostructure semiconductor bodies
    • H10D62/119—Nanowire, nanosheet or nanotube semiconductor bodies
    • H10D62/122—Nanowire, nanosheet or nanotube semiconductor bodies oriented at angles to substrates, e.g. perpendicular to substrates
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/014—Manufacture or treatment of FETs having zero-dimensional [0D] or one-dimensional [1D] channels, e.g. quantum wire FETs, single-electron transistors [SET] or Coulomb blockade transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/43—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 1D charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/63—Vertical IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/016—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including vertical IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/491—Vertical transistors, e.g. vertical carbon nanotube field effect transistors [CNT-FETs]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/20—Carbon compounds, e.g. carbon nanotubes or fullerenes
    • H10K85/221—Carbon nanotubes

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Carbon And Carbon Compounds (AREA)
  • Thin Film Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

THE PRESENT INVENTION GENERALLY RELATES TO A METHOD OF FORMING NANOTUBES OR NANOWIRES DEVICE IN AN OPENING, MORE PARTICULARLY THE PRESENT INVENTION RELATES TO METHOD OF FORMING DEVICE STRUCTURES USING RANDOM NANOTUBES OR NANOWIRES FORMATIONS. THE DEVICE WITH NANOSTRUCTRURES AS FORMED ACCORDING TO THE METHOD DESCRIBED IN THE PRESENT INVENTION COMPRISES FIRST, A SUBSTRATE (11). THEN, AT LEAST A CONDUCTIVE LAYER (21), AT LEAST A DIELECTRIC LAYER (22), AND AT LEAST A CATALYST LAYER (23) DEPOSITED ON THE SUBSTRATE (11) FOR STRUCTURING THE DEVICE, WHEREIN THE CATALYST LAYER (23) IS SANDWICHED WITHIN THE TWO LAYERS OF THE CONDUCTIVE LAYER (21), AND AN OPENING (24) IS ETCHED THROUGH SAID LAYERS FOR FORMING A PLURALITY OF NANOSTRUCTURES (25). MOST ILLUSTRATIVE DRAWING:
MYPI2011006032A 2011-12-13 2011-12-13 A method of forming a device with nanostructures MY156986A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
MYPI2011006032A MY156986A (en) 2011-12-13 2011-12-13 A method of forming a device with nanostructures
PCT/MY2012/000186 WO2013089556A1 (en) 2011-12-13 2012-06-29 A method of forming a device with nanostructures

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
MYPI2011006032A MY156986A (en) 2011-12-13 2011-12-13 A method of forming a device with nanostructures

Publications (1)

Publication Number Publication Date
MY156986A true MY156986A (en) 2016-04-15

Family

ID=48612897

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI2011006032A MY156986A (en) 2011-12-13 2011-12-13 A method of forming a device with nanostructures

Country Status (2)

Country Link
MY (1) MY156986A (en)
WO (1) WO2013089556A1 (en)

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050067936A1 (en) 2003-09-25 2005-03-31 Lee Ji Ung Self-aligned gated carbon nanotube field emitter structures and associated methods of fabrication
US7345296B2 (en) 2004-09-16 2008-03-18 Atomate Corporation Nanotube transistor and rectifying devices
JP4481853B2 (en) * 2005-03-18 2010-06-16 富士通株式会社 Manufacturing method of carbon nanotube device
US20060281321A1 (en) * 2005-06-13 2006-12-14 Conley John F Jr Nanowire sensor device structures
WO2007022359A2 (en) * 2005-08-16 2007-02-22 The Regents Of The University Of California Vertical integrated silicon nanowire field effect transistors and methods of fabrication
US20070105356A1 (en) 2005-11-10 2007-05-10 Wei Wu Method of controlling nanowire growth and device with controlled-growth nanowire
US7544591B2 (en) * 2007-01-18 2009-06-09 Hewlett-Packard Development Company, L.P. Method of creating isolated electrodes in a nanowire-based device
DE602007008682D1 (en) * 2007-03-19 2010-10-07 Hitachi Ltd Directed growth of nanowires
CN101933125A (en) * 2007-12-31 2010-12-29 伊特蒙塔公司 Edge-contact vertical carbon nanotube transistors

Also Published As

Publication number Publication date
WO2013089556A1 (en) 2013-06-20

Similar Documents

Publication Publication Date Title
WO2011096700A3 (en) Touch panel and method of manufacturing the same
EP4440253A3 (en) High density organic bridge device and method
WO2013049042A3 (en) Coalesced nanowire structures with interstitial voids and method for manufacturing the same
GB2509851A (en) Organic electronic device and method of manufacture
WO2012058377A3 (en) Methods for etching oxide layers using process gas pulsing
MY167410A (en) A nanowire device having graphene top and bottom electrodes and method of making such a device
WO2013049008A3 (en) Nanowire sized opto-electronic structure and method for manufacturing the same
WO2014082061A8 (en) Nanowire-modified graphene and methods of making and using same
EP2468679A3 (en) Method for fabricating a cavity for a semiconductor structure and a semiconductor microphone fabricated by the same
WO2014028598A3 (en) Method of manufacturing a magnetoresistive-based device
WO2013022753A3 (en) Semiconductor devices having fin structures and fabrication methods thereof
MY175353A (en) Metallization of solar cells using metal foils
WO2012102556A3 (en) Method of manufacturing a transparent conductive layer and transparent conductive layer manufactured by same
WO2012047068A3 (en) Light-emitting element and method for manufacturing same
WO2012150278A9 (en) Hierarchical carbon nano and micro structures
SG10201406426RA (en) High voltage device
WO2013032233A3 (en) Graphene-based laminate including doped polymer layer
WO2013019021A3 (en) Graphene laminate including dopant and manufacturing method thereof
GB2486116A (en) Activation of graphene buffer layers on silicon carbide
EP2722899A3 (en) Light emitting device
TW200943473A (en) Method for fabricating pitch-doubling pillar structures
IN2014DN09305A (en)
GB2526464A (en) Methods of forming buried microelectricomechanical structures coupled with device substrates and structures formed thereby
WO2012075006A3 (en) High rate electric field driven nanoelement assembly on an insulated surface
WO2012047069A3 (en) Light-emitting element and method for manufacturing same