MXPA99010188A - Method and apparatus for cooling a semiconductor die - Google Patents
Method and apparatus for cooling a semiconductor dieInfo
- Publication number
- MXPA99010188A MXPA99010188A MXPA/A/1999/010188A MX9910188A MXPA99010188A MX PA99010188 A MXPA99010188 A MX PA99010188A MX 9910188 A MX9910188 A MX 9910188A MX PA99010188 A MXPA99010188 A MX PA99010188A
- Authority
- MX
- Mexico
- Prior art keywords
- cooling plate
- semiconductor matrix
- cooling
- semiconductor
- matrix
- Prior art date
Links
- 238000001816 cooling Methods 0.000 title claims abstract description 189
- 239000004065 semiconductor Substances 0.000 title claims abstract description 180
- 238000000034 method Methods 0.000 title claims abstract description 18
- 238000012546 transfer Methods 0.000 claims abstract description 32
- 239000002470 thermal conductor Substances 0.000 claims abstract description 21
- 229910052738 indium Inorganic materials 0.000 claims abstract description 20
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims abstract description 20
- 230000008878 coupling Effects 0.000 claims abstract description 13
- 238000010168 coupling process Methods 0.000 claims abstract description 13
- 238000005859 coupling reaction Methods 0.000 claims abstract description 13
- 239000002826 coolant Substances 0.000 claims abstract description 9
- 239000011159 matrix material Substances 0.000 claims description 160
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 7
- 229910052802 copper Inorganic materials 0.000 claims description 7
- 239000010949 copper Substances 0.000 claims description 7
- 239000003507 refrigerant Substances 0.000 claims description 5
- 239000004020 conductor Substances 0.000 claims description 2
- 239000004568 cement Substances 0.000 claims 1
- 239000000523 sample Substances 0.000 description 11
- 239000000758 substrate Substances 0.000 description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 7
- 229910052710 silicon Inorganic materials 0.000 description 7
- 239000010703 silicon Substances 0.000 description 7
- 238000002955 isolation Methods 0.000 description 5
- 238000012360 testing method Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 238000000746 purification Methods 0.000 description 4
- 238000003491 array Methods 0.000 description 3
- 230000000903 blocking effect Effects 0.000 description 3
- 230000008030 elimination Effects 0.000 description 3
- 238000003379 elimination reaction Methods 0.000 description 3
- 238000004806 packaging method and process Methods 0.000 description 3
- 230000002441 reversible effect Effects 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 230000001276 controlling effect Effects 0.000 description 2
- 238000006731 degradation reaction Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 238000012856 packing Methods 0.000 description 2
- 230000001105 regulatory effect Effects 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 229910000846 In alloy Inorganic materials 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 238000007670 refining Methods 0.000 description 1
- 230000002459 sustained effect Effects 0.000 description 1
- 238000013024 troubleshooting Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Abstract
A method and an apparatus for cooling a semiconductor die. In one embodiment, a C4 packaged semiconductor die (301) is thermally coupled to a cooling plate (313) having an opening (315). The opening of the cooling plate is disposed over a back side surface of the semiconductor die such that direct unobstructed access to the exposed back side surface of the semiconductor die is provided. A conformable thermal conductor, such as indium, is disposed between the semiconductor die and the cooling plate to improve the thermal coupling between the semiconductor and cooling plate. In one embodiment, the semiconductor die (501) is mounted on a circuit board (503) and a cooling block (519) is disposed on the opposite side of the circuit board. The cooling plate is thermally coupled to the cooling block with heat transfer conduits, such as thermal screws, that extend through the circuit board to transfer the heat from the semiconductor die through the cooling plate through the heat transfer conduits to the cooling block located on the opposite side of the circuit board. In one embodiment, coolant is circulated through the cooling block to remove heat from the cooling block.
Description
METHOD AND APPARATUS FOR COOLING A MATRIX OF SEMICONDUCTOR BACKGROUND OF THE INVENTION Field of the Invention The present invention relates in general to integrated circuit technology and more specifically, the present invention &refers to controlling the temperature of an integrated circuit. Background Information Within the integrated circuit industry, there is a continuing effort to increase the speed of integrated circuits as well as the density of devices.
As a result of these efforts, there is a tendency to use integrated circuit technology or reversible chips, when complex high-speed integrated circuits are packaged. Reversible integrated circuit technology is also known as packing with integrated circuit connection with collapse control (C4). In the packaging technology C4, the integrated circuit matrix is flipped down compared to packed circuit matrices, using wire bonding technology. During the testing of an integrated circuit, it is often convenient to operate the integrated circuit in its native packaging environment, and at the intended operational and integrated speed of the integrated circuit. Since the power density in modem integrated circuits is typically very high, it is convenient to remove the heat generated by these integrated circuits, in order to reduce the risk of the integrated circuits being subjected to excessive heat. If the temperature of the integrated circuit is not properly controlled, the performance of the circuit may be affected. In some cases, component degradation will occur if the temperature of the integrated circuit is not regulated properly. In this way, any collected fault elimination information should be obtained with the temperature of the regulated integrated circuit. Otherwise, any obtained failover information may not be useful. As illustrated in FIG. 1A, the removal of heat from a semiconductor device connected with wire 101, generally involves connecting a finned thermal collector 103 to a bottom surface 107 of a gasket 111 and passing an air flow 109 over it. thermal collector 103. A thermal flow path is established through a rear side surface 105 of a semiconductor device 101 through the gasket 111 and towards the thermal collector 103. A thermal bar (not shown) that can be embedded within the gasket 111, thermally couples the semiconductor device 101 to the thermal Oolector 103. The heat is then drawn outward by the air flow 109 which passes through the thermal collector 103. FIG. IB illustrates the removal of heat from a semiconductive matrix attached with wire 131 during silicon purification. As illustrated in Figure IB, the semiconductor matrix 131 is assembled in a wire-bound package 141 that is mounted on a circuit board 145. The probe tool 143 is part of an electron beam system (e-beam) employed to debug the semiconductor matrix 1 1 while operating in a vacuum chamber. With unobstructed direct access to the semiconductor array 131, the probe tool 143 can
- used to obtain information from the semiconductor matrix 131 while operating. Since the semiconductor matrix 131 is operated under vacuum, normal cooling mechanisms based on air circulation are not available. A cooling technique commonly employed in current beam sounding systems employs the use of a cooling block 149 which thermally couples to a bottom surface 147 of the package 141. The heat generated by the semiconductor matrix 131 is transferred through from package 141 to cooling block 149. The coolant
151 is circulated through the cooling block 149 to regulate the temperature of the cooling block 149 and thereby regulate the temperature of the semiconductor matrix 131. Figure 2 illustrates heat dissipated from a packed semiconductor matrix C4. 201. The heat is removed from a rear side surface 205 of the semiconductor matrix 201, by passing an air flow 209 over a finned heat collector 203, which is thermally coupled to the rear side surface 205. In some high power or high energy applications, the heat is dissipated from the semiconductor matrix 201 when connecting a thermally conductive bar (not shown) to the rear side surface 205 and then thermally coupling the thermal bar to a thermal collector (not shown). In some cases, the thermal bar is thermally coupled to a metal plate having a large thermal mass and a large thermal transfer area. In other cases, the thermal bar may be thermally coupled to a heat dispersion plate by the isothermal pipe or some other low resistance thermal path. It is noted that the heat in general is not dissipated through the package 207 since in general the welding stops 211 are not considered good thermal conductors. Still further, the package 207 can be an organic package and therefore has the characteristics of a thermal insulator.
When a semiconductor matrix 201 is debugged with a polling system, such as for example a beam system e, it is desired that the backside surface 205 be exposed to provide direct unobstructed access with the e-beam probe tool. However, as described in Figure 2, a thermal connector 203 is normally used in packing C4, to remove heat from the semiconductor matrix 201. If the collector 201 is removed from the semiconductor matrix 201 for troubleshooting purposes, a Continuous operation of the integrated circuit during analysis can damage the circuits of the semiconductor matrix 201. Furthermore, if the semiconductor matrix mounted on C4 201 is operated in a vacuum chamber of an e-beam probing system, normal cooling mechanisms such As driving are not available. Without the ability to regulate the temperature of the semiconductor matrix 201, a sustained operation of the semiconductor matrix 201 at full operating speeds can result in damage and / or degradation of the circuit. COMPENDIUM OF THE INVENTION A method and apparatus for sealing a semiconductor matrix are described. In one embodiment, a cooling plate having an opening is disposed on a first surface of the semiconductor matrix, such that the cooling plate is thermally coupled to the semiconductor matrix. Heat is transferred from the semiconductor matrix to the cooling plate. The opening of the cooling plate is disposed on an exposed portion of the semiconductor matrix, such that unobstructed access is allowed to the exposed portion of the semiconductor matrix. Additional features and benefits of the present invention will be apparent from the detailed description, figures and claims set forth below. BRIEF DESCRIPTION OF THE DRAWINGS La. present invention is illustrated by way of example and not limitation in the accompanying drawings. Figure 1A illustrates a semiconductor device packed with wire junction, having a finned thermal collector connected to the back side of the package or package. Figure IB illustrates a packaged semiconductor device connected with wire that is probed during refining and cooling with a cooling block connected to the back side of the package. Figure 2 illustrates a packed semiconductor device C4 having a finned thermal collector connected to the back side of the semiconductor substrate. Figure 3 illustrates a packed semiconductor device C4 having a cooling plate thermally coupled to a semiconductor matrix while being probed with a tool in accordance with the teachings of the present invention. Figure 4A is a top view illustration of a cooling plate, having an opening disposed on a semiconductor matrix according to the teachings of the present invention. Figure 4B is a top view illustration of another embodiment of a cooling plate having an opening disposed on a semiconductor matrix in accordance with the teachings of the present invention. Figure 4C is an illustration of yet another embodiment of a cooling plate having more than one opening disposed on the semiconductor arrays of a multiple integrated circuit module, in accordance with the teachings of the present invention. Figure 5 is an illustration of a C4 packed semiconductor device, thermally coupled with a cooling plate that is thermally coupled with a cooling block through a heat transfer duct, in accordance with the teachings of the present invention. DETAILED DESCRIPTION A method and apparatus for sealing a semiconductor matrix are described. In the following description, numerous specific details are set forth in order to allow a detailed understanding of the present invention. It will be apparent however to a person having ordinary skill in the art that the specific detail does not require to be employed to practice the present invention. In other casesWell known materials or methods do not have to be described in detail in order to avoid obscuring the present invention. One embodiment of the present invention provides a method and apparatus for controlling the temperature of a C4 packaged integrated circuit or reversible loop in a vacuum system, without significantly obscuring the exposed circuit substrate. In this way, the modality allows to probe an integrated circuit C4 during fault isolation and silicon debugging. Temperature control of the semiconductor matrix of the packaged integrated circuit C4 is achieved with an embodiment of the present invention, without resorting to thermal conduction through the packaging and without significantly blocking the exposed circuit substrate. The temperature control is achieved in one embodiment by direct thermal contact with a cooling plate to the exposed substrate of the integrated circuit mounted on C4 such that the thermal conduction of the package does not affect the efficiency of the temperature control system. One embodiment of the present invention can be used in the vacuum chamber of a current e-beam sounding system and is compatible with existing cooling techniques employed with wire-wrapped packaged integrated circuits. Figure 3 is a side view illustration of a semiconductor matrix 301 packaged at C4 303. In package C4 303 it is mounted on a plug 305 for operating on a circuit board 307. In one embodiment, a probe tool 309 is used for extracting information from an exposed rear side surface 311 of the semiconductor matrix 301 as illustrated in Figure 3. In one embodiment of the present invention, the semiconductor matrix 301 is configured to operate at the integral or complete intended operating speeds in the camera. "Vacuum of an e-beam probing system It is recognized, however, that the present invention is not limited to use in beam probing systems" and therefore may also be useful in other purification systems such as for example laser-based test systems or similar mechanical sounding systems In order to regulate the temperature of the semiconductor matrix 301 while operating at the speeds of op In a vacuum chamber, as well as providing unobstructed access directly to the rear side surface 311 of the semiconductor matrix 301, a cooling plate 313 having an opening 315 is placed in direct contact with the exposed substrate of the matrix. semiconductor 301 as illustrated in Figure 3. With the cooling plate 311 in direct contact with the exposed substrate of the semiconductor matrix 301, the heat is transferred from the semiconductor matrix 301 to the cooling plate 313 through the thermal coupling in the interface between the semiconductor matrix 301 and the cooling plate 313. With the opening 315, the probing tool 309 has unobstructed access directly to the rear side surface 311 of the semiconductor matrix 301 for fault element and silicon debugging purposes . In some cases, the interface contact surfaces between the semiconductor matrix 301 and the cooling plate 313 may not be planar. As a consequence, the thermal coupling between the cooling plate 313 and the semiconductor matrix 301 may consist only of point contacts. In this situation, the thermal conductivity between the semiconductor matrix 301 and the cooling plate 313 is reduced, thereby increasing the thermal resistance between the semiconductor matrix 301 and the cooling plate 313. In this case, the efficiency of the system is reduced of temperature control currently described. In one embodiment, a thermally bendable or malleable conductor is disposed at the interface between the Semiconductor matrix 301 and the cooling plate 313, to increase the thermal conductivity between the semiconductor matrix 301 and the cooling plate 313. In an embodiment, indium or an indium alloy is used as the malleable thermal conductor, in order to provide a thermally conformable interface for increasing the thermal conductivity and reducing the thermal resistance between the cooling plate 313 and the semiconductor matrix 301. The indium is particularly useful for this aspect of the present invention due to its high thermal conductivity, its malleable characteristics and high thermal conductivity and low melting temperature. In addition, the indium is compatible with vacuum, which makes it well suited for use in vacuum chambers of h z-e sounding systems. In one embodiment, a thin layer of indium 311 is disposed around the edges of the rear side surface 311 of the semiconductor matrix 301, at sites where the cooling plate 311 will eventually be in contact with the semiconductor matrix 301. In one modality, the Indian 317 consists of a thin sheet of Indian metal. After the indium 317 is placed on the edges of the semiconductor matrix 301, it melts and the cooling plate 313 is again pressed against the semiconductor matrix 301, such that a highly conformable coating of indium 317 is formed between the semiconductor matrix 301 and cooling plate 313. In another embodiment, indium 317 does not melt before cooling plate 311 is pressed against semiconductor matrix 301. In this manner, a thermal interface can be formed with increased thermal conductivity, shape between the semiconductor matrix 301 and the cooling plate 313. Other malleable thermal conductors may be used instead of indium according to the teachings of the present invention, provided that conformable thermal contact is formed between the semiconductor matrix 301 and the cooling plate 313. For example, a thermal paste can be used instead of indium 317 to improve the thermal coupling between the matrix microprocessor 301 and cooling plate 313. It is recognized however that some thermal pastes are not particularly well suited for use in vacuums, due to their gas release properties. In one embodiment of the present invention, the portion of the cooling plate 131 disposed on the semiconductor matrix 301 is thinned to approximately 1 mm. In doing so, the probe tool 309 provides increased access and maneuverability to extract information from the backside surface 311 of the semiconductor matrix 301 during fault isolation or fault elimination testing. In one embodiment of the present invention, coolant 319 is circulated through the cooling plate 313 in order to regulate the cooling plate temperature 313. In this manner, the heat generated by the semiconductor matrix 301 can be transferred to the plate. of cooling 313 and then out of cooling plate 313 through coolant 319 to an external cooler (not shown) in accordance with the teachings of the present invention. Figure 4A is a top view illustration of a cooling plate 413 having an opening 415 disposed on and thermally coupled with a semiconductor matrix 401 in accordance with the teachings of the present invention. In one embodiment, the dimensions of the opening 415 are smaller than the outer dimensions of the edges of the semiconductor matrix 401, such that the semiconductor matrix 401 is thermally coupled to the cooling plate 413 in a contact region of interface 417 located on the back side surface of the semiconductor matrix 401, In one embodiment, a malleable thermal conductor, such as indium is disposed between the cooling plate 413 and a semiconductor matrix 401 in the interface contact region 417, for increase the thermal coupling between the semiconductor matrix 401 and the cooling plate 413. In this way, the probing tools such as an e-beam probe or a laser-based test system, have clogged access to the exposed circuit substrate on the back side of the semiconductor matrix 401 through the opening 415, Figure 4B is a top view illustration of another embodiment of the present invention, wherein a cooling plate 433 which it has an opening 435 is disposed on and thermally coupled with a semiconductor matrix 431. As illustrated in Figure 4B, the opening 435 is configured to expose an entire corner of the semiconductor matrix 431. In the embodiment illustrated, the semiconductor matrix 431 is thermally couples to the cooling plate 433 in an interface contact region 437. It is noted that in the embodiment, illustrated in Figure 4B, direct unobstructed access is provided to the entire exposed corner of the semiconductor matrix 431, including the edges of the exposed corner of the semiconductor matrix 431 for sounding purposes. In this embodiment, it is appreciated that direct unobstructed access to any position of the rear side surface of the semiconductor matrix 431 can be achieved by rotating the semiconductor matrix 431 with respect to the cooling plate 433 such that the desired portion of the back side of the semiconductor matrix 431 is exposed through the aperture 435. Similar to the previously written embodiments, a malleable thermal conductor may be disposed between the cooling plate 433 and the semiconductor matrix 431 in the interface contact region 437. By doing so, the thermal conductivity between the semiconductor matrix 431 and the cooling plate 433 is increased, thereby increasing the thermal coupling between the semiconductor matrix and the cooling plate 433. By increasing the thermal coupling, the temperature gradient across the matrix Semiconductor 431 can be reduced. Figure 4C is a top view illustration of yet another embodiment of the present invention with a cooling plate 473 having openings 475A-D. In the embodiment shown, each opening 475A-D is configured to be exposed on a corresponding rear side surface of the semiconductor dies 471A-D. In this embodiment, semiconductor arrays 471A-D are included in a multiple integrated circuit module (MCM) unit. Each semiconductor matrix 471A-D is thermally coupled to the cooling plate 473, such that heat is transferred from each respective semiconductor matrix 471A-D to a cooling plate 473. Each aperture 475A-D is disposed on a corresponding semiconductor matrix 471A-D, so that the direct unobstructed access is provided to an exposed portion of the back side of each semiconductor matrix 471A-D. Accordingly, probing can be performed on the exposed portion of each semiconductor matrix 471A-D for silicon purification purposes in fault isolation. As illustrated in Figure 4C, heat is transferred from the silicon matrix 471A to the cooling plate 473 through an interface contact region 477A. The heat is transferred from the semiconductor matrix 471B to the cooling plate 473, through an interface contact region 467B. Heat is transferred from the semiconductor matrix 471C to the cooling plate 473 through an interface contact region 477C. The heat is transferred from the semiconductor matrix 471D to the cooling plate 473 through an interface contact region 477D. Similar to the previously described embodiments, a malleable thermal conductor such as indium is disposed between the semiconductor dies 471A-D and the cooling plate 473 in the interface contact regions 477A-D, to increase the thermal coupling between the plate cooling 473 and each respective semiconductor matrix 471 -D. It is appreciated that the present invention is not limited to cooling plates having only the shapes and openings described with respect to Figures 4A-C, and that cooling plates and openings having other shapes can therefore be used, provided that the semiconducting matrices are cooled with significant blocking of the semiconductor matrix exposed in accordance with the teachings of the present invention. Figure 5 is an illustration of one embodiment of a method and apparatus for cooling a semiconductor matrix according to the teachings of the present invention. In the embodiment shown in Figure 5, a semiconductor matrix 501 is packaged in a C4 pack 503, which is mounted on a plug 505 mounted on a circuit board 507. Similar to the system described with respect to Figure IB, the semiconductor matrix 501 can be operated in the vacuum chamber of an e-beam sounding system for purposes of fault isolation and silicon fault elimination.
In accordance with the teachings of the present invention, a cooling plate 513 having an opening 501 is disposed on and thermally coupled with the semiconductor matrix 501. The aperture 515 is disposed on a rear side surface 511 of the semiconductor matrix 501, in this way providing direct and unobstructed access for a probe tool 509 to the exposed portion of the rear side surface 511 of the semiconductor matrix 501. In one embodiment of the present invention, a malleable thermal conductor such as indium 517, is disposes between the semiconductor matrix 501 and the cooling plate 513 in the interface contact region to provide a conformable thermal contact between the semiconductor matrix 501 and the cooling plate 513, such that the thermal coupling between the semiconductor matrix 501 and the cooling plate 513 is increased. Therefore, the heat generated by the semiconductor matrix 501 while operating at the intended integral operating speeds is transferred to the cooling plate 513 through the indium 517. In one embodiment, the present invention can be compatible with the cooling systems. temperature control of the current e-beam probing systems, wherein a cooling block 519 is disposed on the opposite side of the circuit board 507, with reference to Figure 5, the probing tool 509 probes the semiconductor matrix 501 , which is mounted on the circuit board 507. However, the cooling block 519 is located on the opposite side of the 507 circuit board, as in the case with many existing e-beam sounding systems that are configured to probe Integrated circuits packed with wire junction. In accordance with the teachings of the present invention, the cooling plate 513 is thermally coupled to the cooling block 519 through thermal transfer conduits 523A and 523B. In one embodiment, thermal transfer conduits 523A-B, include thermal screws extending from the cooling plate 513 through the openings 527A and 527B respectively in circuit board 507 to the cooling block 519. In one embodiment, the Cooling block 519 includes threaded holes 529 and 52 B, configured to receive threads 527A and 527B of heat transfer conduits 523A and 523B respectively. As such, the heat transfer conduits 523A and 523B thermally couple the cooling plate 513 to the cooling block 519, such that heat is transferred from the semiconductor matrix 501 through the cooling plate 513 through the the thermal transfer conduits 523A-B to the cooling block 519. In one embodiment, the thermal screws of the heat transfer conduits 523A and 523B include oversized heads 531A and 531B respectively, as well as oversized threads 527A and 527B, respectively. With the oversized heads 531A and 531B, the amount of surface area where the heat transfer conduits 523A and 523B are in thermal contact with the cooling plate 513 is increased in order to decrease the thermal resistance, as well as increase the thermal conductivity. Similarly, with the oversize threads 527A and 527B, the amount of surface area where the heat transfer conduits 523A and 523B are in thermal contact with the cooling block 519, is therefore increased by reducing the thermal resistance and increasing the thermal conductivity . In another embodiment of the present invention, the cooling plate 513 includes features 533A and 533B located on the circuit board 507 next to the cooling plates 513, such that features 533A and 533B tend to push the C4 503 package at the 505 plug of the 507 circuit board, when the thermal screws of the heat transfer conduits 523A and 523B are tightenedas such, it is more likely that the C4 503 package will adequately rest on the plug 505 after the thermal screws of the heat transfer conduits 523A and 523B are tightened. Furthermore, it is appreciated that the thermal screws of the heat transfer conduits 523A and 523B also allow adjustment in the plane of the cooling plate 513 to the plane of the rear lateral surface 511 of the semiconductor matrix 501 in order to further increase the contact thermal through indium 517. In one embodiment of the present invention, the cooling plate 503 includes copper with a nickel coating. In another embodiment of the present invention, the thermal screws of the heat transfer conduits 533A and 533B are also made of copper. It is recognized that copper is particularly well suited for the present application since copper is a good thermal conductor. It is noted, however, that the present invention is not limited to a cooling plate 513 and heat transfer conduit 533A and 533B that are made of copper and that other materials can therefore be used as long as the cooling plate 513 and the condustos Thermal transfer 523A and 523B have sufficient thermal conductivity to cool the semiconductor matrix 501 according to the teachings of the present invention. In another embodiment of the present invention, the refrigerant 521 is circulated through the cooling block 519, to further facilitate the removal of heat from the semiconductor matrix 501. Thus, what has been described is a method and an apparatus for cool a semiconductor matrix. With the method and cooling apparatus currently described, integrated circuits mounted on C4, or MCM units can be operated in a vacuum chamber of a ha2-e sounding system for fault isolation and silicon purification. The currently described cooling method and apparatus also provide C4-mounted integrated circuits or MCM units operated outside of a vacuum chamber during laser-based or mechanical probing tests. The current apparatus and method cools the semiconductor matrix without resorting to thermal conduction through the packaging and without significantly blocking the exposed circuit substrate of the MCM or C4 units, furthermore, the present invention is compatible with existing temperature control systems in systems current e-beam probes typically configured to cool the semiconductor arrays through their respective packages. In the above detailed description, the method and apparatus of the present invention have been described with reference to their specific exemplary embodiments. However, it will be apparent that various modifications and changes may be made without departing from the broadest spirit and scope of the present invention. The present specification and Figures, in accordance shall be considered as illustrative rather than restrictive.
Claims (30)
- CLAIMS! .- < A device for cooling a semiconductor matrix, characterized in that it comprises: a cooling plate having an opening, the cooling plate is disposed on a first surface of the semiconductor matrix, the cooling plate is thermally coupled to the semiconductor matrix in an interface of the first surface, such that heat is transferred from the semiconductor matrix to the cooling plate, the opening of the cooling plate is arranged on an exposed portion of the first surface, such that unblocked access is provided to the exposed portion of the first surface.
- 2. The device according to claim 1, characterized in that it further comprises: a thermal conductor are formable disposed between the semiconductor matrix and the cooling plate at the interface, the conformable thermal conductor is formed to adapt are the corresponding opposite surfaces of the cooling plate and the semiconductor matrix, to reduce the thermal resistance between the cooling plate and the matrix is iconduct a.
- 3. The device according to claim 2, characterized in that the conformable thermal conductor is a malleable thermal conductor comprising indium.
- 4. The device according to claim 1, characterized in that the cooling plate has another opening, the cooling plate is further disposed on a first surface of another semiconductor matrix, the cooling plate thermally coupled with the other semiconductor matrix in another interface on the first surface of the other semiconductor matrix such that heat is also extracted from the other semiconductor matrix to the cooling plate, the other opening of the cooling plate is disposed on an exposed portion of the first surface of the other semiconductor matrix, such that unobstructed access is also provided to the portion disposed on the first surface of the other semiconductor matrix.
- 5. The device according to claim 4, characterized in that the semiconductor matrix and the other semiconductor matrix are included in a module of multiple integrated circuits.
- 6. The device according to claim 1, characterized in that coolant is circulated through the reflec- tive plate to cool the cooling plate.
- 7. - The device according to claim 1, characterized in that the semiconductor matrix operates on a circuit board, the device further comprising: a cooling block arranged on an opposite side of the circuit board with respect to the semiconductor matrix; and a thermal transfer conduit thermally coupled between the cooling plate and the cooling block such that heat is transferred from the cooling plates to the cooling block through the thermal transfer conduit.
- 8. The device according to claim 7, characterized in that the thermal transfer conduit comprises a screw that couples the cooling plate and the cooling block.
- The device according to claim 8, characterized in that the screw includes an oversized screw head and oversized threads, in order to reduce a thermal resistance between the screw and the cooling plate and the cooling block.
- 10. The device according to claim 8, characterized in that the screw is configured to hold the semiconductor matrix in the circuit board.
- 11. The device according to claim 8, characterized in that the screw comprises copper.
- 12 «- The device according to claim 7, characterized in that the refrigerant is circulated through the cooling block in order to cool the refrigerant block.
- 13. The device according to claim 1, characterized in that the coolant plate comprises copper.
- 14. The device according to claim 1, characterized in that the semiconductor matrix is included in an integrated circuit mounted in integrated circuit connection with control crush (C4).
- 15. A device for cooling a semiconductor matrix, characterized in that it comprises: a cooling plate disposed on a first surface of the semiconductor matrix, the cooling plate is thermally coupled to the semiconductor matrix at an interface on the first surface, so such that heat is transferred from the semiconductor matrix of the cooling plate; and a conformable thermal conductor disposed between the semiconductor matrix and the cooling plate at the interface, the conformable heat conductor is formed to conform with the corresponding opposite surfaces of the cooling plate and the semiconductor matrix, to reduce thermal resistance between the plate of cooling and the semiconductor matrix.
- 16. The device according to claim 15, characterized in that the conformable thermal conductor is a malleable thermal conductor comprising indium.
- 17. The device according to claim 16, characterized in that the cooling plate is positioned such that a portion of the first surface is exposed in such a way as to provide unobstructed access to the exposed portion of the first surface.
- 18. The device according to claim 15, characterized in that the coolant is circulated through the cooling plate in order to cool the coolant plate.
- 19. The device according to claim 15, characterized in that the semiconductor matrix operates in a circuit board, the circuit further comprises: a cooling block arranged on an opposite side of the circuit board with respect to the semiconductor matrix; and a thermal transfer duct thermally coupled between the cooling plate and the cooling block, such that the heat is transferred from the cooling plate to the cooling block through the thermal transfer duct.
- 20. The device according to claim 19, characterized in that the thermal transfer conduit comprises a screw that thermally couples the cooling plate and the cooling block.
- 21. The device according to claim 20, characterized in that the screw includes a supersized screw head and oversized threads in order to reduce thermal resistance between the screw and the cooling plate and the cooling block.
- 22. The device according to claim 20, characterized in that the screw is configured to hold the semiconductor matrix to the circuit board.
- 23. The device according to claim 19, characterized in that the refrigerant is circulated through the cooling block in order to cool the refrigerant block.
- 24. A device for cooling a semiconductor matrix operating in a circuit board, characterized in that it comprises: a cooling plate arranged on a first surface of the semiconductor matrix, the cooling plate is thermally coupled to the semiconductor matrix in an interface in the first surface, in such a way that heat is transferred from the semiconductor matrix to the cooling plate; a cooling block disposed on an opposite side of the circuit board relative to the semiconductor matrix; and a thermal transfer duct thermally coupled between the cooling plate and the cooling block, such that heat is transferred from the cooling plate to the cooling block through the thermal transfer duct.
- 25. The device according to claim 24, characterized in that it further comprises: a conformable thermal conductor disposed between the semiconductor matrix and the cooling plate at the interface, the conformable thermal conductor is formed to conform or adapt with corresponding opposite surfaces of the cooling plate and the conductive matrix, in order to reduce a thermal resistance between the cooling plate and the conductive matrix.
- 26. The device according to claim 25, sarasterized because the conformable thermal sonder is a malleable thermal conductor comprising indium.
- 27. The device according to claim 24, characterized in that the cooling plate includes an opening such that the opening of the cooling plate is arranged on an exposed portion on the first surface in order to provide unobstructed access to the cooling surface. the exposed portion of the first surface.
- 28.- Method for cooling a semiconductor matrix, characterized in that it comprises the steps of: thermally coupling a cooling plate to a first surface of the semiconductor matrix in an interface, such that heat is transferred from the semiconductor matrix to the cooling plate, and increasing a thermal conductivity between the semiconductor matrix and the cooling plate by arranging a conformable thermal conductor comprising indium at the interface between the semiconductor matrix and the cooling plate.
- 29. - The method for cooling the semiconductor matrix according to claim 28, characterized in that it includes the additional step of exposing a portion of the first surface of the semiconductor base, in order to provide unobstructed access to the portion of the first surface of the semiconductor base. semiconductor matrix,
- 30. The method for cooling the semiconductor matrix according to claim 28, characterized in that it includes the additional steps of: operating the semiconductor matrix in a circuit board; arrange a cement block on an opposite side of the circuit board; thermally coupling the cooling plate to the cooling block, such that heat is transferred from the cooling plate to the cooling block through a thermal transfer conduit; and securing the semiconductor matrix to the circuit board with the thermal transfer conduit. SUMMARY OF THE INVENTION The present invention relates to a method and apparatus for cooling a semiconductor matrix. In one embodiment, a packed semiconductor matrix C4 (301) is thermally coupled to a cooling plate (313) having an opening (315). The opening of the cooling plate is disposed on a back side surface of the semiconductor matrix, such that unrestricted access is provided directly to the exposed backside surface of the semiconductor matrix. A conformable thermal conductor, such as indium, is placed between the semiconductor matrix and the cooling plate to improve the thermal coupling between the semiconductor and the cooling plate. In one embodiment, the semiconductor matrix (501) is mounted on a circuit board (503) and a cooling block (519) is disposed on the opposite side of the circuit board. The cooling plate is thermally coupled to the cooling block with thermal transfer ducts, such as thermal screws, which extend through the circuit board to transfer heat from the semiconductor matrix through the cooling plate, through the heat transfer ducts, to the cooling block located on the opposite side of the circuit board. In one embodiment, coolant is circulated through the cooling block to remove heat from the cooling block.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08856267 | 1997-05-14 |
Publications (1)
Publication Number | Publication Date |
---|---|
MXPA99010188A true MXPA99010188A (en) | 2000-09-04 |
Family
ID=
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5923086A (en) | Apparatus for cooling a semiconductor die | |
US4283754A (en) | Cooling system for multiwafer high density circuit | |
EP0717440B1 (en) | Cooling device of multi-chip module | |
US7967062B2 (en) | Thermally conductive composite interface, cooled electronic assemblies employing the same, and methods of fabrication thereof | |
US7803664B2 (en) | Apparatus and methods for cooling semiconductor integrated circuit package structures | |
US6424533B1 (en) | Thermoelectric-enhanced heat spreader for heat generating component of an electronic device | |
JPH07507182A (en) | 3D multi-chip module | |
CA2139266C (en) | Semiconductor package | |
US6570247B1 (en) | Integrated circuit device having an embedded heat slug | |
EP0883192A2 (en) | Grooved semiconductor die for flip-chip sink attachment | |
JPH0294545A (en) | Integrated circuit mounted device with heatsink and heatsink for integrated circuit mounted device | |
US7491577B2 (en) | Method and apparatus for providing thermal management on high-power integrated circuit devices | |
GB2280310A (en) | Spring-biased heat sink assembly for a plurality of integrated circuits on a substrate | |
US6663278B1 (en) | Method for determining the thermal performance of a heat sink | |
JP2005064384A (en) | Lsi package with interface module and heat sink used for it | |
JPH098187A (en) | Cooling method for integrated circuits | |
TWI312872B (en) | Cooling assembly with direct cooling of active electronic components | |
MXPA99010188A (en) | Method and apparatus for cooling a semiconductor die | |
US5206713A (en) | Mounting silicon chips | |
JP3058047B2 (en) | Sealed cooling structure of multi-chip module | |
JPH04291750A (en) | Head radiating fin and semiconductor integrated circuit device | |
JPH1168360A (en) | Cooling structure for semiconductor element | |
JP2946930B2 (en) | Heat sink cooling fin with excellent heat dissipation characteristics and method of manufacturing the same | |
JPS59202654A (en) | Package for integrated circuit | |
TWI782406B (en) | Burn-in board provided with backside cooling mechanism |