MXPA99010119A - Method and apparatus for self-doping negative and positive electrodes for silicon solar cells and other devices - Google Patents

Abstract

A self-doping electrode to silicon is formed primarily from a metal (major component) which forms a eutectic with silicon. A p-type dopant (for a positive electrode) or an n-type dopant (for a negative electrode) is alloyed with the major component. The alloy of major component and dopant is applied to a silicon substrate. Once applied, the alloy and substrate are heated to a temperature above the major component-silicon eutectic temperature such that the major component liquefies more than a eutectic proportion of the silicon substrate. The temperature is then decreased towards the eutectic temperature permitting molten silicon to reform through liquid-phase epitaxy and while so doing incorporate dopant atoms into its regrown lattice. Once the temperature drops below the major component-silicon eutectic temperature the silicon, which has not already regrown into the lattice, forms a solid-phase alloy with the major component and the remaining unused dopant. This allow of major component, silicon and unused dopant is the final contact material. Alternatively, a self-doping electrode may be formed from an unalloyed metal applied to a silicon substrate. The metal and substrate are heated to a temperature above the metal-silicon eutectic temperature in an ambient gas into which a source of vaporized dopant atoms has been introduced. Dopant atoms in the ambient gas are absorbed by the molten mixture of metal-silicon to a much greater extent than they are absorbed by the solid silicon substrate surfaces. The temperature is then decreased to below the metal-silicon eutectic temperature. During this temperature decrease, the doped regrown silicon layer and the metal-silicon alloy final contact material are created in the same process as described above.

Description

METHOD AND APPARATUS FOR AUTOCONTAMINATING ELECTRODOS- NEGATIVE AND POSITIVE. OF SOLAR SILICON CELLS AND OTHER DEVICES FIELD OF THE INVENTION The present invention relates to metal contacts to silicon solar cells and other silicon devices, where the contact material includes a supply of contaminating atoms (impurities), thus acting as its own source of contaminants, to facilitate the formation of a low resistance ohmic contact between the contact material and the silicon.

BACKGROUND OF THE INVENTION In a properly designed solar pn junction cell, the electrons are moved to the metal electrode, which contacts the n-type silicon, and the voids move to the metal electrode, which makes contact with the silicon of type p. These contacts are vitally important in the performance of the cell, since they force the current through the high-strength silicon / metal interface or through a high-resistance electrode material and rob the useful power of the cell. The total resistance in specific series of the cell, which includes the material of the interfaces and of the electrodes, must not be greater than 1 O-ctn2. The need for a low resistance contact places a clear demand requirement on the concentration of the polluting atoms on the semiconductor surface. For n-type silicon, this concentration of the contaminant must be > 1 x 1019 atoms / cm3 (which is 200 parts per million atomic (ppma), based on a silicon density of 5 x 1022 atoms / cm3). For p-type silicon, the requirement is less severe, with a surface concentration of > 1 x 1017 atoms / cm3 (2 ppma) being required. Also, to maximize the electrical efficiency of a solar cell, it is often desirable to have a lower surface contamination concentration at all sites, except directly below the metal electrode. Thus, it is convenient that the contact material has the following properties: the ability to supply a liberal amount of impurities to the silicon, immediately below it (also known as self-contamination), to have high electrical conductivity, to perform a mechanically strong bond to silicon, not to degrade the electrical quality of silicon, by the introduction of sites where electrons and holes can be lost by recombination, be cheap and bring itself to the application by means of an economic process (such as by the printing of screen) . A known contact material, which has, to a significant extent, the desired properties, described above, is aluminum. Aluminum possesses these properties when used for the contact of p-type silicon, and, therefore, to form the positive electrode in a silicon solar cell. This is due to the fact that aluminum itself is a p-type contaminant in silicon. Aluminum can contaminate silicon, as part of an aluminum alloy process with silicon, with the condition that at process temperature it exceeds the eutectic temperature of aluminum-silicon of 577 ° C. The phase diagram of aluminum-silicon is given in Figure 1. The vertical axis of Figure 1 is the temperature in degrees centigrade, while the horizontal axis is the percentage of silicon. The horizontal axis has two scales: a lower scale of the percentage of silicon (atomic) and a higher scale of silicon percentage (by weight). Figure 1 indicates a eutectic point 102 at 577 ° C with 12.5% Si and 87.5% Al (by weight). Line 100 indicates 577 ° C and, therefore, eutectic point 102 lies on this line. While the numbers directly below point 102 indicate 11.3% (atomic) and 11.7% (by weight) of the Si at the eutectic point, more accurate data from the graphic details 101 indicate that it is 12.1% (atomic) and 12.5% (in weigh). You can see from curve 103 (which rises to the right from point 102) thatAs the temperature increases further above the eutectic point, the percentage of Si, which can be maintained in a molten mixture of Si and Al, also increases. Alloy aluminum and silicon at a temperature above the eutectic temperature produces: (i) a silicon region almost on the surface, which is adequately contaminated with aluminum for low contact resistance, (ii) an electrode material which has an eutectic aluminum-silicon composition with a sufficiently high electrical conductivity, to carry the solar cell currents and (iii) excellent adhesion between the eutectic conductor and the silicon substrate. Aluminum is also a cheap material, which can be applied by screen printing, using commercially available pastes. For conventional solar cell structures, the lack of a material comparable to aluminum, for the n-type silicon contact, in order to form the negative electrode of a solar cell, also makes it difficult to manufacture a simple solar cell, effective cost. In a conventional solar cell structure, with a p-type base, the negative electrode (which makes contact with the n-type emitter) on the front side (illuminated from the cell, and the positive electrode is on the rear side. In order to improve the energy conversion efficiency of such a cell, it is desirable to have a dense contamination under the n-type silicon metal contact and light contamination between these contacts, a resource that has been employed to achieve this, termed " Post-Etching Emitter "is to start with the dense contamination on the entire front surface and then burn away the part of the emitter, after the contact metal has been applied, such a subsequent engraving process is time consuming and difficult to control, since the densely contaminated layer is usually only «0.3 μm deep. The "emitter" is known in the art of solar cells as a thin layer that is contaminated in order to create a rectification junction (also known as "p-n"), capable of generating electric current in the illumination. The "base" is that region that forms the other half of the p-n junction and, therefore, is contaminated to be a type of semiconductor, as opposed to that of the emitter. The base extends from the limit of the region of the emitter to those contacts that make the ohmic electrical connection with the base. The emitter is thin with respect to the base. Thus, the conventional structure of the silicon solar cell currently suffers from either an increased process complexity (to remove the n + layer) or a loss of performance (if the n + layer remains) due to the opposite demands for high contamination density under of contact metal and low contamination density between contact metal areas.

COMPENDIUM OF THE INVENTION The present invention is directed to a combination of materials and process conditions, which produce a self-contamination electrode. The self-contamination electrode is formed primarily of a metal (main component), which forms a eutectic point with silicon. A contaminant is then alloyed with the main component. A relative composition of the main component to the contaminant is selected, so that the alloy formed is: i) a solid, simple, uniform phase and ii) transitions directly to a liquid phase. If a p-type contamination is desired, the pollutant alloyed with the main component is selected from Group III of the Periodic Table, if a type n contaminant is desired, the pollutant alloyed with the main component is selected from Group V of the Periodic Table. The alloy of the main component and the contaminant can be applied to the silicon substrate by electronic deposit or, if a paste is used, by screen printing. In the screen printing paste, each individual particle is itself an alloy of the main component and the contaminant. Once applied, the alloy and the substrate are heated to a temperature above the eutectic temperature of the main component, so that: i) the main component liquefies more than the eutectic proportion of the silicon substrate and ii) the alloy of the main component and the pollutant is melted, at least partially. The temperature is then decreased towards the eutectic temperature. As the temperature decreases, the molten silicon is reformed through the liquid phase epitaxially and while doing so, the polluting atoms are incorporated into the regrowth grid. Once the temperature falls below the eutectic temperature of the main component - silicon, silicon, which has not been reincorporated into the substrate through the epitaxial regrowth, forms a solid phase alloy with the main component and the rest of the contaminant not used. This alloy of the main component, silicon and contaminant not used is the final contact material. This final contact material is composed of eutectic proportions of the silicon and the main component. It is expected that under the eutectic proportions there is significantly more main component than silicon in the final contact material, thus ensuring a good electrical conductivity of the final contact material. Alternatively, a self-contaminating negative electrode can be formed from the non-alloyed Ag (silver), which can be applied to the silicon substrate by either the electronic deposit, screen printing of a paste or by evaporation. Once applied, the Ag and the substrates are heated to a temperature above the eutectic temperature of Ag-Si (but below the melting point of Si) in an environmental gas, in which a source of vapor of P (phosphorus) It has been introduced. Ag liquefies more than a eutectic proportion of the silicon substrate. The P atoms in the ambient gas are absorbed by the molten Ag-Si mixture to a much greater extent than that absorbed by the solid Si surfaces. The temperature is then decreased towards the eutectic temperature. As the temperature decreases, the molten silicon is reformed through the liquid phase epitaxy and while doing so, the contaminant atoms of P are incorporated into the regrowth grid. Once the temperature falls below the eutectic temperature of silver-silicon, silicon, which has not yet reincorporated into the substrate through epitaxial regrowth, forms a solid phase alloy with silver. This alloy of silver and silicon is the final contact material. This final contact material is composed of eutectic proportions of silicon and silver. Under the eutectic proportions there is significantly more silver than silicon in the final contact material, thus ensuring a good electrical conductivity of the final contact material. Instead of silver, other metals are expected (such as tin) are adequate. Other members of the Group V of the Periodic Table can also be used, instead of P, as a contaminant value to form a negative electrode. The members of Group III can be used as a pollutant vapor instead of P, to form a positive electrode. The advantages of the invention will be pointed out, in part, in the description that follows and, in part, will be understood by those skilled in the art of the description or may be learned by the practice of the invention. The advantages of the invention will be realized and obtained by means of the elements and combinations particularly pointed out in the appended claims and their equivalents.

BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are incorporated in, and constitute a part of, this specification, illustrate various embodiments of the invention and, together with the description, serve to explain the principles of the invention. Figure 1 illustrates the aluminum-silicon phase diagram, which is used in accordance with the present invention; Figures 2A-E provide a process for the formation and removal of a n + layer; Figure 3 illustrates the silver-silicon phase diagram, which is used in accordance with the present invention; Figure 4 illustrates the silver-antimony phase diagram, which is used in accordance with the present invention; Figures 5A-B provide a process for using a self-polluting alloy according to the present invention; Figure 6 illustrates the silver-gallium phase diagram that is used in accordance with the present invention; Figure 7 illustrates the electrical characteristics for an IBC solar cell of dendritic band silicon; Figures 8A-E provide a process for the manufacture of IBC solar cells of dendritic band silicon, according to the present invention; Figures 9A-D illustrate a solar cell IBC of dendritic band silicon, constructed in accordance with the present invention; Figure 10 illustrates various curves of the concentration of the contaminant, produced by the points formed according to the present invention, as a function of depth, measured using the technique of secondary ion mass spectroscopy; Figure 12 illustrates the total contaminant density produced by the points formed according to the present invention, as a function of the lateral distance, measured using the extension resistance technique; and Figure 12 provides a linear and, therefore, ohmic I-V curve, measured for the point contacts formed in accordance with the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring now in detail to the preferred embodiments of the invention, the examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used in all the drawings to refer to the same or similar parts.

The lack of a material comparable to aluminum, for the contact of n-type silicon, in order to form the negative electrode of a solar cell, also makes it particularly difficult to manufacture a solar interdigital posterior contact cell (IBC) of cost effective, simple. An IBC solar cell is characterized by having both positive and negative electrodes on the same side of the cell. A densely contaminated n + layer (> 1 x 1019 cm3) necessary to ensure ohmic contact to the negative electrodes of the IBC cell, can act as an electrical bypass between the positive and negative electrodes of the cell. To avoid this problem, the n + layer, between the positive and negative electrodes, must be removed by etching treatment or by etching reactive ions. The sequence of the process for creating the negative electrode for the IBC cell is rather embarrassing, requiring at least five different stages (illustrated in Figures 2A-E). This complexity is the result of the need to create and remove an n + layer. The source 200 of contaminant, such as a liquid containing phosphorus, is first applied to the surface of the silicon substrate 201 (Figure 2A). A source 200 of liquid contaminant can, for example, be applied by rotation on the surface of the substrate 201. The contaminant 200 is partially transferred from the source within the silicon by diffusion in a high temperature stage ("900 ° C) (Figure 2B) to form the n + 202 layer. Removal of the contaminant source 200, to reveal the surface of the silicon substrate 201, follows (Figure 2C). The metal contact 203 is then deposited by some method, such as electronic deposit, evaporation or, if a paste is used, by screen printing (Figure 2D). When the electronic deposit or evaporation is used, the metal film must have a pattern, typically made with a photo-protection process (not shown). If screen printing is used, a second stage at high temperature is necessary (calcined) («700 ° C) at this point to promote silicon contact. Finally, the unwanted layer n +, 202, outside the contact area 203 of the metal, is chemically separated (Figure 2E) to isolate the negative electrode from the positive electrode. The process illustrated in Figures 2A-E has been used to fabricate IBC cells from dendritic band silicon substrates, which use screen printed aluminum, for the positive electrode, and printed silver for the screen materials, negative electrode Such an IBC cell is disclosed in the US patent. Do not. ,641,362 to Meier. In this structure, the interdigital lines have a nominal width of 1000 μm for aluminum and 100 μm for silver, with a gap of 100 μm between lines. The best of such IBC printed screen band cells, such as the one built by EBARA Solar, Inc., of Large, PA, has 2.5 cm2 of area, and has a measured energy conversion efficiency of 10.4% with the cell covered with Isopropyl alcohol to simulate an EVA / Tefzel encapsulation and with the data corrected at 25 ° C.

This cell was fabricated on a band substrate of 8.1 O-cm and 114 μm thick, has phosphorus diffusions on both the front and back surfaces, with an average leaf strength of 28 O / D on each side, a splice aluminum alloy, printed on screen, formed at 800 ° C in a band oven, under an air cover (band furnace manufactured by Radiant Technology Corp or RTC), a negative can electrode, printed on the screen, calcined 750 ° C, in an RTC band furnace under an air cover, and a Ti02 coating against reflection, deposited by the chemical vapor deposition at atmospheric pressure (APCVD). In the cell, the derivation path between the aluminum and silver electrodes was interrupted by the wet chemical etching of the n + layer between the electrodes with acids. The parameters of the solar cell and the illuminated I-V curve for this cell are shown in Figure 7.

The vertical axis of Figure 7 is a current density (J) of the solar cell, expressed as mA by standard units of solar cell area of 1 cm2. The horizontal axis represents the voltage output of the solar cell. As indicated in the upper right corner of Figure 7, the solar cell was tested under a sun illumination (100 mW / cm2) with a spectral content approaching 1.5 Air Mass (AM). The total area of the cell is 2.5 cm2. The Jsc is the short-circuit current density of the solar cell and is where the I-V curve intersects the J axis at 27.9 mA / cm2. Voc is the open-circuit voltage of the solar cell and is where the I-V curve intercepts the V axis at 0.581 volts. The maximum power comes out of the cell when it is operating at a point on the "knee" of the curve. The maximum power point defines a rectangle of real maximum power by: i) drawing a line from the maximum point to the J axis, which is perpendicular to this J axis, and ii) drawing a line from the maximum power point to the V axis , which is perpendicular to this axis V. The theoretical maximum power output of the cell is defined by the theoretical maximum power rectangle created by: i) drawing a line to the right from JSN, which is perpendicular to the J axis, and ii) draw a line up from V, which is perpendicular to the axis V. The extension to which the rectangle of real maximum power fills the theoretical maximum power rectangle, is called the "Factor" of Filling "(FF), which is 0.641 for this cell. This Filling Factor is limited by i) the total specific series resistance of the cell (which should be as close to zero as possible) and ii) the lead resistance between the electrodes, positive and negative, of the cell (which they should be as close to infinity as possible). The efficiency of the cell, which is the percentage of light power converted to electrical power, is 10.4%. Also shown in Figure 7 is the fact that after the alloy, the Al electrodes were 30 μm thick,. while the Ag electrodes were 10 μm thick. Thus, the IBC structure (like the conventional structure of the silicon solar cell, discussed above) currently suffers from an increased process complexity (to remove the n + layer) or a loss of performance (if the n + layer remains) due to the opposite demands for high contamination density below the contact metal and low contamination density between the contact metal areas. The present invention specifies a combination of materials and process conditions, which produces a self-contaminating negative electrode for silicon solar cells, similar in function to the positive self-polluting aluminum electrode, widely used. Experimental results show that a combination of antimony as an n-type contaminant and silver as the primary contact metal, satisfies the basic requirements for a self-contaminating negative electrode. Likewise, these results suggest a clear trajectory to create a positive self-contaminating analogous electrode, which uses gallium and silver, which is superior in several ways to the established aluminum electrode. The use of negative and positive self-contaminating electrodes, both of which are constructed in accordance with the present invention, allows an aerodynamic manufacturing process in which the negative electrode, positive electrode and passivation layer of the silicon dioxide surface , can be formed simultaneously in a single stage at high temperature. Such a process is defined below for an IBC cell. The silver-silicon phase diagram is given in Figure 3. The vertical axis of Figure 3 is the temperature in degrees centigrade, while the horizontal axis is the percentage of silicon. The horizontal axis has two scales: a lower scale of the percentage of silicon (atomic) and an upper scale of the percentage of silicon (by weight). Figure 3 shows a eutectic point 301 at 830 ° C, with 95.5% Ag and 4.5% Si (by weight). The eutectic point 301 lies on line 300, which indicates a temperature of 830 ° C. Curve 302 (which rises to the right from point 301) indicates that as the temperature rises above the eutectic point, the percentage of Si that can be maintained in a molten mixture of SI and Ag also increases. Note the similarity of Figure 3 to the aluminum-silicon phase diagram of Figure 1. In both cases, the metal forms a eutectic point with silicon (eutectic temperature of 577 ° C for aluminum and 830 ° C for silver). Silver, therefore, is capable of dissolving silicon at temperatures above 830 ° C, and then allowing silicon to recrystallize by the epitaxy of the liquid phase upon cooling, in analogy to the behavior of aluminum. However, unlike aluminum, silver is not a contaminant in silicon, so a contaminant, some of which remains in silicon in epitaxial regrowth, must be added to silver. Antimony is the contaminant of choice, due to its high solubility in silicon, its low cost and the fact that an alloy of antimony and silver exists as a simple and uniform phase for low concentrations of antimony. This can be seen from the diagram of the silver-antimony phase of Figure 4. The vertical axis of Figure 4 is the temperature in degrees centigrade, while the horizontal axis is the percentage of antimony. The horizontal axis has two scales: a lower scale of the percentage of antimony (atomic) and a higher scale of the percentage of antimony (by weight). In particular, an alloy of 5% Sb and 95% Ag, by weight, falls within the single phase region 400 (the phase is a solid) (also labeled as a) in Figure 4. The 400 region is limited on the left by the temperature axis and on the right by the lines 401 and 402. The phase changes of a 5% alloy of Sb, with respect to temperature, are represented by the line 404. As can be seen, line 404 remains within region 400 until the temperature exceeds 790 ° C and thus crosses line 402. Therefore, such alloy remains solid and uniform until melting starts at 790 ° C. Above line 402 on line 404, but below line 403, the alloy is a mixture of two phases of solid and liquid. When line 404 reaches line 403, at 920 ° C, the alloy is completely liquid. The two key aspects of the phase changes of the Sb-Ag alloy, and the reason for choosing a concentration of 5%, are that: i) it is a uniform solid until the fusion starts and ii) it makes transitions from a uniform solid to a fusion phase. The silver-silicon eutectic composition is 95.5% silver and 4.5% silicon, by weight. This eutectic relationship of silver-silicon provides a way to determine the amount of silicon that a given thickness of silver will dissolve and thus provides a means to estimate the depth of the junction between the epitaxially increasing silicon and the underlying unchanged silicon substrate. It is the silicon that epitaxially increases that forms the n + region when an alloy of Sb and Ag is used. The ratio of the thickness of the dissolved silicon (tSl) to the thickness of the deposited silver (tAg) at an alloy temperature (T) is given by: (tß,) (tAg) = (PAg) / (P8 -) * [Wß, (T) / (1-Ws, (T))] (1) Where pAg is the density of silver (10.5 g / cm3), psi is the density of silicon (2.33 g / cm3) and wSl (T) is the percentage by weight of silicon at the temperature of the process. With yes (T = 900 ° C) of 0.04 from the phase diagram, the thickness ratio is calculated from equation (1) and is 0.19. For example, a silver layer of 10 μm thickness will dissolve 1.9 μm of silicon at 900 ° C and create a splice depth (with respect to the original surface of the silicon substrate) of 1.9 μm in the epitaxial regrowth. The density of contamination in the regrowth layer can be estimated if a segregation coefficient for antimony is assumed (ratio of the concentration of antimony in the solid that grows to the concentration of antimony in the liquid). The segregation coefficient for antimony from a Czochralski silicon melt at 1415 ° C is 0.023. The molten material under consideration here has a composition, expressed in atomic percent of about 76% silver, 20% silicon and 4% antimony, and is at 900 ° C. However, since silver is not accepted in the silicon grid to any appreciable extent, the incorporation of antimony can, in a first approximation, be assumed to be independent of the presence of silver. In any case, the expected concentration of impurities of antimony in silicon is estimated to be: where ksb is the antimony segregation coefficient (estimated to remain at 0.023 for the epitaxial regrowth of the liquid phase from 900 ° C), fsb is the fraction of atoms in the molten material, which is antimony (0.04) and the NSl is the density (atomic) of the silicon atoms in the solid (5 x 1022 cm "3) Thus, the concentration of impurities of antimony in the solid that grows (Nsb) is estimated to be 5 x 1019 cm" 3 . This value exceeds the minimum required (1 x 1019 cm "3), to facilitate an ohmic contact to n-type silicon.

The simple sequence required in executing the invention described is shown in Figures 5A-B. A homogeneous alloy (single phase) 500 comprising: i) a metal with a high electrical conductivity (main component) and ii) a n-type contaminant of Group V of the Periodic Table is formed. This alloy 500 is deposited on the surface of a n-type silicon substrate 501, as shown in Figure 5A. The alloy 500 can be deposited by a variety of standard methods, such as by electronic deposit or, if a paste is used, by screen printing. The alloy 500 must be able to dissolve some silicon, during its process of alloying with silicon, so a molten combination of conductive metal, polluting atoms and silicon is formed at the process temperature. Upon cooling, the silicon increases epitaxially from the molten mixture, and the impurity atoms are incorporated into the silicon that grows at a sufficient concentration to create an n + 502 region of Figure 5B. This region n + 502, which is created only below alloy 500, produces an ohmic contact. Because the fresh silicon is exposed in this process, the adhesion of the final contact material 503 (which has gone from being an alloy 500 of Ag and Sb in Figure 5A to an alloy 503 of Ag, Sb and Si in the Figure 5B) to the n + 502 region of the silicon substrate (the region which has been contaminated with the Sb) is expected to be quite good. Like alloy 500 of Figure 5A, alloy 503 of Figure 5B is still mostly Ag. The preferred conductive metal of this invention is silver and the preferred impurities are antimony. In addition to its high electrical conductivity, silver has the desired property that its oxide is unstable at temperatures only modestly high above ambient temperature. This means that the alloying process of Figure 5 will provide contact with an oxide-free surface, even if the alloy is made in air or oxygen. The contact of the oxide-free silver is very suitable for welding, when the cells are interconnected to form a module. In addition, the formation of a self-contaminating negative electrode at a temperature in the range of 800 to 1000 ° C means that its formation can be combined with the creation of a thermal oxide layer that grows on the exposed silicon substrate. This oxide layer will serve to passivate the silicon surface, thus reducing the loss of photogenerated electrons and holes by recombination on the surface. The invention is not limited to making contact with n-type silicon. Since the highly conductive component of the contact system (eg silver) is selected for its ability to alloy with silicon, the impurities that are added to this component can be any Group V metal (n-type silicon contact). ) or from Group III (contact with p-type silicon). The examination of the binary phase diagrams, each illustrating the combination of a Group III element with a silver, suggests that the gallium or the indium will function similarly to antimony. Because gallium has a greater segregation coefficient than indium (0.0080 compared to 0.0004) and a narrower energy level at the edge of the valence band (0.065 eV compared to 0.16 eV), gallium is He prefers over the Indian. Using the methodology developed for equation (2), and assuming that the (atomic) fraction of 0.04 of the gallium in the molten material, the estimated concentration of gallium in silicon that increases is 2 x 1019 cm "3. significantly the minimum of 1 x 1017cm "3 required for ohmic contact to p-type silicon. The phase diagram for the silver-gallium system is given in Figure 6. The vertical axis of Figure 6 is the temperature in degrees centigrade, while the horizontal axis is the percentage of gallium. The horizontal axis has two scales: a lower scale of percent of gallium (atomic) and an upper scale of percent of gallium (by weight). Figure 6 shows that a composition of 5% Ga and 95% Ag (by weight) falls within a single phase region 600. This region 600 is limited on the left by the temperature h and on the right by the lines 601, 602 and 603. The phase changes of a 5% Ga alloy, with respect to the temperature, are represented by the line 605. As can be seen, this line 605 remains within region 600 until the temperature exceeds 800 ° C and thus crosses line 603. Therefore, such an alloy remains as a uniform solid until melting begins. 800 ° c. Above line 601, but below line 604, the alloy is a mixture of two phases of solid and liquid. When line 605 reaches line 604, at 900 ° C, the alloy is entirely liquid. Notice the similarity of Figure 6 to the silver-antimony phase diagram of Figure 4 in that for both, high silver alloys, the alloy is a uniform solid until fusion starts and the alloy performs transitions directly from a uniform solid to a fusion phase. A process for manufacturing IBC cells, which uses self-contaminating negative and positive electrodes, on a silicon substrate, such as dendritic band silicon, is as described in the following 6-stage process, also illustrated by Figures 8A-E. 1. Spread a n + 801 layer on the upper side (or looking at the light) of the silicon substrate 800 of any type of conductivity. Figures 8A-E refer to the case of a n-type substrate. In the case of dendritic band silicon, it is possible to make n + contamination during crystal growth using a solid flat diffusion source (phosphorus diffusion in itself) as described in the US Patent Application, entitled In Situ Diffusion of Dopant Impurities During Dendritic Web Growth of Crystal Ribbon (Dissemination of contaminating impurities in the growth of dendritic band of the crystal ribbon), Serial No. 08 / 725,454, filed on 4 / X / 96, to Balakrishnan R. Otherwise, it can be done by screen printing a phosphorus paste or by applying a liquid phosphorus contaminant to the upper side of the substrate and driving the phosphorus inside the silicon at a temperature of 800 to 1000 ° C, in a unit of rapid thermal process (RTP) or some other furnace.

When separating the diffusion glass from the upper part of the substrate (this glass is n result of the phosphorus contaminating liquid or paste of stage 1), printing screen on the posterior side (side without phosphorus diffusion) a silver paste- gallium and dried at • * 200 ° C. The silver-gallium paste is represented in the regions 802-805 in Figure 8B.

Print on the screen a silver-antimony paste (represented in the 806-808 regions in Figure 8C) on the back side in an interdigital pattern, and "burn and separate" the organic binders from both the silver-gallium and the silver-antimony, a «400 ° C.

Form simultaneously the self-polluting positive electrode (Ag-Ga), the self-contaminating negative electrode (Ag-Sb) and the pn junction (Ga for the non-Sb base for the p base), while a thermal oxide (Si02) grows to passivate exposed silicon surfaces.

This process can be accompanied in an RTP at «900 ° C for 2 minutes in oxygen. In the case of a n-type silicon substrate, a p * n junction is formed between the p + emitter created by the positive self-contaminating electrode and the n-type substrate. In the case of a p-type silicon substrate, a n * p junction is formed between the n + emitter created by the self-contaminating negative electrode and the p-type substrate. That simultaneous training stage is represented in Figure 8D. As can be seen, the 802 region of silver-gallium paste forms the 810 p + region on the n-type substrate 800 and thus creates a splice p * n. The same process occurs in the 803-805 pasta regions. The 806 region of silver-antimony paste forms an n + 811 region in order to make the ohmic contact with the substrate 800 of type n. All Si areas exposed also form layers of Si02. In particular, the 801 n + layer of the upper side is covered with an oxygen layer 809. In addition, the oxide layer 812 is formed on the exposed silicon between the 805 region of silver-gallium paste and the 808 region of silver paste. -antimony. The same process occurs in the other exposed silicon areas that exist between the 802-804 silver-gallium paste regions and the 806-808 silver-antimony paste regions.

Deposit a coating 813 against reflection (for example, Ti02 by the chemical vapor deposition at atmospheric pressure) on the front (side without metal contacts) of the cell. Note that the coating does not cover the metal contacts, since they are on the opposite side.

Solder tabs for interconnection to the positive and negative electrodes, based on silver, free of rust, to interconnect cells in a module. Following step 4, the paste 802-805 regions of silver-gallium paste are now (with the exception of the gallus that was deposited as impurities in the epitaxial regrowth of the substrate), alloys of Ag, Si and Ga. Also following step 4, the 806-808 silver-antimony raisin regions are now (with the exception of antimony, which was deposited as impurities in the epitaxial regrowth of the substrate) alloys of Ag, Si and Sb.

Figures 9A-D illustrate a completed IBC cell, constructed in accordance with steps 1-6 above, but using aluminum to form positive electrodes. Figure 9A illustrates the general structure of an IBC cell. There is an upper side (or looking at the light) 800 which is not obstructed by the electrodes. The rear side of the cell contains both the positive electrodes, which are connected together by the bus bar 901, and the negative electrodes, which are connected together by the bus bar 902. FIG. 9B illustrates a cross section of the IBC cell in the cutting line 914 of Figure 9A. As can be seen in Figure 9C, which illustrates a close-up view of a region of Figure 9B, the cross section comprises alternate positive wide electrodes of the eutectic type of aluminum-silicon (such as 906, 907) and narrower negative electrodes of silver-silicon-antimony alloy (such as 910). The oxide has formed on the exposed silicon, between the positive and negative electrodes, as shown by the 909 region. The aluminum has positively contaminated the 903 substrate to create the splices of p * n, as shown by the p + 904 regions and 905, while the silver-antimony has negatively contaminated the substrate, as shown by region n + 908. As can be seen in Figure 9D, which illustrates another approaching view of a region of Figure 9B, the upper side of the IBC cell is a shell construction, from the top to the bottom, of an anti-reflective coating 911 of Ti02, the passivation layer 912 of Si02, the anti-recombination layer 913 of n + and the substrate 903 of the n-type. However, the disadvantages of using aluminum to form positive electrodes are that the resulting aluminum-silicon eutectic contact material is not as electrically conductive as silver-silicon, the surface of aluminum can not be welded and this aluminum surface It also oxidizes. The process of steps 1-6, described above, can also be used to guide the use of electrodes, negative and positive, self-contaminants, in a conventional solar cell structure. Other impurities, such as arsenic (a n-type pollutant) and indium (a p-type contaminant) can be considered for the silver-based system.

In addition, silver can be replaced with other conductive metals that can be alloyed with silicon, such as tin. However, tin is not as conductive as silver and has an oxide which occurs when cooled from typical process temperatures ("900 ° C). This suggests that a tin-based contact system will be inferior to a silver-based system, with respect to series resistance and weldability. Contacts based on silicon gold have been used in the past. The eutectic temperature of the gold-silicon is low (370 ° C). However, for solar cells, the contact process of gold at elevated temperatures is known to severely degrade the lifetime of the minority carrier, the most important property in a solar cell. This means that, unlike silver, contact contamination based on gold is not compatible with the simultaneous oxidation of the silicon surface, since such oxidation must be done at a temperature above 800 ° C. At these temperatures, gold diffuses greatly through silicon to severely degrade the life span of the minority carrier. In addition, it is not practical for solar cells, due to its high cost.

II. EXPERIMENTAL RESULTS A study of the systems of representative materials for the invention, described above, will be carried out. Included in the study: the use of a variety of deposit methods (electronic deposit or screen printing), the use of a variety of high temperature processes (fast thermal process or band furnace process with radiant heating), the characterization of the materials produced (which determines the composition of the silicon layer that increases epitaxially and the microscopy for evidence of the alloy) and the electrical characterization (determination of the current-voltage curve for a simulated contact and the determination of the resistivity of the contact material). The results confirm that the present invention is suitable for forming self-contaminating contacts for a variety of silicon devices, and is particularly suitable for the structure of post-contact, interdigital, high-performance, low-cost contact cells as described. . These results of this study are presented below.

HE HAS. RESULTS OF THE ELECTRONIC DEPOSIT IIA.l. CONSTRUCTION OF THE TEST STRUCTURES Metal films, containing n-type Sb impurities, were electronically deposited on n-type CZ silicon wafers (1 x 1015 cm "3), slightly contaminated (7.62 cm diameter, orientation < 111>, contaminated with phosphorus at 3-15 O-cm, 330-432 microns thick.) The compositions required for electronic deposit targets were 95% Ag-5% Sb, and 93% Ag -2% of Ti-5% of Sb (by weight). (However, the measured composition of the film deposited from the Ag-Sb target was found to be 98.9% Ag and 1.1% Sb (by weight), rather than 95% of Sb and the 5% of Ag desired, as discussed below.) The nominal thickness for Ag-Sb and Ag-Ti-Sb films was 1.6 and 1.2 μm, respectively. was done in a ULVAC RFS-200 unit Before starting the electronic deposit, the chamber was pumped at a pressure below 5.0 x 10"6 Torr. This electronic deposit was made in a pure Ar atmosphere, at a pressure of 1 Pa (7.5 x 10"3 Torr) and a power of 150 W, with a substrate at the target distance of 40 mm. Sb and Ag-Ti-Sb, the time of the electronic deposit was 25 minutes and the substrates were heated to 300 ° C in an attempt to achieve an improved adhesion between the film of the electronic deposit and the substrate of the wafer.

In order to test the electrical characteristics of the contact formed by the present invention, at the front of the wafers, a liquid phosphorus contaminant (Filmtronics P-507, undiluted) was rotated on the back of the wafers. These wafers were then heat treated in a AG Associates HeatPulse NMG-01 Rapid Thermal Processing Unit (RTP), at a temperature of 900 or 950 ° C in pure Ar, for two minutes. The purpose of the heat treatment was the alloy of the Primary metal (Ag) on the front of the wafer, with silicon, and spread the phosphorus contaminant on the back of the wafers simultaneously. The alloyed front metal was protected with the photo-protector, while the subsequent diffusion glass was recorded in HF. Upon removal of the photo-protector, a metal contact was formed by evaporating the Ti / Pd / Al layers (0.06 / 0.05 / 2.0 μm) on the back. The Ti layer was first evaporated so as to make direct contact with the SI, followed by the Pd and then the Al. Therefore, the desired final test structure, from the top to the bottom, comprises the following layers: ) the front metal and the silicon alloy (formed of the metal alloy with impurities of Sb of the present invention, which formed a eutectic alloy with silicon), ii) the n + region (formed of Sb, of the metal alloy) with impurities of Sb, according to the present invention, which contaminates the Si of the epitaxial regrowth of the liquid phase, iii) the n-type substrate, made of type n of the light phosphorus contamination of the original wafer, iv) the n + region (formed of the phosphorus pollutant placed by rotation) and v) the contact in layers of the subsequent metal (Ti / Pd / Al evaporated). For a test wafer, the composition of its metal alloy film with impurities of Sb, as deposited, electronically deposited from a nominal target of 95% Ag-5% Sb, was measured using the electron probe for the technique of microanalysis (EPMA). The concentration of Sb was found to be only 1.1% (by weight) in the film, rather than the expected 5%, this discrepancy may be due to the fact that the electronic deposit target is deficient in Sb or it may be because the Sb supply of electronic deposit is considerably less than that for Ag. Since the concentration of Sb in the film, as deposited, is lower than specified, the concentration of Sb remaining in Si of epitaxial regrowth, then of the alloy, it will also be correspondingly smaller. Ag comprises the rest of the film, as it was deposited, at 98.9% (by weight). During the RTP process of several wafers, the metal of Ag-Sb or Ag-Ti-Sb has the tendency to agglomerate into small metal islands or "points", so the contact is not uniform. However, large areas of continuous contact occurred equally. These areas of continuous contact, which are reasonably uniform in thickness, are as large as 1 cm2. In hindsight, the occurrence of agglomeration is not surprising, since the Ag-Sb phase diagram (Figure 4) shows, for example, that 5% (by weight) of the composition of Sb begins to melt at 790 ° C and it melts completely at 920 ° C. The Ag-Si eutectic is not formed until 8830 ° C. Since the RTP process for Ag-Sb or Ag-Ti-Sb was made at 900 ° C or 950 ° C, the contact metal may also have been melted and agglomerated by the surface tension before appreciable metal interaction occurs. and the silicon substrate. When the points are formed, as opposed to the large continuous areas, the lateral dimensions of the metal islands or "points" of the Ag-Sb samples often vary from 200 to 700 μm, comparable to the thickness of the wafer (360 μm) and the points were 15 μm thick. Since the thickness of the initial Ag-Sb metal was 1.6 μm, an equivalent thickness of 15 μm of the spots in certain regions of the substrate after the alloy, suggests that these regions have approximately 11% of their area covered with dots of metal, with the remaining 89% not provided with metal.

The optical images at 100% of the metal points of Ag-Sb or Ag-Ti-Sb clearly showed that these contact metals have inter-acted with the silicon substrate. The boundaries of the metal points often have triangular or hexagonal configurations, which reflect the influence of the silicon surface < 111 > . The samples where the contacts are in the form of isolated points, were studied in greater detail than the larger continuous areas, since the contact and non-contact areas are well defined for the points.

II.A.2. DETERMINATION OF IMPURITY CONCENTRATIONS Certain of the alloyed Ag-Sb points were removed by the chemical etching, and the composition of the underlying Si that epitaxially increases was measured from the silicon surface at a depth of approximately 5 μm by the spectroscopy technique of secondary ion mass (SIMS). The results are shown in Figure 10. Do almost superimposed curves are shown for the Sb and the P (phosphorus). The curves 1001 for P and 1002 for Sb represent the detection of the ion itself (for example of Sb), while the curves 1000 for P and 1003 for Sb represent the detection of the molecular ion (for example, Sb + Si). Silver is also present and is represented by curve 1004. The vertical scale of Figure 10 is the concentration of impurities in atoms / cm3, while the horizontal scale is the depth of the silicon surface in microns. As you can see, the depth of the silicon layer that is increasing is around 3.4 μm, since it is the depth at which all the concentrations of impurities fall out precipitously. This implies a metal point height of 18 μm (3.4 μm / 0.19), when calculated from Equation (1), which is, in fact, approximately the observed height. The SIMS profile indicates an average of the concentration of Sb d approximately 2 x 1018 cm "3 across the growth region.This value is a factor of 5 less than the desired minimum value of 1 x 1019cm" 3 required for a Ohmic contact to n-type silicon. However, the concentration of Sb in the electronically deposited film (as discussed above) was also lower than desired by a factor of five (1.1% rather than 5%, by weight). This means that a metal film having the desired concentration of Sb (5%, by weight) will produce a concentration of impurities sufficient for good ohmic contact (1 x 1019 cm "3) Thus, SIMS data supports this approach to produce a negative self-polluting contact to silicon.

An unexpected result of the SIMS profile is the high concentration of P (4 x 1019 cm "3 up to 2 x 1020 cm" 3) in the silicon regrowth layer. The source of this P must be the liquid contaminant that spins on the opposite side of the wafer, as described above. The P contaminant was applied to promote the ohmic contact on the back side of the wafer (the P diffusion on the back side of the wafer tries to occur simultaneously with the alloy between the Si and the Ag-Sb at the front), so the Current-voltage characteristics of the Ag-Sb to Si contact can be measured. It seems that some of the P of that contaminated layer is transported during the RTP process around the front of the wafer, where it was absorbed by the metal incorporated into the Si. The original contamination of SI substrates with P is slight (1 x 1015cm "3, as determined by the resistance resistance contaminant measurements, discussed below), and may not have been a source for the large amount of the contaminant. P detected by the SIMS The surface of the Si in addition to the metal point was also contaminated to a limited extent (7 x 1018 cm 3 surface concentration, as indicated by the measurements of resistance to extension, also discussed below), but it is a factor of more than 1000 less than the P contaminant found in the regrowth layer. Thus, the regrowth layer was found to be more than adequately contaminated for ohmic contact, but only 2% of the polluting atoms are of Sb, while 98% are of P. Although this contamination with the P was not attempted and not expected, it can be exploited as an alternative resource to create a self-polluting contact. To summarize the process described above to contaminate with P and create a n + self-polluting contact to n-type silicon, it is as follows: 1. Apply the P contaminant (a liquid contaminant applied by rotation as described above, but other methods , such as the paste that can be printed on the screen, it is expected to work equally well) on the front side of a n-type silicon substrate and dry. 2. On the back side of the silicon substrate, in those regions where a n + contact is desired, apply Ag (Ag deposited electronically, as described above, but other methods, such as Ag paste, which can be printed on the screen , it is expected to work equally well) and place the substrate in a heating furnace. While a mixture, by weight, of 1.1% of Sb and 98.9% of Ag, is actually applied in the process described above, it is expected that the presence of Sb is irrelevant with respect to the process described herein whereby P acts as a pollutant. Raise the temperature of the silicon substrate, which is surrounded by an environmental gas from the heating furnace, to a value where the Ag alloys with the silicon and where the P pollutant evaporates. The environmental gas used before is pure Ar, however other inert gases are expected to be acceptable. Also, depending on whether oxidation of the exposed silicon surfaces is desired, oxygen can be mixed in the ambient gas. The heating temperature, described above, is 900 or 950 ° C, but temperatures in the range of 850 to 1000 ° C are expected to be acceptable. The mixture of evaporated P atoms with the environmental gas of the heating furnace and some of them travel to the molten Ag, where they are absorbed by this Ag. The temperature is maintained for a long enough time to allow an adequate amount of polluting atoms is absorbed by Ag, but not so long to allow the silicon surface adjacent to Ag to be absorbed in a significant amount of polluting atoms. In the process described above, the heating time is two minutes.

. The temperature of the silicon substrate is then decreased below the eutectic temperature of Ag-Si and as the Si re-solidifies, through the epitaxy of the liquid phase, the polluting atoms of P are incorporated in the reformed grid.

This 5-step process can be generalized as a process to create n + self-polluting silicon contact as follows: 1. On a first side of a silicon substrate, in those regions where a n + contact is desired, apply the Ag and place the substrate in a heating oven; 2. Raise the temperature of the silicon substrate, which is surrounded by an environmental gas from the heating furnace, to a value above the eutectic temperature of Si-Ag, so that the Ag forms an alloy fused with silicon. 3. Introduce a source of P vapor in the environmental gas of this heating furnace. 4. The vaporized P atoms are then mixed with the ambient gas from the heating furnace and some of them travel to the molten Ag, where they are absorbed by the molten Ag-Si mixture to a much greater degree than they are absorbed by the surface of the solid Si.

. The temperature is maintained for a sufficiently long time to allow an adequate amount of the polluting atoms to be absorbed by the Ag, but not so large as to allow the silicon surface adjacent to the Ag to absorb a significant amount of polluting atoms; and 6. the temperature of the silicon substrate is then decreased below the eutectic temperature of Ag-Si and as Si re-solidifies, through the epitaxy of the liquid phase, the contaminating P atoms are incorporated in the reformed grid .

The above process can be generalized even more. While the P is used as the contaminant source, atoms of Group III contaminants from the Periodic Table (such as boron, gallium or indium) can be used to create a positive contact while the Group V contaminant atoms (such as such as arsenic or antimony, in addition to phosphorus) can be used to create a negative contact. While Ag is described as the contact metal, other metals (such as tin) are expected to also work. The method of applying the metal to the silicon surface can be any of several methods, including evaporation, electronic deposit or screen printing.

A BC structure can be formed by the following steps: 1. Apply the P-pollutant (for example using a liquid contaminant or a paste that can be printed on the screen) to the front side of a n-type silicon substrate, and dry. 2. Print on the grid lines of the Ag on the back of the substrate and dry. 3. Raise the temperature to approximately 850 to 1000 ° C (above the eutectic temperature of Ag-Si of 830 ° C) for several minutes, to simultaneously: i) create the desired n + layer in the front, i) create a molten mixture of Ag and Si, and iii) make some of the P from a source of pollutant front is absorbed by the molten Ag in the upper part. 4. Reduce the temperature below the eutectic temperature of Ag-Si, so that the P atoms are incorporated in the Si layer of regrowth, in order to enable the ohmic contact. 5. Separate the diffusion glass created by the P contaminant on the front side by immersing the substrate in hydrofluoric acid. 6. Print on the screen a self-contaminating positive contact metal (for example Al or Ag-Ga) on the back between the Ag in an interdigital manner. 7. Raise the temperature to approximately 850 to 1000 ° C (above the eutectic temperature of Al-Si or Ag-Si, depending on which self-polluting positive electrode is used) for several minutes, in an inert environmental gas with some oxygen, to simultaneously: i) create the passivation layer of the silicon oxide surface and ii) create a molten mixture of Al and Si or Ag and Si. 8. Decrease the temperature below the eutectic temperature, to simultaneously form: i) a splice p * n and ii) a positive contact of the solar cell; Y 9. deposit an anti-reflective coating on the front surface.

The key idea in all the above sequences is that a conventional source of the P contaminant can selectively deliver this P contaminant to the Ag contact material. Such a process is expected to form a self-contaminating negative contact without excessively contaminating the adjacent silicon surface. to the negative contact. In this way, standard materials are used (liquid contaminant of P, paste that can be printed by Ag screen) and the low resistance of derivation between the negative and positive contacts is avoided.

With respect to the measurement of impurity concentrations in the test structures described in II. A. CONSTRUCTION OF THE TEST STRUCTURES, the extension resistance technique was used in addition to the SIMS technique, described above. The total concentration of the contaminant of Sb and P on the silicon surface was measured by the extension resistance for three points on an alloy wafer with Ag-Sb at 950 ° C, for 2 minutes and also for three points on a wafer alloyed with Ag-Sb at 900 ° C for 2 minutes. The front metal (Ag-Si) as well as the back metal (Ti / Pd / Al) were removed by immersion of the sample in concentrated HN03, for approximately 30 minutes. The areas of the silicon surface that have been previously covered with the Ag-Sb metal were discovered. Explorations of the extension resistance of such a silicon area gives a total surface contamination concentration of approximately 7 x 1016 contaminant atoms / cm3 near the point and approximately 1 x 1020 contaminant atoms / cm3 below the point, as shown in Figure 11 for a representative point. The vertical axis of Figure 11 shows the pollutant concentration in atoms / cm3 (ranging from 1 x 1016 up to 1 x 1021 atoms / cm3) while the horizontal axis is the distance explored through the silicon surface in microns.

These results of the extension resistance indicate that the surface concentration measured in the region previously covered with the Ag-Sb metal exceeds the value of 1 x 1019 contaminant atoms / cm 3 required for the ohmic contact. This is consistent with the low value of the inferred contact resistance of the I-V measurements, as discussed below. Note that the pollutant concentration measured below the point, as measured by the extension resistance, is in accordance with the pollutant concentration measured by SIMS and shown in Figure 10. The fact that the silicon surface near the metal point It is more than three orders of magnitude lower in the pollutant concentration than the silicon surface below the metal point, shows that the contaminant was transported inside the silicon by the metal. The extension resistance was also made for a bevel wafer sample. The density of the substrate contaminant was measured and was 1 x 1015 pollutant atoms / cm3, which corresponds to a resistivity of 5 O-cm, very much in accordance with the value of 4.3 O-cm measured for the starting wafer. Note that the measured surface concentration near the metal point was about 70 times greater than the contamination of the substrate. This may indicate a tendency for the solid Si to absorb P in the gaseous state, although the solid Si absorbs the P in a much smaller extent than the molten metal.

II.A.3. ELECTRICAL MEASUREMENTS The resistivity of the contact material itself (the alloy of Ag, Sb and Si, which is mostly Ag) is important because this parameter determines how large the contacts of the solar cell should be in order to carry the photogenerated current without undue ohmic losses. This resistivity was measured for two points (15 μm equivalent thickness), on a wafer where the Ag-Sb was electronically deposited and then processed at the alloy temperature of 950 ° C, to be 7 ± μO-cm.

This compares favorably with the resistivity measured, in a particular wafer, of the Ag-Sb film, as it was deposited, of 6.9 μO-cm. This resistivity of the contact material also compares favorably with the resistivity measured, in another wafer, of the Ag-Ti-Sb film, as deposited, of 4.8 μO-cm. This suggests that little or no degradation in electrical resistivity results from the alloy with the silicon substrate, probably because the majority of the contact material is Ag (95.5% by weight, as indicated in Figure 3). For comparison purposes, the value in the manual of resistivity for mass Ag is 1.6 μO-cm. It is possible to make electrical contact to individual points of Ag-Sb or Ag-Ti-Sb, using a probe station. The current-voltage curves (I-V) were measured to determine if the point contact was ohmic (linear I-V) or rectifier (non-linear I-V). The resulting IV curves, such as the representative curves of Figure 12, are highly linear at current densities up to the highest measured values (± 11 A / cm2), thus indicating an ohmic behavior for the Ag-Sb contacts (with ten measured points). The vertical axis of Figure 12 is the current density (which varies from -20 to +20 V / cm2) and the horizontal axis is the voltage (which varies from -0.4 to +0.4 volts). The Ag-Sb point of Figure 12 was processed at 900 ° C for 2 minutes, has an area of 0.89 x 10"3cm2 and a normalized resistance of 0.028 ohm-cm2, a current density of 11 A / cm2 is approximately 30 times as large as typical current densities that must be carried by solar cells under sunlight, since Ag is not a contaminant in Si, Sb in Ag (increased by P in the liquid pollutant layer) ) apparently is capable of contaminating the underlying Si of type n, to give the desired ohmic contact.

In particular, the point resistances measured with a probe station varied from 10 to 71 O for the Ag-Sb samples, with such resistances that correspond to the contact areas of points from 1.9 x 10"3 to 0.4 x 10" 3 cm2. The measured resistance of the probe station through a circuit flowing through all the layers of the test structure (as previously described): i) the Ag-Sb point alloyed in eutectic proportions with silicon, ii) the n + region below the point (formed of Sb, of a metal alloy with impurities of Sb of the present invention, and of P of the subsequent contaminant source layer, which contaminates the Si of epitaxial regrowth of the liquid phase), iii) the n-type substrate made of type n of the phosphorus contamination of the original wafer, iv) the n + region (formed of the rotatingly placed phosphorus pollutant) that covers the entire back of the wafer and v) the layered contact The rear metal (Ti / Pd / Al evaporated) also covers the entire back of the wafer. Of these layers, the only significant sources of resistance are: i) the contact resistance between the Ag-Sb-Si point and its underlying n + region, and ii) the resistance of the n-type substrate. The product of the strength and area for the points has an average and standard deviation of 0.026 ± 0.007 O-cm2. This product of resistance-area is compared instructively to the product of the resistivity of the silicon wafer (a value of 3.7 O-cm, previously determined) and its thickness (0.0365) that gives a product of resistance-area of 0.135 O-cm2 . The resistance product-area of the points is smaller than that of the substrate alone (it is around 20% of the value of the substrate) due to differences in the geometry of the current flow. The value of the substrate 0. 135 O-cm2 is based on the current flow, in the corresponding area, being between two flat contacts of equal size. The point value of 0.026 ± 0.007 O-cm2 is based on the current flow that extends from a point of relatively small size at the front of the wafer to the large flat metal contact (Ti / Pd / Al evaporated) that covers the entire back of the wafer. In fact, finite calculations of the element are made to determine the resistance product-substrate area only for a current flow geometry similar to that of the points. These calculations determined that the resistance product-substrate area will only be virtually the same as that measured for the points. These results strongly suggest that the contact resistance between the Ag-Sb-Si point and its underlying n + region is quite low - as an approximate upper limit we can reasonably assume that the contact resistance is less than 10% of the specific resistance measured of the point, that is to say of <3 mO-cm2.

II.B. PRINTING OF DISPLAY WITH PASTES As an alternative to the electronic deposit for the application of the Ag-Sb alloy, a raisin comprising Ag particles and Sb particles, approximately 10 μm in size, was prepared and mixed according to the 95% Ag ratio - 5% Sb, by weight. This mixture of particles was combined with the appropriate organic binders and solvents to form a paste suitable for screen printing. Each silicon wafer used had a diffuse n-type layer of a particular concentration of impurities. As an approximate guide to the concentration of the contaminant n, the leaf resistances of the pre-diffuse n-type layers of the wafers are of approximately three different values: 35, 80, and 500 OO, (with a value of OC indicating a lower concentration of contaminant). A test pattern, of the transmission line method, of parallel metal strips, was printed on the pre-diffuse n-type surface of the silicon wafers (such wafers have no contaminants, such as P, on their side) opposite, as in the case of Section II.A above, RESULTS OF THE ELECTRONIC DEPOSIT), and calcined in a band oven with radiant heating at 950 ° C for two minutes. The metal bands found were 14 μm thick, continuous, have a resistivity of approximately 21 μO-cm, are reasonably adherent to the Si substrate and do not form an alloy with the Si substrate. The transmission line method in the metal test pattern enables a measurement of the specific contact resistances (between the metal strips of Ag-Sb and their underlying n + regions) of 10, 15 and 68 mO-cm2, respectively, for a representative sample immediately after the 950 ° C stage. After the tempering of gas of subsequent formation (standard 3 liters per minute flow of 10% hydrogen and 90% nitrogen, at 400 ° C for 15 minutes, in a conventional quartz tube furnace), the resistance values of contact fell by approximately a factor of six to 1.9, 2.2 and 10 mO-cm2, respectively. Contact resistance values below approximately 50 mO-cm2 are suitable for contacts to solar cells designed to operate under normal sunlight conditions (without concentrating). Although the contact resistance values for the screen-printed metal paste to wafers without a pre-diffuse n-type layer are not satisfactory, the above results show that continuous and adherent metal contacts can be achieved by the screen printing of a paste and the baking of band oven. The analysis of the samples also seems to indicate that this paste, of granules separated from Ag and Sb, does not form an alloy with silicon. However, it appears that the paste creates a very thin n + layer, located around the individual granules of Sb, which accounts for the improved ohmic contacts achieved when the underlying substrate has already been sufficiently contaminated. This type of paste does not seem to be adequate to create a splice. A preferred screen printing paste will be based on particles where each is itself an alloy composition of 95% Ag and 5% Sb, by weight, rather than the Ag particles and separated Sb particles, such as they are used here. It is anticipated that such a paste can form an alloy with silicon and form a highly contaminated region in a manner similar to the results discussed above in Section II.A. RESULTS OF THE ELECTRONIC DEPOSIT. While the invention has been described in conjunction with specific modalities, it is evident that many alternatives, modifications and variations will be apparent to those skilled in the art, from reading the above description. Therefore, it is intended to cover all these alternatives, modifications and variations that are within the spirit and scope of the appended claims and their equivalents.

Claims (72)

1. CLAIMS 1. A method for manufacturing a solar cell, this method comprises: forming a first alloy of a first metal and a first pollutant, in which this first pollutant is capable of contaminating a semiconductive material to be of a first type; applying the first alloy to a first surface of a first semiconductor, in which this first semiconductor has been contaminated to be a semiconductive material of a second type and this second type is opposite to that of the first type; heating the first alloy and the first semiconductor above a first temperature point, so that at least a portion of the first alloy and a portion of the first semiconductor form a second molten alloy; cooling the second alloy, so that at least a portion of the first contaminant, contained in the second molten alloy, is incorporated into an epitaxial regrowing region of the first semiconductor, wherein at least a portion of the epitaxial regrowth region forms a splice of rectification with the first semiconductor and in which at least a portion of the rectifier junction can be exposed to solar radiation that has not passed through the epitaxial regrowth region; cooling the second alloy below the first temperature point, wherein the second alloy becomes a first solid contact with ohmic electrical contact to at least a portion of the regrowth region; and applying an ohmic contact to the first semiconductor, to form a second electrical contact of the solar cell.
2. 2. A method for manufacturing a solar cell, this method comprises: forming a rectifier junction, with a first half and a second half, in a first semiconductor, which can generate an electric current when exposed to solar radiation; form a first contact with an ohmic electrical contact to the first half; forming a first alloy of a first metal and a first pollutant, in which this first contaminant is capable of contaminating a semiconductive material to be of a first type and the first metal is not capable of significantly contaminating a semiconductive material; applying the first alloy to a first region of a first surface of the first semiconductor, wherein at least the first region of the first semiconductor has been contaminated to be a semiconductive material of the first type; heating the first alloy and the first semiconductor above a first temperature point, so that at least a portion of the first alloy and a portion of the first semiconductor form a second molten alloy; cooling the second alloy, so that at least a portion of the first contaminant, contained in the second molten alloy, is incorporated in an epitaxial regrowing region of the first semiconductor, so that the regrowth region is contaminated at a concentration greater than the first region; cooling the second alloy below the first temperature point, wherein the second alloy arrives at a second solid contact with ohmic electrical contact to at least a portion of the regrowth region; and where the second contact has an ohmic electrical contact to the second half.
3. 3. A method for making a contact, this method comprises: forming a first paste, in which this paste comprises first granules, where each granule is an alloy of a first metal and a first contaminant, where this first contaminant is capable of contaminating a semiconductive material; applying the first paste to a first surface of a first semiconductor; heating the first paste and the first semiconductor above a first temperature point, so that at least a portion of the first paste and a portion of the first semiconductor form a second molten alloy; cooling the second alloy, so that at least a portion of the first contaminant, contained in the second molten alloy, is incorporated in an epitaxial regrowing region of the first semiconductor; and cooling the first alloy below the first temperature point, wherein the second alloy arrives at a first solid contact with ohmic electrical contact to at least a portion of the regrowth region.
4. 4. A method for making a contact, this method comprises: applying a first metal to a first region of a surface of a first semiconductor; heating, in an ambient gas atmosphere, the first metal and the semiconducting primar, above a first temperature point, so that at least a portion of the first metal and a portion of the first semiconductor form a second molten alloy; introducing a source of a first vaporized pollutant into the environmental gas, where this first pollutant is capable of contaminating the semiconductive material; maintaining the temperature for a sufficient time to allow an adequate amount of the first vaporized contaminant to be absorbed by the second molten alloy; cooling the second alloy, so that at least a portion of the first contaminant, contained in the second molten alloy, is incorporated into an epitaxial regrowing region of the first semiconductor; and cooling the second alloy below the first temperature point, wherein the second alloy becomes a first solid contact with ohmic electrical contact to at least a portion of the regrowth region.
5. 5. A solar cell, which comprises: a rectifier junction, which can be exposed, at least partially, to solar radiation, for the generation of an electric current, this junction is made of a first semiconductive material;, which comprises a first half and a second half; a first electrode, which makes ohmic contact with the first half; a second electrode, which makes ohmic contact with the second half; where the first half has been contaminated with a first pollutant and will be a semiconductive material of a first type; where the second half has been contaminated with a second pollutant and will be a semiconductive material of a second type, opposite to the first type; where the second half is aligned with the second electrode; wherein the second electrode comprises an alloy of a first metal, the second contaminant and the first semiconductive material; where the first metal is capable of forming a eutectic point with the first semiconductive material; and wherein that part of the second electrode, comprising the first metal and the first semiconductor includes eutectic proportions of the first metal and the first semiconductive material.
6. 6. A solar cell, which comprises: a rectifier junction, which can be exposed, at least partially, to solar radiation, for the generation of an electric current, this junction is made of a first semiconductive material, comprising a first half and a second half; a first electrode, which makes ohmic contact with the first half; a second electrode, which makes ohmic contact with the second half; where the first half has been contaminated with a first pollutant, and which is going to be a semiconductive material of a first type; where the second half has been contaminated with a second pollutant, and it will be a semiconductive material of a second type, opposite to the first type; wherein the second half comprises a first region, which has been more densely contaminated with the second contaminant than at least a portion of the second remaining half; where the first region is aligned with the second electrode; wherein the second electrode comprises an alloy of the first metal, the second contaminant and the first semiconductive material; wherein the first metal is capable of forming a eutectic point with the first semiconductive material, and the first metal is not capable of significantly contaminating the semiconductive material; and wherein that part of the second electrode, comprising the first metal and the first semiconductor includes eutectic proportions of the first metal and the first semiconductive material.
7. 7. The method of claim 1, wherein the first alloy comprises proportions of the first metal and the second contaminant, so that the second alloy is capable of existing as a solid, of a single uniform phase, in a first temperature range, and it makes a transition directly to a liquid phase at a second temperature range, in which this second temperature range is immediately above the first temperature range.
8. 8. The method of claim 2, wherein the first alloy comprises proportions of the first metal and the second pollutant, so that the second alloy is capable of existing as a solid, of a single uniform phase, in a first temperature range, and it makes a transition directly to a liquid phase at a second temperature range, in which this second temperature range is immediately above the first temperature range.
9. 9. The method of claim 3, wherein each granule comprises proportions of the first metal and the second pollutant, so that the second alloy is able to exist as a solid, of a single uniform phase, in a first temperature range, and makes a transition directly to a liquid phase to a second temperature range, in which this second temperature range is immediately above the first temperature range.
10. 10. The solar cell of claim 5, wherein the first metal of the second electrode is in proportion, to a total of the second pollutant of the second electrode and the second pollutant of the second half, so that an alloy, comprising the proportion of the first metal to the total of the second pollutant, be able to exist as a solid, of a single uniform phase, in a first temperature range, and make transitions directly to a liquid phase in a second temperature range, in which this second temperature range is immediately above the first temperature range.
11. 11. The solar cell of claim 6, wherein the first metal of the second electrode is in proportion, to a total of the second pollutant of the second electrode and the second pollutant of the first region, so that an alloy, comprising the proportion of the first metal to the total of the second pollutant, be able to exist as a solid, of a single uniform phase, in a first temperature range, and make transitions directly to a liquid phase in a second temperature range, in which this second temperature range is immediately above the first temperature range.
12. 12. The method of claim 1, wherein said part of the first contact comprising the first metal and the first semiconductor includes eutectic proportions of the first metal and the first semiconductor.
13. 13. The method of claim 2, wherein that part of the first contact comprising the first metal and the first semiconductor includes eutectic proportions of the first metal and the first semiconductor.
14. 14. The method of claim 3, wherein that part of the first contact comprising the first metal and the first semiconductor includes eutectic proportions of the first metal and the first semiconductor.
15. 15. The method of claim 4, wherein said part of the first contact comprising the first metal and the first semiconductor includes eutectic proportions of the first metal and the first semiconductor.
16. 16. The method of claim 4, wherein the temperature is not maintained for such a long period that it allows a surface of the first semiconductor, exposed to the vaporized pollutant, to absorb a significant amount of contaminating atoms.
17. 17. The method of claim 4, further comprising: applying a first contaminant to a second region of a surface of the first semiconductor, wherein the second region is disconnected from the first region; and wherein the heating step further comprises causing the first contaminant to vaporize and thus also accompanying the step of introducing a source of the first vaporized contaminant into the ambient gas.
18. 18. The method of claim 1, wherein the first semiconductor is silicon.
19. 19. The method of claim 2, wherein the first semiconductor is silicon.
20. 20. The method of claim 3, wherein the first semiconductor is silicon.
21. 21. The method of claim 4, wherein the first semiconductor is silicon.
22. 22. The solar cell of claim 5, wherein the first semiconductor is silicon.
23. 23. The solar cell of claim 6, wherein the first semiconductor is silicon.
24. 24. The method of claim 1, wherein the first metal is silver.
25. 25. The method of claim 2, wherein the first metal is silver.
26. 26. The method of claim 3, wherein the first metal is silver.
27. 27. The method of claim 4, wherein the first metal is silver.
28. 28. The solar cell of claim 5, wherein the first metal is silver.
29. 29. The solar cell of claim 6, wherein the first metal is silver.
30. 30. The method of claim 1, wherein the first metal is tin.
31. 31. The method of claim 2, wherein the first metal is tin.
32. 32. The method of claim 3, wherein the first metal is tin.
33. 33. The method of claim 4, wherein the first metal is tin.
34. 34. The solar cell of claim 5, wherein the first metal is tin.
35. 35. The solar cell of claim 6, wherein the first metal is tin.
36. 36. The method of claim 1, wherein the first contaminant is antimony.
37. 37. The method of claim 2, wherein the first contaminant is antimony.
38. 38. The method of claim 3, wherein the first contaminant is antimony.
39. 39. The method of claim 4, wherein the first contaminant is antimony.
40. 40. The solar cell of claim 5, wherein the first contaminant is antimony.
41. 41. The solar cell of claim 6, wherein the first contaminant is antimony.
42. 42. The method of claim 1, wherein the first contaminant is gallium.
43. 43. The method of claim 2, wherein the first contaminant is gallium.
44. 44. The method of claim 3, wherein the first contaminant is gallium.
45. 45. The method of claim 4, wherein the first contaminant is gallium.
46. 46. The solar cell of claim 5, wherein the first contaminant is gallium.
47. 47. The solar cell of claim 6, wherein the first contaminant is gallium.
48. 48. The method of claim 4, wherein the first contaminant is phosphorus.
49. 49. The solar cell of claim 5, wherein the first contaminant is phosphorus.
50. 50. The solar cell of claim 6, wherein the first contaminant is phosphorus.
51. 51. The method of claim 1, wherein the application step is performed by screen printing.
52. 52. The method of claim 2, wherein the application step is performed by screen printing.
53. 53. The method of claim 3, wherein the application step is performed by screen printing.
54. 54. The method of claim 4, wherein the application step is performed by screen printing.
55. 55. The method of claim 1, wherein the application step is performed by electronic deposit.
56. 56. The method of claim 2, wherein the application step is performed electronic deposit.
57. 57. The method of claim 4, wherein the application step is performed by electronic deposit.
58. 58. The method of claim 1, wherein the first contaminant is an element of Group III of the Periodic Table.
59. 59. The method of claim 2, wherein the first contaminant is an element of Group III of the Periodic Table.
60. 60. The method of claim 3, wherein the first contaminant is an element of Group III of a Table Periodic
61. 61. The method of claim 4, wherein the first contaminant is an element of Group III of the Periodic Table.
62. 62. The solar cell of claim 5, wherein the first contaminant is an element of Group III of the Periodic Table.
63. 63. The solar cell of claim 6, wherein the first contaminant is an element of Group III of the Periodic Table.
64. 64. The method of claim 1, wherein the first contaminant is an element of Group V of the Periodic Table.
65. 65. The method of claim 2, wherein the first contaminant is an element of Group V of the Periodic Table.
66. 66. The method of claim 3, wherein the first contaminant is an element of Group V of a Table Periodic
67. 67. The method of claim 4, wherein the first contaminant is an element of Group V of a Periodic Table.
68. 68. The solar cell of claim 5, wherein the first contaminant is an element of Group V of a Periodic Table.
69. 69. The solar cell of claim 6, wherein the first contaminant is an element of Group V of the Periodic Table.
70. 70. The method of claim 1, wherein the first metal is aluminum and the first type is the p type.
71. 71. The method of claim 3, wherein the first metal is aluminum and the first contaminant is capable of contaminating a semiconductive material to be of the p type.
72. 72. The solar cell of claim 5, wherein the first metal is aluminum and the second type is the type P- SUMMARY OF THE INVENTION A silicon autocontaminating electrode is formed primarily of a metal (main component), which forms a eutectic point with silicon. A p-type contaminant (for a positive electrode) or an n-type contaminant (for a negative electrode) forms an alloy with the main component. The alloy of the main component and the contaminant is applied to a silicon substrate. Once applied, the alloy and the substrate are heated to a temperature higher than the eutectic temperature of the main component and silicon, so that the main component liquefies more than a eutectic proportion of the silicon substrate. Then the temperature is decreased towards the eutectic temperature, allowing the molten silicon to reform through the epitaxy of the liquid phase and while doing so, incorporate contaminant atoms in its re-growth grid. Once the temperature falls below the eutectic temperature of the main component and the silicon, this silicon, which has not already grown on the grid, forms a solid phase alloy with the main component and the remaining unused contaminant. This alloy of the main component, silicon and the unused contaminant is the final contact material. Alternatively, a self-contaminating electrode can be formed from an unalloyed metal, applied to a silicon substrate. The metal and the substrate are heated at a temperature above the eutectic temperature of the metal and silicon in an ambient gas into which a source of vaporized polluting atoms has been introduced. The polluting atoms, in the ambient gas, are absorbed by the molten mixture of metal and silicon to a much greater extent than they are absorbed by the surfaces of the solid silicon substrate. Then the temperature is then decreased to below the eutectic temperature of the metal and silicon. During the decrease in temperature, the contaminated silicon layer increases and the final contact material of the metal-silicon alloy is created in the same process as that described above.