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KR970078046A - Analog to Digital Converter - Google Patents

Analog to Digital Converter Download PDF

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Publication number
KR970078046A
KR970078046A KR1019960018566A KR19960018566A KR970078046A KR 970078046 A KR970078046 A KR 970078046A KR 1019960018566 A KR1019960018566 A KR 1019960018566A KR 19960018566 A KR19960018566 A KR 19960018566A KR 970078046 A KR970078046 A KR 970078046A
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KR
South Korea
Prior art keywords
analog
data
initial value
digital
digital converter
Prior art date
Application number
KR1019960018566A
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Korean (ko)
Other versions
KR100224560B1 (en
Inventor
이대영
Original Assignee
유기범
대우통신 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 유기범, 대우통신 주식회사 filed Critical 유기범
Priority to KR1019960018566A priority Critical patent/KR100224560B1/en
Priority to FR9706543A priority patent/FR2749456A1/en
Priority to JP9155850A priority patent/JPH1098385A/en
Priority to DE19722805A priority patent/DE19722805A1/en
Publication of KR970078046A publication Critical patent/KR970078046A/en
Application granted granted Critical
Publication of KR100224560B1 publication Critical patent/KR100224560B1/en

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
    • H03M1/46—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
    • H03M1/462—Details of the control circuitry, e.g. of the successive approximation register
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

본 발명은 SAR(Successive Approximation Register)형 아날로그-디지탈 변환기에 있어서, 고속으로 아날로그-디지탈 변환을 실행할 수 있도록 된 아날로그-디지탈 변환기에 관한 것으로서, 아날로그 입력신호의 레벨에 근사하는 디지탈데이타를 출력하는 초기값생성수단과, 상기 초기값생성수단으로부터 출력되는 데이타를 초기값으로 하여 인가되는 클록신호를 계수하는 카운터수단, 상기 카운터수단으로부터 출력되는 계수치에 대응하는 전압신호를 출력하는 디지탈-아날로그 변환수단 및, 상기 디지탈-아날로그 변환수단에서 출력되는 전압치와 아날로그 입력신호의 전압치를 비교하여 입력신호의 전압치가 더 높은 경우에 상기 카운터수단으로 클록신호를 인가하는 게이트수단을 포함하여 구성된 것을 특징으로 한다.BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an analog-to-digital converter that is capable of performing analog-to-digital conversion at a high speed in a successive application register (SAR) type analog-to-digital converter. A value generating means, counter means for counting a clock signal applied with data output from the initial value generating means as an initial value, digital-analog converting means for outputting a voltage signal corresponding to the count value output from the counter means; And gate means for applying a clock signal to the counter means when the voltage value of the input signal is higher by comparing the voltage value output from the digital-analog conversion means with the voltage value of the analog input signal.

Description

아날로그-디지탈 변환기Analog to Digital Converter

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 본 발명의 일실시예에 따른 아날로그-디지탈 변환기의 구성을 나타낸 회로구성도.3 is a circuit diagram showing the configuration of an analog-digital converter according to an embodiment of the present invention.

Claims (5)

아날로그 입력신호의 레벨에 근사하는 디지탈데이타를 출력하는 초기값 생성수단과, 상기 초기값생성수단으로부터 출력되는 데이타를 초기값으로 하여 인가되는 클록신호를 계수하는 카운터수단, 상기 카운터수단으로부터 출력되는 계수치에 대응하는 전압신호를 출력하는 디지탈-아날로그 변환수단 및, 상기 디지탈-아날로그 변환수단에서 출력되는 전압치와 아날로그 입력신호의 전압치를 비교하여 입력신호의 전압치가 더 높은 경우에 상기 카운터수단으로 클록신호를 인가하는 게이트수단을 포함하여 구성된 것을 특징으로 하는 아날로그-디지탈 변환기.Initial value generating means for outputting digital data approximating the level of the analog input signal, counter means for counting a clock signal applied with data output from the initial value generating means as an initial value, and a count value output from the counter means Digital-to-analog conversion means for outputting a voltage signal corresponding to the digital signal; Analog-to-digital converter comprising a gate means for applying a. 제1항에 있어서, 상기 초기값생성수단은 상기 아날로그 입력신호를 각각 다른 소정의 기준전압과 비교하는 적어도 2개의 비교수단과, 이 비교수단으로부터 출력되는 비교신호를 상기 카운터수단의 초기값 데이타로 변환하기 위한 데이타변환수단을 포함하여 구성된 것을 특징으로 하는 아날로그-디지탈 변환기.2. The apparatus according to claim 1, wherein the initial value generating means comprises at least two comparison means for comparing the analog input signal with a predetermined reference voltage, respectively, and a comparison signal output from the comparison means as initial value data of the counter means. An analog-to-digital converter comprising data conversion means for conversion. 제1항에 있어서, 상기 초기값생성수단은 상기 아날로그 입력신호를 각각 다른 소정의 기준전압과 비교하는 다수의 비교수단과, 이 비교수단으로부터 출력되는 비교신호를 인코딩하는 인코딩수단, 이 인코딩수단으로부터 출력되는 데이타를 상기 카운터수단의 초기값데이타로 변환하기 위한 데이타변환수단을 포함하여 구성된 것을 특징으로 하는 아날로그-디지탈 변환기.2. The apparatus according to claim 1, wherein the initial value generating means comprises: a plurality of comparison means for comparing the analog input signal with a different predetermined reference voltage, encoding means for encoding a comparison signal output from the comparison means, and from the encoding means. And data conversion means for converting the output data into initial value data of the counter means. 제3항에 있어서, 상기 데이타변환수단은 ROM테이블로 구성되는 것을 특징으로 하는 아날로그-디지탈 변환기.4. The analog-to-digital converter according to claim 3, wherein the data conversion means comprises a ROM table. 제3항 또는 제4항에 있어서, 상기 인코딩수단의 출력데이타가 상기 ROM테이블의 어드레스데이타인 것을 특징으로 하는 아날로그-디지탈 변환기.The analog-to-digital converter according to claim 3 or 4, wherein the output data of said encoding means is the address data of said ROM table. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019960018566A 1996-05-29 1996-05-29 Analog-digital converter KR100224560B1 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1019960018566A KR100224560B1 (en) 1996-05-29 1996-05-29 Analog-digital converter
FR9706543A FR2749456A1 (en) 1996-05-29 1997-05-28 ANALOGUE-DIGITAL CONVERTER WITH SUCCESSIVE APPROXIMATIONS REGISTER THAT CAN CONVERT DATA AT HIGH SPEED
JP9155850A JPH1098385A (en) 1996-05-29 1997-05-29 A/d converter
DE19722805A DE19722805A1 (en) 1996-05-29 1997-05-30 Successive approximation register A=D converter for communication electronics

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960018566A KR100224560B1 (en) 1996-05-29 1996-05-29 Analog-digital converter

Publications (2)

Publication Number Publication Date
KR970078046A true KR970078046A (en) 1997-12-12
KR100224560B1 KR100224560B1 (en) 1999-10-15

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Application Number Title Priority Date Filing Date
KR1019960018566A KR100224560B1 (en) 1996-05-29 1996-05-29 Analog-digital converter

Country Status (4)

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JP (1) JPH1098385A (en)
KR (1) KR100224560B1 (en)
DE (1) DE19722805A1 (en)
FR (1) FR2749456A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6617993B1 (en) * 1999-10-08 2003-09-09 Agere Systems Inc. Analog to digital converter using asynchronously swept thermometer codes

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3606893A1 (en) * 1986-03-03 1987-09-10 Zdzislaw Gulczynski ANALOG-DIGITAL CONVERTER

Also Published As

Publication number Publication date
JPH1098385A (en) 1998-04-14
KR100224560B1 (en) 1999-10-15
DE19722805A1 (en) 1997-12-11
FR2749456A1 (en) 1997-12-05

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