KR970073148A - Trellis encoded video input signal processing system and Viterbi decoder for digital packet signals - Google Patents
Trellis encoded video input signal processing system and Viterbi decoder for digital packet signals Download PDFInfo
- Publication number
- KR970073148A KR970073148A KR1019970012980A KR19970012980A KR970073148A KR 970073148 A KR970073148 A KR 970073148A KR 1019970012980 A KR1019970012980 A KR 1019970012980A KR 19970012980 A KR19970012980 A KR 19970012980A KR 970073148 A KR970073148 A KR 970073148A
- Authority
- KR
- South Korea
- Prior art keywords
- trellis
- encoded video
- response
- trellis encoded
- video input
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
- Dc Digital Transmission (AREA)
Abstract
적응성 트렐리스 디코더(24)는 다중 입력 신호 포맷 사이에서 흔적없이 스위칭한다. 트렐리스 디코더는, 인터리브된 입력 패킷 데이터 신호에서 코드를 검출하는, 비터비 디코딩 시스템의 환경에서 설명되는 코드 시퀀스 검출 시스템(30,40)을 사용한다. 코드 시퀀스 검출시스템은 또한 인코딩된 데이터인 입력과 디코딩된 데이터인 출력사이에서 지연(대기시간)을 감소시킨다. 코드 시퀀스 검출 시스템은 다수의 신호 포맷중 하나, 예컨대 부분응답 포맷과 정상 포맷중 하나를 나타내는 인터리브된 입력 패킷 데이터 신호에 응답하여 분기 미터값을 제공한다. 비터비 디코더(40)는 패킷 데이터 신호를 디코딩하여 포맷들중 하나와 관련된 실질상 복제된 값을 포함하는 분기 미터값에 응답하여 디코딩된 출력을 산출한다. 비터비 디코더는 트렐리스 인코딩된 데이터 패킷에 관련된 분기 미터값에 응답하여 결정 데이터를 제공하는 비교 회로(43)를 포함한다. 결정 데이터는 트레리스 상태 및 데이터 패킷에 의해 형성되며, 트렐리스 상태 천이와 관련된다. 역추적 네트워그(47)는 형성된 결정 데이터에 응답하여 디코딩된 데이터를 제공한다.Adaptive trellis decoder 24 switches without a trace between multiple input signal formats. The trellis decoder uses code sequence detection systems 30 and 40 described in the context of a Viterbi decoding system, which detects codes in interleaved input packet data signals. The code sequence detection system also reduces the delay (latency) between an input that is encoded data and an output that is decoded data. The code sequence detection system provides a branch meter value in response to an interleaved input packet data signal representing one of a number of signal formats, such as a partial response format and a normal format. The Viterbi decoder 40 decodes the packet data signal to produce a decoded output in response to a branch meter value that includes a substantially duplicated value associated with one of the formats. The Viterbi decoder includes a comparison circuit 43 for providing decision data in response to branch meter values associated with trellis encoded data packets. Decision data is formed by trellis states and data packets and is associated with trellis state transitions. The backtrack network 47 provides decoded data in response to the decision data formed.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
도 1은 인터리브된 다중 데이터 스티림을 디코딩하여 다중 동작 모드 사이에 흔적없는 스위칭을 제공하는, 본 발명에 따른 트렐리스(trellis) 디코더 시스템의 도면, 도 2는 DHTV 표준에 기술된, 트렐리스 인코더, 프리코더 및 심벌매퍼(symbol mapper) 의 도면, 도 3은 도 2의 인코더 시스템을 위해 유도된 인코더 상태표, 도 4 NTSC 상호 채널 배제 필터에 의해 사전 필터링되지 않은 트렐리스 디코딩 데이터를 위해 유도된 4상태 트렐리스의 도면, 도 5는 NTSC 배제 필터에 의해 사전 필터링되지 않은 트렐리스 디코딩 데이터를 위해 유도된 8상태 트렐리스의 도면, 도 6은 도 1의 트렐리스 디코더용으로 적합한 분기 미터 계산기(branch metric computer)구조를 도시하는 블록도, 도 7은 도 6의 분기 미터 계산기 구조용으로 적합한 분기 미터 게산 유닛 구조를 도시하는 도면, 도 8은 도 9의 ACS 기능 구조용으로 적합한, 본 발명에 따른 개별 가산-비교-선택(ACS)유닛의 구조를 도시하는 도면, 도 9는 도 1의 트렐리스 디코더용으로 적합한, 본 발명에 따른 ACS 기능 구조를 도시하는 도면, 도 10은 도 1의 트렐리스 디코더용으로 적합한, 본 발명에 따른 역추적 제어 유닛 구조를 도시하는 도면, 도 11은 도 1의 트렐리스 디코더용으로 적합한 트렐리스 디매퍼(demapper)구조를 도시하는 도면, 도 12는 HDTV 수상기 시스템의 환경에서, 필터링된 또는 필터링되지 않은 데이터의 인터리브된 다중 데이터 스트림을 적응적으로 디코딩하는 흔적없는 스위칭 가능 트렐리스 디코더의 도면, 도 13은 본 발명에 따라, 인터리브된 데이터의 트렐리스 디코딩에 사용된 트렐리스 역추적 기능을 수행하는 처리의 흐름도, 도 14는 본 발며에 따라, 인터리브된 데이터의 트렐리스 디코딩에 사용된 순 방향 추적 처리의 흐름도, 도 15는 본 발며에 따라, 도 10의 역추적 제어 기능을 실현하는, 도 13 및 도 14의 처리를 통합하는 트렐리스 디코딩 처리의 도면.1 is a diagram of a trellis decoder system according to the present invention, which decodes interleaved multiple data streams to provide traceless switching between multiple modes of operation, and FIG. 2 is a trellis described in the DHTV standard. 3 is a diagram of a encoder encoder, a precoder and a symbol mapper, an encoder status table derived for the encoder system of FIG. 2, and trellis decoded data not pre-filtered by the FIG. 4 NTSC cross channel exclusion filter. Figure 4 is a diagram of the four-state trellis derived for the purpose, FIG. 5 is a diagram of the eight-state trellis derived for trellis decoded data that is not pre-filtered by the NTSC exclusion filter, and FIG. 6 is the trellis decoder of FIG. Block diagram showing a branch metric computer structure suitable for use, FIG. 7 shows a branch meter calculation unit structure suitable for the branch meter calculator structure of FIG. 8 shows the structure of an individual add-compare-selection (ACS) unit according to the invention, suitable for the ACS function structure of FIG. 9, FIG. 9 according to the invention, suitable for the trellis decoder of FIG. Fig. 10 shows an ACS function structure, Fig. 10 shows a traceback control unit structure according to the invention, which is suitable for the trellis decoder of Fig. 1, Fig. 11 is a trellis decoder suitable for the trellis decoder of Fig. 1; FIG. 12 shows a traceless switchable trellis decoder that adaptively decodes an interleaved multiple data stream of filtered or unfiltered data in the context of an HDTV receiver system. 13 is a flowchart of a process for performing a trellis traceback function used for trellis decoding of interleaved data according to the present invention, and FIG. 14 is an interleaved data according to the present invention. Flowchart of the forward tracking process used for trellis decoding of the data; FIG. 15 is a trellis decoding process incorporating the processes of FIGS. 13 and 14, which realizes the backtracking control function of FIG. Drawing.
Claims (12)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US629,672 | 1996-04-09 | ||
US08/629,672 US5841819A (en) | 1996-04-09 | 1996-04-09 | Viterbi decoder for digital packet signals |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970073148A true KR970073148A (en) | 1997-11-07 |
KR100495185B1 KR100495185B1 (en) | 2005-11-16 |
Family
ID=24524005
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019970012980A KR100495185B1 (en) | 1996-04-09 | 1997-04-09 | Trellis encoded video input processing system and signal processing method in the system |
Country Status (4)
Country | Link |
---|---|
KR (1) | KR100495185B1 (en) |
DE (1) | DE69722304T2 (en) |
HK (1) | HK1005397A1 (en) |
MY (1) | MY112861A (en) |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR970010103B1 (en) * | 1994-04-12 | 1997-06-21 | Lg Electronics Inc | Partial response trellis decoder for hdtv |
-
1997
- 1997-03-27 DE DE69722304T patent/DE69722304T2/en not_active Expired - Lifetime
- 1997-04-07 MY MYPI97001485A patent/MY112861A/en unknown
- 1997-04-09 KR KR1019970012980A patent/KR100495185B1/en not_active IP Right Cessation
-
1998
- 1998-05-27 HK HK98104561A patent/HK1005397A1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
HK1005397A1 (en) | 1999-01-08 |
DE69722304T2 (en) | 2004-04-29 |
DE69722304D1 (en) | 2003-07-03 |
KR100495185B1 (en) | 2005-11-16 |
MY112861A (en) | 2001-09-29 |
MX9702556A (en) | 1998-03-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5841819A (en) | Viterbi decoder for digital packet signals | |
US5243627A (en) | Signal point interleaving technique | |
US5512957A (en) | Method and apparatus for combating co-channel NTSC interference for digital TV transmission | |
US6088404A (en) | Method and apparatus for decoding trellis code data | |
JP2002515210A (en) | Decoder for lattice coded interleaved data stream and HDTV receiver including the decoder | |
KR20020082268A (en) | Digital vestigial sideband transmit system | |
Lin et al. | Algorithms and architectures for concurrent Viterbi decoding | |
JP4208724B2 (en) | HDTV trellis decoder architecture | |
KR970073148A (en) | Trellis encoded video input signal processing system and Viterbi decoder for digital packet signals | |
Lin et al. | Parallel Viterbi decoding methods for uncontrollable and controllable sources | |
EP1091579B1 (en) | Trellis demapper for Trellis decoder | |
KR19990076387A (en) | Retracement device of lattice decoder | |
US7263141B1 (en) | Code mapping in a trellis decoder | |
KR100891693B1 (en) | Mapping device for digital communication system | |
MY112860A (en) | Code sequence detection in a trellis decoder | |
KR970073092A (en) | Multiple mode trellis decoder for a digital signal processing system | |
MXPA97002558A (en) | Encouraged decoder of multiple modes for a digital sign processing system | |
CA2241691A1 (en) | Method and apparatus for symbol decoding using a variable number of survivor paths | |
Jekal | An advanced architecture of a TCM decoder for the ATV standard | |
KR19990035418A (en) | A survival path reverse tracking device for trellis code data | |
MX9702557A (en) | Digital packet data trellis decoder. |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PA0109 | Patent application |
Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 19970409 |
|
PG1501 | Laying open of application | ||
A201 | Request for examination | ||
PA0201 | Request for examination |
Patent event code: PA02012R01D Patent event date: 20020409 Comment text: Request for Examination of Application Patent event code: PA02011R01I Patent event date: 19970409 Comment text: Patent Application |
|
E902 | Notification of reason for refusal | ||
PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20040730 Patent event code: PE09021S01D |
|
E701 | Decision to grant or registration of patent right | ||
PE0701 | Decision of registration |
Patent event code: PE07011S01D Comment text: Decision to Grant Registration Patent event date: 20050329 |
|
GRNT | Written decision to grant | ||
PR0701 | Registration of establishment |
Comment text: Registration of Establishment Patent event date: 20050603 Patent event code: PR07011E01D |
|
PR1002 | Payment of registration fee |
Payment date: 20050607 End annual number: 3 Start annual number: 1 |
|
PG1601 | Publication of registration | ||
PR1001 | Payment of annual fee |
Payment date: 20080522 Start annual number: 4 End annual number: 4 |
|
PR1001 | Payment of annual fee |
Payment date: 20090525 Start annual number: 5 End annual number: 5 |
|
PR1001 | Payment of annual fee |
Payment date: 20100525 Start annual number: 6 End annual number: 6 |
|
PR1001 | Payment of annual fee |
Payment date: 20110519 Start annual number: 7 End annual number: 7 |
|
PR1001 | Payment of annual fee |
Payment date: 20120517 Start annual number: 8 End annual number: 8 |
|
FPAY | Annual fee payment |
Payment date: 20130520 Year of fee payment: 9 |
|
PR1001 | Payment of annual fee |
Payment date: 20130520 Start annual number: 9 End annual number: 9 |
|
FPAY | Annual fee payment |
Payment date: 20140516 Year of fee payment: 10 |
|
PR1001 | Payment of annual fee |
Payment date: 20140516 Start annual number: 10 End annual number: 10 |
|
LAPS | Lapse due to unpaid annual fee | ||
PC1903 | Unpaid annual fee |