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KR970072098A - METHOD FOR FORMING METAL WIRING OF SEMICONDUCTOR - Google Patents

METHOD FOR FORMING METAL WIRING OF SEMICONDUCTOR Download PDF

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Publication number
KR970072098A
KR970072098A KR1019960012732A KR19960012732A KR970072098A KR 970072098 A KR970072098 A KR 970072098A KR 1019960012732 A KR1019960012732 A KR 1019960012732A KR 19960012732 A KR19960012732 A KR 19960012732A KR 970072098 A KR970072098 A KR 970072098A
Authority
KR
South Korea
Prior art keywords
trench
forming
metal wiring
semiconductor
metal
Prior art date
Application number
KR1019960012732A
Other languages
Korean (ko)
Inventor
이준현
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019960012732A priority Critical patent/KR970072098A/en
Publication of KR970072098A publication Critical patent/KR970072098A/en

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Abstract

본 발명은 반도체 소자의 제조방법에 있어서, 열처리 공정시 발생되는 힐락 현상을 방지하여, 소자의 신뢰성 및 제조 수율을 향상시킬 수 있는 반도체 소자의 금속배선 형성 방법에 관한 것으로, 반도체 기판 상에 절연막을 형성하는 단계; 상기 절연막의 소정 부위에 소정 깊이의 트렌치를 형성하는 단계; 상기 트렌치에 금속을 매립한 후 금속배선층을 형성하는 단계를 포함하는 것을 특징으로 한다.The present invention relates to a method for forming a metal wiring of a semiconductor device, which can improve the reliability and manufacturing yield of the device by preventing a helix phenomenon occurring in a heat treatment process, ; Forming a trench having a predetermined depth on a predetermined portion of the insulating film; And filling the trench with a metal to form a metal interconnection layer.

Description

반도체 소자의 금속배선 형성 방법METHOD FOR FORMING METAL WIRING OF SEMICONDUCTOR

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제2도(가) 내지 (다)는 본 발명의 일 실시예에 따른 반도체 소자의 금속배선 형성 방법을 나타낸 도면.FIGS. 2 (a) to 2 (c) illustrate a method of forming a metal wiring of a semiconductor device according to an embodiment of the present invention; FIG.

Claims (2)

반도체 기판 상에 절연막을 형성하는 단계; 상기 절연막의 소정 부위에 소정 깊이의 트렌치를 형성하는 단계; 상기 트렌치에 금속을 매립한 후 금속배선층을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 소자의 금속배선 형성 방법.Forming an insulating film on the semiconductor substrate; Forming a trench having a predetermined depth on a predetermined portion of the insulating film; And filling the trench with a metal to form a metal interconnection layer. 제1항에 있어서, 상기 트렌치 영역은 사진 식각 공정을 통한 상기 절연막이 일부 식각되어 형성되는 것을 특징으로 하는 반도체 소자의 금속배선 형성 방법.The method of claim 1, wherein the trench region is formed by partially etching the insulating film through a photolithography process. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960012732A 1996-04-24 1996-04-24 METHOD FOR FORMING METAL WIRING OF SEMICONDUCTOR KR970072098A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960012732A KR970072098A (en) 1996-04-24 1996-04-24 METHOD FOR FORMING METAL WIRING OF SEMICONDUCTOR

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960012732A KR970072098A (en) 1996-04-24 1996-04-24 METHOD FOR FORMING METAL WIRING OF SEMICONDUCTOR

Publications (1)

Publication Number Publication Date
KR970072098A true KR970072098A (en) 1997-11-07

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960012732A KR970072098A (en) 1996-04-24 1996-04-24 METHOD FOR FORMING METAL WIRING OF SEMICONDUCTOR

Country Status (1)

Country Link
KR (1) KR970072098A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990062214A (en) * 1997-12-31 1999-07-26 김영환 Metal wiring formation method of semiconductor device
KR100635872B1 (en) * 2000-12-28 2006-10-18 매그나칩 반도체 유한회사 Metal wiring formation method of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990062214A (en) * 1997-12-31 1999-07-26 김영환 Metal wiring formation method of semiconductor device
KR100635872B1 (en) * 2000-12-28 2006-10-18 매그나칩 반도체 유한회사 Metal wiring formation method of semiconductor device

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Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19960424

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid