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KR970055932A - Downlink low speed combined control channel strobe signal generator for assigned timeslot in personal communication terminal - Google Patents

Downlink low speed combined control channel strobe signal generator for assigned timeslot in personal communication terminal Download PDF

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Publication number
KR970055932A
KR970055932A KR1019950059557A KR19950059557A KR970055932A KR 970055932 A KR970055932 A KR 970055932A KR 1019950059557 A KR1019950059557 A KR 1019950059557A KR 19950059557 A KR19950059557 A KR 19950059557A KR 970055932 A KR970055932 A KR 970055932A
Authority
KR
South Korea
Prior art keywords
time slot
strobe signal
control channel
low speed
downlink
Prior art date
Application number
KR1019950059557A
Other languages
Korean (ko)
Inventor
곽재봉
Original Assignee
유기범
대우통신 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 유기범, 대우통신 주식회사 filed Critical 유기범
Priority to KR1019950059557A priority Critical patent/KR970055932A/en
Publication of KR970055932A publication Critical patent/KR970055932A/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W72/00—Local resource management
    • H04W72/04—Wireless resource allocation
    • H04W72/044—Wireless resource allocation based on the type of the allocated resource
    • H04W72/0446—Resources in time domain, e.g. slots or frames

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

본 발명은 휴대용 전화기 등의 개인통신장치에 있어서, 기지국으로부터 송신되어 온 프레임개시신호와 사용이 허용된 타임슬롯번호를 근거로 해당하는 타임슬롯(Time Slot)에 대한 다운링크 저속결합제어채널의 스트로부신호를 생성하도록 된 개인통신용 단말기의 할당된 타임슬롯에 대한 다운링크 저속결합제어채널 스트로브신호 발생장치에 관한 것으로서, 13MHz의 클록신호를 근거로 각 데이터비트에 대응하는 비트동기신호를 생성하여 이 비트동기 신호와 상기 클록신호를 이용하여 156.25비트의 구간을 갖춘 타임슬롯 동기신호를 생성하게 되고, 상기 타임슬롯동기신호의 계수치와 자신에게 할당된 타임슬롯번호를 비교함으로써 데이터 송수신을 위한 다운링크 타임슬롯 스트로브신호를 생성하게 되며, 상기 타임슬롯 동기신호의 게수치를 근거로 현재의 타임슬롯번호를 산정한 후 그 산정된 타임슬롯번호를 이용하여 프레임동기신호를 생성하고, 이어 프레임동기신호를 계수하여 프레임번호를 생성하고, 이 프레임번호와 할당된 프레임번호를 비교함으로써 데이터 송수신을 위한 저속결합제어채널 스트로브신호를 생성한 후, 상기 다운링크 타임슬롯 스트로브신호와의 논리곱을 통하여 할당된 타임슬롯에 대한 다운링크 저속결합제어채널 스트로브신호를 생성하게 된다.The present invention relates to a straw of a downlink low speed combined control channel for a corresponding time slot based on a frame start signal transmitted from a base station and a time slot number allowed for use in a personal communication device such as a portable telephone. The present invention relates to a downlink low speed coupled control channel strobe signal generator for an allocated timeslot of a personal communication terminal configured to generate a sub-signal. The bit synchronization signal corresponding to each data bit is generated based on a 13 MHz clock signal. A time slot synchronization signal having a period of 156.25 bits is generated by using a bit synchronization signal and the clock signal, and a downlink time for data transmission and reception by comparing a count value of the time slot synchronization signal with a time slot number assigned thereto. A slot strobe signal is generated and based on the number of timeslot synchronization signals. After calculating the time slot number, the frame synchronization signal is generated using the calculated time slot number, the frame synchronization signal is counted to generate the frame number, and the data is transmitted and received by comparing the frame number with the assigned frame number. After generating the low speed combined control channel strobe signal for the PDU, the downlink low speed combined control channel strobe signal is generated for the allocated timeslot through the logical product of the downlink timeslot strobe signal.

※ 대표도 : 제5도※ Representative diagram: 5th

Description

개인통신용 단말기의 할당된 타임슬롯에 대한 다운링크 저속결합제어채널 스트로브신호 발생장치Downlink low speed combined control channel strobe signal generator for assigned timeslot in personal communication terminal

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제5도는 본 발명의 1실시예에 따른 개인통신용 단말기의 할당된 타임슬롯에 대한 다운링크 저속결합제어채널 스트로브신호 발생장치의 구성을 나타낸 회로구성도.5 is a circuit diagram showing the configuration of an apparatus for generating a downlink low speed coupled control channel strobe signal for an assigned timeslot of a personal communication terminal according to an embodiment of the present invention.

Claims (1)

13MHz의 클록을 기준으로 하여 각 데이터 비트를 48클록의 길이를 함과 더불어 156.25비트로 하나의 타임슬롯을 구성하도록 된 개인통신 시스템에 있어서, 13MHz의 기준클록을 생성하는 클록발생수단과, 상기 기준클록과 프레임개시신호를 근거로 비트동기신호를 생성하는 비트동기신호 발생수단, 상기 비트동기신호와 기준클록을 근거로 타임슬롯동기신호를 생성하는 타임슬롯동기신호 발생수단, 상기 타임슬롯동기신호를 계수하여 현재의 타임슬롯번호를 출력하는 타임슬롯번호 계수수단, 외부로부터 설정된 타임슬롯번호를 저장하는 래치수단, 상기 타임슬롯번호 계수수단에 의해 계수된 타임슬롯번호와 상기 래치수단에 의해 등록된 타임슬롯 번호를 근거로 다운링크 타임슬롯 스트로브신호를 생성하는 다운링크 타임슬롯 스트로브신호 발생수단, 상기 타임슬롯번호 계수수단으로부터 출력되는 타임슬롯번호가 소정 값이 되면 프레임동기신호를 출력하는 프레임동기신호 생성수단, 상기 프레임동기신호 생성수단으로부터 출력되는 프레임동기신호를 계수하여 프레임번호를 출력하는 프레임번호 계수수단 및, 상기 프레임번호 계수수단으로부터 저속결합제어채널에 대한 스트로브신호를 발생하는 저속결합제어채널 스트로브신호 발생수단 및, 상기 다운링크 타임슬롯 스트로브신호 발생수단으로부터 출력되는 다운링크 타임슬롯 스트로브신호와 상기 저속결합제어채널 스트로브신호 발생수단으로부터 출력되는 저속결합제어채널 스트로브신호를 논리곱하여 할당된 타임슬롯에 대한 다운링크 저속결합제어채널 스트로브신호를 생성하는 다운링크 저속결합제어채널 스트로브신호를 생성하는 다운링크 저속결합제어채널 스트로브신호 발생수단을 포함하여 구성된 것을 특징으로 하는 개인통신용 단말기의 할당된 타임슬롯에 대한 다운링크 저속결합제어채널 스트로브신호 발생장치.A personal communication system configured to form a time slot of 156.25 bits with each data bit having a length of 48 clocks based on a 13 MHz clock, comprising: clock generating means for generating a reference clock of 13 MHz and the reference clock; And a bit synchronous signal generating means for generating a bit synchronous signal based on the frame start signal, a time slot synchronous signal generating means for generating a time slot synchronous signal based on the bit synchronous signal and a reference clock, and counting the time slot synchronous signal. Time slot number counting means for outputting a current time slot number, a latch means for storing a time slot number set from the outside, a time slot number counted by the time slot number counting means and a time slot registered by the latch means Downlink timeslot strobe signal generating means for generating a downlink timeslot strobe signal based on the number; A frame synchronous signal generating means for outputting a frame synchronous signal when the time slot number outputted from the time slot number counting means reaches a predetermined value; A low speed combined control channel strobe signal generating means for generating a strobe signal for the low speed combined control channel from the frame number counting means, and a downlink time slot strobe signal outputted from the downlink time slot strobe signal generating means; Generating a downlink low speed combined control channel strobe signal for generating a downlink low speed combined control channel strobe signal for an assigned time slot by performing a logical multiplication on the low speed combined control channel strobe signal outputted from the low speed combined control channel strobe signal generating means.A downlink low speed coupled control channel strobe signal generator for an assigned time slot of a personal communication terminal, comprising: downlink low speed coupled control channel strobe signal generating means. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950059557A 1995-12-27 1995-12-27 Downlink low speed combined control channel strobe signal generator for assigned timeslot in personal communication terminal KR970055932A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950059557A KR970055932A (en) 1995-12-27 1995-12-27 Downlink low speed combined control channel strobe signal generator for assigned timeslot in personal communication terminal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950059557A KR970055932A (en) 1995-12-27 1995-12-27 Downlink low speed combined control channel strobe signal generator for assigned timeslot in personal communication terminal

Publications (1)

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KR970055932A true KR970055932A (en) 1997-07-31

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